forked from M-Labs/artiq
1
0
Fork 0

phaser: rename get_next_frame_timestamp() to get_next_frame_mu()

and implement review comments (PR #1749)

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
This commit is contained in:
Etienne Wodey 2021-09-03 09:58:01 +02:00
parent 7aebf02f84
commit 075cb26dd7
1 changed files with 12 additions and 17 deletions

View File

@ -94,7 +94,7 @@ class Phaser:
:class:`PhaserOscillator` or :class:`PhaserChannel` DUC parameters all the :class:`PhaserOscillator` or :class:`PhaserChannel` DUC parameters all the
way to the DAC outputs is deterministic. This enables deterministic way to the DAC outputs is deterministic. This enables deterministic
absolute phase with respect to other RTIO input and output events absolute phase with respect to other RTIO input and output events
(see `get_next_frame_timestamp()`). (see `get_next_frame_mu()`).
The four analog DAC outputs are passed through anti-aliasing filters. The four analog DAC outputs are passed through anti-aliasing filters.
@ -476,28 +476,23 @@ class Phaser:
@kernel @kernel
def measure_frame_timestamp(self): def measure_frame_timestamp(self):
"""Perform a register read and record the exact frame timing in `self.frame_tstamp`. """Measure the timestamp of an arbitrary frame and store it in `self.frame_tstamp`.
Deterministic timing requires updates to be schedule at multiples of `self.t_frame` later. To be used as reference for aligning updates to the FastLink frames.
See `get_next_frame_timestamp()`. See `get_next_frame_mu()`.
""" """
rtio_output((self.channel_base << 8) | (PHASER_ADDR_BOARD_ID & 0x7f), 0) # can read any register rtio_output(self.channel_base << 8, 0) # read any register
delay_mu(int64(self.t_frame)) self.frame_tstamp = rtio_input_timestamp(rtio_get_counter() + 125_000, self.channel_base)
self.frame_tstamp = rtio_input_timestamp(rtio_get_counter() + 0xffffff, self.channel_base) delay(100 * us)
delay(10*ms)
@kernel @kernel
def get_next_frame_timestamp(self, after_timestamp_mu = int64(-1)): def get_next_frame_mu(self):
"""Return the RTIO timestamp of the next frame after `after_timestamp_mu`. """Return the timestamp of the frame strictly after `now_mu()`.
If `after_timestamp_mu < 0`, return the next frame after `now_mu()`. Register updates (DUC, DAC, TRF, etc.) scheduled at this timestamp and multiples
of `self.t_frame` later will have deterministic latency to output.
Updates scheduled at this timestamp and multiples of `self.t_frame` later will
have deterministic latency with respect to the RTIO timeline.
""" """
if after_timestamp_mu < 0: n = int64((now_mu() - self.frame_tstamp) / self.t_frame)
after_timestamp_mu = now_mu()
n = int64((after_timestamp_mu - self.frame_tstamp) / self.t_frame)
return self.frame_tstamp + (n + 1) * self.t_frame return self.frame_tstamp + (n + 1) * self.t_frame
@kernel @kernel