From 0505e9124f622e5d3e66dcfdecfc3d6a92b7f647 Mon Sep 17 00:00:00 2001
From: Robert Jordens <rj@m-labs.hk>
Date: Sat, 24 Mar 2018 16:05:26 +0100
Subject: [PATCH] kc705: port device_db, ad53xx/zotino example

---
 artiq/examples/kc705_nist_clock/device_db.py                 | 4 ++--
 .../kc705_nist_clock/repository/{ad5360.py => ad53xx.py}     | 5 ++---
 2 files changed, 4 insertions(+), 5 deletions(-)
 rename artiq/examples/kc705_nist_clock/repository/{ad5360.py => ad53xx.py} (80%)

diff --git a/artiq/examples/kc705_nist_clock/device_db.py b/artiq/examples/kc705_nist_clock/device_db.py
index 24958a56d..b51a330c9 100644
--- a/artiq/examples/kc705_nist_clock/device_db.py
+++ b/artiq/examples/kc705_nist_clock/device_db.py
@@ -185,8 +185,8 @@ device_db = {
     },
     "dac_zotino": {
         "type": "local",
-        "module": "artiq.coredevice.ad5360",
-        "class": "AD5360",
+        "module": "artiq.coredevice.zotino",
+        "class": "Zotino",
         "arguments": {
             "spi_device": "spi_zotino",
             "ldac_device": "ttl_zotino_ldac",
diff --git a/artiq/examples/kc705_nist_clock/repository/ad5360.py b/artiq/examples/kc705_nist_clock/repository/ad53xx.py
similarity index 80%
rename from artiq/examples/kc705_nist_clock/repository/ad5360.py
rename to artiq/examples/kc705_nist_clock/repository/ad53xx.py
index 88ba87631..f10bde057 100644
--- a/artiq/examples/kc705_nist_clock/repository/ad5360.py
+++ b/artiq/examples/kc705_nist_clock/repository/ad53xx.py
@@ -1,7 +1,7 @@
 from artiq.experiment import *
 
 
-class AD5360Test(EnvExperiment):
+class AD53XXTest(EnvExperiment):
     def build(self):
         self.setattr_device("core")
         self.setattr_device("fmcdio_dirctl")
@@ -14,8 +14,7 @@ class AD5360Test(EnvExperiment):
         delay(5*ms)  # build slack for shift register set
         self.fmcdio_dirctl.set(self, 0x00008800)
         self.dac.setup_bus()
-        self.dac.write_offsets()
         self.led.on()
         delay(400*us)
         self.led.off()
-        self.dac.set([i << 10 for i in range(32)])
+        self.dac.set_dac_mu([i << 10 for i in range(32)])