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transforms.interleaver: fix IR type/value mismatch.

This commit is contained in:
whitequark 2015-11-23 18:53:42 +08:00
parent 9fc7a42036
commit 03b4e4027c
1 changed files with 1 additions and 1 deletions
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2
artiq/compiler/transforms/interleaver.py
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@ -102,7 +102,7 @@ class Interleaver:
assert isinstance(source_terminator, ir.Delay) assert isinstance(source_terminator, ir.Delay)
if is_pure_delay(old_decomp): if is_pure_delay(old_decomp):
new_decomp_expr = ir.Constant(target_time_delta, builtins.TInt64()) new_decomp_expr = ir.Constant(int(target_time_delta), builtins.TInt64())
new_decomp = ir.Builtin("delay_mu", [new_decomp_expr], builtins.TNone()) new_decomp = ir.Builtin("delay_mu", [new_decomp_expr], builtins.TNone())
new_decomp.loc = old_decomp.loc new_decomp.loc = old_decomp.loc
source_terminator.basic_block.insert(source_terminator, new_decomp) source_terminator.basic_block.insert(source_terminator, new_decomp)