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Author SHA1 Message Date
Simon Renblad bc5addc17c lower opt level to avoid axi burst 2024-11-18 17:46:56 +08:00
Simon Renblad 39f7a217f3 commit lockfile 2024-10-29 17:15:43 +08:00
Simon Renblad 78ee3a96d1 fix errors 2024-10-28 15:35:40 +08:00
5 changed files with 9 additions and 9 deletions

4
src/Cargo.lock generated
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@ -384,9 +384,9 @@ checksum = "c75de51135344a4f8ed3cfe2720dc27736f7711989703a0b43aadf3753c55577"
[[package]]
name = "nalgebra"
version = "0.33.1"
version = "0.33.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "3bf139e93ad757869338ad85239cb1d6c067b23b94e5846e637ca6328ee4be60"
checksum = "26aecdf64b707efd1310e3544d709c5c0ac61c13756046aaaba41be5c4f66a3b"
dependencies = [
"approx",
"num-complex",

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@ -14,5 +14,5 @@ members = [
panic = "abort"
debug = true
codegen-units = 1
opt-level = 2
opt-level = 1
lto = true

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@ -488,14 +488,14 @@ async fn handle_run_kernel(
kernel::Message::RpcRecvRequest(slot) => slot,
other => panic!("expected root value slot from core1, not {:?}", other),
};
let remaining_tags = rpc::recv_return(&mut reader, &current_tags, slot, &mut |size| {
let remaining_tags = rpc::recv_return(&mut reader, &current_tags, slot, &mut |size| -> Result<*mut ()> {
if size == 0 {
0 as *mut ()
Ok(0 as *mut ())
} else {
let mut control = control.borrow_mut();
control.tx.send(kernel::Message::RpcRecvReply(Ok(size)));
match control.rx.recv() {
kernel::Message::RpcRecvRequest(slot) => slot,
kernel::Message::RpcRecvRequest(slot) => Ok(slot),
other => {
panic!("expected nested value slot from kernel CPU, not {:?}", other)
}

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@ -55,8 +55,8 @@ pub mod drtio {
}
}
impl From<DrtioError> for Error {
fn from(_error: DrtioError) -> Self {
impl<T> From<DrtioError<T>> for Error {
fn from(_error: DrtioError<T>) -> Self {
Error::AuxError
}
}

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@ -9,7 +9,7 @@ use core::{slice, str};
use cslice::AsCSlice;
use dma::{Error as DmaError, Manager as DmaManager};
use io::{Cursor, Error as IoError, ProtoWrite, Write};
use ksupport::{eh_artiq, kernel, rpc};
use ksupport::{eh_artiq, kernel, rpc, rtio};
use libboard_artiq::{
drtio_routing::RoutingTable,
drtioaux,