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Kirdy Revision v1_0 #64

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linuswck merged 22 commits from linuswck/kirdy:v1_0 into master 2025-10-31 12:56:51 +08:00
Conversation 0 Commits 22 Files Changed 113 +1213455 -334997
linuswck commented 2025-07-18 17:15:53 +08:00
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Board Overview

kirdy_top_view.png
kirdy_bottom_view.png
image.png

Front Panel Markings
image.png

AUX PSU
image.png

Description

This revision of Kirdy can have different output current options by fitting different power resistors.

  1. 307.2 mA Max
  2. 614.4 mA Max
  3. 1.2288 A Max (AUX PSU required)

Issues Related Changes

  1. Move components away from board edge for guide rails #29
  2. Connect EN's and PG's of Analog Supply LDO's(3.3VA, 5VA, 9VA, 15VA, -6VA, 8V) to MCU for power sequencing #32
  3. Add softstart to 9V LT3081 (Related Issue: #32, #33)
  • See #33 for the hardware Fix
  1. Add 1M resistor connecting to GND to the LF MOD AFE Opamp Input pin #35, opened SW1 kills laser diode (#62)
  2. Add EEPROM for an unique Mac Address #36
  3. Better Silkscreen and netname for the adapter pinout #37
  4. Add solder jumper(-6V or GND) for configuring laser diode built-in PD to operate in Photovoltaic or Photoconductive mode
  5. Relocate the relay to the LD Adapter and add its control signal to the LD Adapter #41, move/add protection relay to laser adapter (#46)
  6. Add a physical toggle switch for disabling the Laser Diode, TEC #39
  7. Add a pin header for factory reset #40
  8. 3V3 to 5V Voltage Translation (SN74LV1T34DBV) for MAX1968 SHDN signal #43
  9. Variable Range Photodiode Current Monitor #45
  10. Add Heat Sink for MAX1968. No heat sink is added to inductor due to lack of space #52
  11. Kirdy AUX PSU Kirdy HC (High Current) version (#54)
  • LT3045 based PSU
  1. Connect Opamp PowerDown_n pin to be controlled by MCU #56
  2. Add MOLEX minifit header to the board
  3. Update PCB Board Outline #59
  4. Float Front Panel GND and improve PoE Isolation #60, accidental earthing kills the laser diode (#61)
  5. Add laser current monitoring to AD7172-2 #63
  6. Use a single flake file for generating #48, generate panel outputs from flake (#49)
  7. Add CERN-OHL-s v2 license #58

Other Changes

  1. PCB Layout is reworked to optimize thermal dissipation and maintain a continuous ground plane for all the fast signal(SPI, PD_Mon, etc)
  2. Remove alternate footprint and circuit for AD7172-4 due to lack of physical space
  3. Add TERM_STAT, LD_EN, TEC_EN, Status LEDs to front panel
  4. Add Testpoints for debugging
  5. Dim the power rail LEDs
  6. Change the USBC connector to be vertical one (Same as the one used in Sinara-hw SiLPA)
  7. Modify the stackup (all copper layers are 1 oz/ft^2)
  8. Relax the PCB layout rules for lower manufacturing costs
  9. Use jobset to generate the production files
  10. Use LT3081 DPAK package for thermal dissipation
  11. Add an additional parallel LT3045 LDOs for higher output current to the main board
  12. Add Mechanical slot to relieve the mechanical stress and isolate the thermal of the voltage reference Reference: ADI App Notes AN-82
  13. Add a heatspreader to the bottom of the board for better thermal dissipation
  14. Add copper thieving patterns

Housekeeping

Closes #29, #31, #32, #33, #35, #36, #37, #38, #39, #40, #41, #43, #45, #46, #47, #48, #49, #52, #54, #56, #57, #58, #59, #60, #61, #62, #63

Related PR

sinara-hw/kirdyAdapter#4

# Board Overview ![kirdy_top_view.png](/attachments/5a027749-f4fe-4d09-8cbc-e6b703f9cebd) ![kirdy_bottom_view.png](/attachments/66b2e2be-ee20-4460-8f41-9fd5354c6ef8) ![image.png](/attachments/f718b828-fef3-4dff-a05c-fcb68f767b15) Front Panel Markings ![image.png](/attachments/429dd075-3b74-4066-a7fe-885aa5c16b89) AUX PSU ![image.png](/attachments/b57f4fe8-bff7-4d82-97d6-dd905648bea2) # Description This revision of Kirdy can have different output current options by fitting different power resistors. 1. 307.2 mA Max 2. 614.4 mA Max 3. 1.2288 A Max (AUX PSU required) ## Issues Related Changes 1. Move components away from board edge for guide rails #29 2. Connect EN's and PG's of Analog Supply LDO's(3.3VA, 5VA, 9VA, 15VA, -6VA, 8V) to MCU for power sequencing #32 3. Add softstart to 9V LT3081 (Related Issue: #32, #33) - See #33 for the hardware Fix 4. Add 1M resistor connecting to GND to the LF MOD AFE Opamp Input pin #35, #62 5. Add EEPROM for an unique Mac Address #36 6. Better Silkscreen and netname for the adapter pinout #37 7. Add solder jumper(-6V or GND) for configuring laser diode built-in PD to operate in Photovoltaic or Photoconductive mode 8. Relocate the relay to the LD Adapter and add its control signal to the LD Adapter #41, #46 9. Add a physical toggle switch for disabling the Laser Diode, TEC #39 10. Add a pin header for factory reset #40 11. 3V3 to 5V Voltage Translation (SN74LV1T34DBV) for MAX1968 SHDN signal #43 12. Variable Range Photodiode Current Monitor #45 13. Add Heat Sink for MAX1968. No heat sink is added to inductor due to lack of space #52 14. Kirdy AUX PSU #54 - LT3045 based PSU 15. Connect Opamp PowerDown_n pin to be controlled by MCU #56 16. Add MOLEX minifit header to the board 17. Update PCB Board Outline #59 18. Float Front Panel GND and improve PoE Isolation #60, #61 19. Add laser current monitoring to AD7172-2 #63 20. Use a single flake file for generating #48, #49 21. Add CERN-OHL-s v2 license #58 ## Other Changes 1. PCB Layout is reworked to optimize thermal dissipation and maintain a continuous ground plane for all the fast signal(SPI, PD_Mon, etc) 2. Remove alternate footprint and circuit for AD7172-4 due to lack of physical space 3. Add TERM_STAT, LD_EN, TEC_EN, Status LEDs to front panel 4. Add Testpoints for debugging 5. Dim the power rail LEDs 6. Change the USBC connector to be vertical one (Same as the one used in Sinara-hw [SiLPA](https://github.com/sinara-hw/SiLPA_HL/wiki)) 7. Modify the stackup (all copper layers are 1 oz/ft^2) 8. Relax the PCB layout rules for lower manufacturing costs 9. Use jobset to generate the production files 10. Use LT3081 DPAK package for thermal dissipation 11. Add an additional parallel LT3045 LDOs for higher output current to the main board 12. Add Mechanical slot to relieve the mechanical stress and isolate the thermal of the voltage reference Reference: [ADI App Notes AN-82](https://www.analog.com/en/resources/app-notes/an-82f.html) 13. Add a heatspreader to the bottom of the board for better thermal dissipation 14. Add copper thieving patterns # Housekeeping Closes #29, #31, #32, #33, #35, #36, #37, #38, #39, #40, #41, #43, #45, #46, #47, #48, #49, #52, #54, #56, #57, #58, #59, #60, #61, #62, #63 # Related PR https://git.m-labs.hk/sinara-hw/kirdyAdapter/pulls/4
kirdy_top_view.png
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kirdy_bottom_view.png
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linuswck added 3 commits 2025-07-18 17:15:54 +08:00
Update flake for kicad 9 6cc0334a5b
Schematics done. Preliminary Layout Done ba40314d30
Finish layout 52a7efc0f5 
- Require touch up
- Remove potential tombstone effect on capacitor
- Update flake.nix
linuswck added 2 commits 2025-07-25 17:29:46 +08:00
Refine layout, Update 3D model & AUX PSU design 49dbfc0e47 
- Refine Kirdy Layout
- Update Front Panel 3D Model and add Freecad Design files
- Add AUX_PSU design files
Add CERN-OHL-S v2 d1dc688795
linuswck force-pushed v1_0 from d1dc688795 to dc4163cba8 2025-07-25 17:45:51 +08:00 Compare
linuswck added 1 commit 2025-07-25 19:30:54 +08:00
Add Heat Spreader to Kirdy Main Board 60dbd21e01 
- Kirdy Jobset will copy the heat spreader step file to "result" folder
linuswck added 1 commit 2025-07-29 16:54:36 +08:00
Cleanup, Fix BOM and Update 3D Model Path 8ee3078ee5
sb10q requested review from gkasprow 2025-07-29 22:17:42 +08:00
linuswck force-pushed v1_0 from 8ee3078ee5 to 61f724fbc1 2025-07-30 16:39:50 +08:00 Compare
linuswck force-pushed v1_0 from 61f724fbc1 to aa0bcde04b 2025-07-30 16:42:09 +08:00 Compare
linuswck added 2 commits 2025-07-30 18:57:45 +08:00
Update Heat Spreader design c7e8c93f3c 
- Keep it clear off the board edge after installation
Add Molex Minifit sym, fp & model, Update sch, pcb 473c88009c 
- Update copper thieving pattern
linuswck added 3 commits 2025-08-08 17:28:35 +08:00
Update heat_spreader hole position f53f863b74
pcb: DFM & add solder jumper to ILIM signal path 05dd566980 
- Add impedance Table
- Configuration of 3 Position solder jumper
    - LT3045 ILIM -> ADC (Default): Connected
    - LT3045 ILIM -> AUX_PSU (Default): Disconnected
rm duplicated flake 3aa217c294
linuswck added 1 commit 2025-08-08 18:04:38 +08:00
jobset: Plot F.Fab & B.Fab layers 04826cc44e
linuswck added 8 commits 2025-10-21 18:19:48 +08:00
AUX_PSU: LT3045 Use 0.3mm Thermal Vias for cost saving 936753c51b
sch,pcb: DFM ab4737bec9 
- Change incorrect P/N
- Add comments
- Update 3D model
optic_adapter_mounting_plate: define holes in thread dimensions dd122939c5
AUX_PSU: LT3045-1 -> LT3045 e609df42f6
AUX_PSU: Add fiducials marks cd6f67d03c
3D: Update front panel & heat spreader design 53c148a38c
flake update 0aa374e65f 
- update for kicad v9.0.5
- After kicad v9.0.3, env var $JOBSET_OUTPUT_WORK_PATH is added. This is useful for special command execution
Update JobSet eef64d6338
linuswck changed title from WIP: Kirdy Revision v1_0 to Kirdy Revision v1_0 2025-10-31 12:55:02 +08:00
linuswck merged commit eef64d6338 into master 2025-10-31 12:56:51 +08:00
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Reference: sinara-hw/kirdy#64
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