Kirdy Revision 0_3 #23
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Progress
- Update PDF Schematics- Add scripts to generate production file(Gerber, Drill, Drill Map, Component Placement File, Schematics PDF, Step 3D Model Files)nix build .
Related PR: sinara-hw/kirdyAdapter#1
Related New Repo: https://git.m-labs.hk/linuswck/KiCAD_BOM_Generator
Change Log:
Production Related Change:
PCB
Sch
BOM Related
Front Panel
Review Major Change:
Power Related
- Replace the input capacitors of LT304x LDOs with C0G/ low ESR Tantalum CapacitorUse C0G capacitors along the LD Drive Signal Path
Optimize the number of tantalum capacitors for lower cost
Delete redundant tantalum capacitors or Reposition the tantalum capacitors to the LT304x Input for lower microphonics- 9V output tantalum capacitors is replaced by multiple 22u ceramics
Add TAN Caps to all LT304x SET Pin
Replace the FB at -6V and +15V LDO input with a Pi LC LPF
Front Panel and Ports Alignment
Analog Related
Add alternate Footprint LTC6655 Vref IC
Add LPF and Buffer for TEC Driver VREF
Kirdy LD Adapter
MCU Extension Headers
Others
Major PCB Layout Changes
Routing of Mod_IN Signal is routed closer to the edge
Add Via Fencing to Mod_IN Signal
8V LDO circuitry is relocated due to the new mounting hole placement
part of then drive stage circuit is repositioned due to the placement of mounting hole
4.096 Vref IC for the LD Drive DAC is repositioned to create more distance from MCU signals
Add at least 1mm clearance between primary and secondary side of PoE
Relocate the programming HDRs to a more accessible place
General:
Python Scripts to Generate all Production Files
Usage
python -m scripts.generate_production_files.py
Footprint
Front Panel Design
Port the step file outline and dxf markings to Kicad Project
Change "fiber" to "laser"
Use a custom font Prison Gothic (Light) Font for all the non-logo text markings
Add a production folder storing the production files
Schematics:
Top
3D Model Overview:
Top:
Front Panel View:
DriveStage
PD TIA and LPF Stage uses TL082Hx
Add alternate precision power resistor for Drive Stage
Add a switch to 50Ohm termination to be enabled optionally for modulation signal
MCU
Add REF3033 Vref to MCU ADC Vref
Add 2.54mm pitch redundant programming header
Remove Ethernet PoE Reset as the PoE Power supply circuit is changed
digital supply
Add soft start to 12V Power Jack
Use a RJ45 PoE Jack without internal rectifier and connect it directly to PM1202
thermostat
Add alternate footprint for ADC
Change AD5680 DAC output range to 0-2V
Fix wrong TEC polarity
Fix wrong TEC Driver Current Sense Resistor MFR_PN
Modifications Observed on the Prototype board
Tune the V-I Amplifier Feedback path and LD- Out series RC network
Change the output 10Ohm power resistor to PDY10R000F
Ethernet Signals are being pulled up now instead of pulling down.
Parallel Capacitor at LD DAC Output Resistor
Modify the freq comp network of Buck converter to improve stability and transient response
Issues Fixed:
Close #10
Close #14
Close #15
Close #24
Close #25
Close #26
Close #27
Close #28
I don't think this is necessary.
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I meant using tantalum caps at the SET pin of LT304x. This is the most sensitive pin.
LT304x has quite good PSRR, but every noise on SET pin is amplified and present at the output.
Thank you. I get your point now.
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WIP: Kirdy Revision 3to Kirdy Revision 0_3Kirdy Revision 0_3to WIP: Kirdy Revision 0_3b52d6c7e34
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WIP: Kirdy Revision 0_3to Kirdy Revision 0_38ec2035c14
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