Schematics done. Preliminary Layout Done

This commit is contained in:
2025-07-10 19:35:18 +08:00
parent 6cc0334a5b
commit ba40314d30
42 changed files with 568249 additions and 324409 deletions

View File

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View File

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@@ -66,9 +69,11 @@
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View File

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@@ -110,24 +115,21 @@
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@@ -136,37 +138,76 @@
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@@ -214,8 +255,11 @@
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View File

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@@ -34,9 +37,9 @@
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@@ -46,7 +49,7 @@
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@@ -77,15 +80,20 @@
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@@ -95,9 +103,11 @@
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@@ -109,10 +119,13 @@
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@@ -124,21 +137,22 @@
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@@ -146,40 +160,44 @@
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@@ -188,11 +206,40 @@
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@@ -202,6 +249,10 @@
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@@ -210,6 +261,14 @@
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@@ -404,10 +463,15 @@
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"footprint_link_issues": "warning",
"four_way_junction": "ignore",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"label_multiple_wires": "warning",
"lib_symbol_issues": "warning",
"lib_symbol_mismatch": "warning",
"missing_bidi_pin": "warning",
"missing_input_pin": "warning",
"missing_power_pin": "error",
@@ -420,9 +484,14 @@
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"same_local_global_label": "warning",
"similar_label_and_power": "warning",
"similar_labels": "warning",
"similar_power": "warning",
"simulation_model_issue": "ignore",
"single_global_label": "ignore",
"unannotated": "error",
"unconnected_wire_endpoint": "warning",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
@@ -434,7 +503,7 @@
},
"meta": {
"filename": "kirdy.kicad_pro",
"version": 1
"version": 3
},
"net_settings": {
"classes": [
@@ -449,6 +518,7 @@
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 2147483647,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
@@ -466,6 +536,7 @@
"microvia_drill": 0.1,
"name": "POE_PWR",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 0,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
@@ -483,6 +554,7 @@
"microvia_drill": 0.1,
"name": "PWR",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"priority": 1,
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
@@ -491,10 +563,41 @@
}
],
"meta": {
"version": 3
"version": 4
},
"net_colors": null,
"netclass_assignments": null,
"netclass_assignments": {
"/Ehternet/PHY_NRST": [
"RMII"
],
"/Ehternet/RMII_CRS_DV": [
"RMII"
],
"/Ehternet/RMII_MDC": [
"RMII"
],
"/Ehternet/RMII_MDIO": [
"RMII"
],
"/Ehternet/RMII_REF_CLK": [
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],
"/Ehternet/RMII_RXD0": [
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],
"/Ehternet/RMII_RXD1": [
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],
"/Ehternet/RMII_TXD0": [
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],
"/Ehternet/RMII_TXD1": [
"RMII"
],
"/Ehternet/RMII_TX_EN": [
"RMII"
]
},
"netclass_patterns": [
{
"netclass": "POE_PWR",
@@ -523,14 +626,143 @@
"gencad": "",
"idf": "",
"netlist": "",
"plot": "",
"pos_files": "",
"specctra_dsn": "",
"step": "kirdy.step",
"svg": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"annotate_start_num": 0,
"bom_export_filename": "${PROJECTNAME}.csv",
"bom_fmt_presets": [],
"bom_fmt_settings": {
"field_delimiter": ",",
"keep_line_breaks": false,
"keep_tabs": false,
"name": "CSV",
"ref_delimiter": ",",
"ref_range_delimiter": "",
"string_delimiter": "\""
},
"bom_presets": [],
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{
"group_by": false,
"label": "Reference",
"name": "Reference",
"show": true
},
{
"group_by": true,
"label": "Value",
"name": "Value",
"show": true
},
{
"group_by": true,
"label": "Footprint",
"name": "Footprint",
"show": true
},
{
"group_by": false,
"label": "Datasheet",
"name": "Datasheet",
"show": true
},
{
"group_by": false,
"label": "Description",
"name": "Description",
"show": false
},
{
"group_by": false,
"label": "Qty",
"name": "${QUANTITY}",
"show": true
},
{
"group_by": false,
"label": "#",
"name": "${ITEM_NUMBER}",
"show": false
},
{
"group_by": false,
"label": "Comment",
"name": "Comment",
"show": false
},
{
"group_by": false,
"label": "MFR_ALT",
"name": "MFR_ALT",
"show": false
},
{
"group_by": false,
"label": "MFR_PN",
"name": "MFR_PN",
"show": false
},
{
"group_by": false,
"label": "MFR_PN_ALT",
"name": "MFR_PN_ALT",
"show": false
},
{
"group_by": false,
"label": "MFT_PN_ALT",
"name": "MFT_PN_ALT",
"show": false
},
{
"group_by": false,
"label": "Sim.Device",
"name": "Sim.Device",
"show": false
},
{
"group_by": false,
"label": "Sim.Pins",
"name": "Sim.Pins",
"show": false
},
{
"group_by": true,
"label": "DNP",
"name": "${DNP}",
"show": true
},
{
"group_by": true,
"label": "Exclude from BOM",
"name": "${EXCLUDE_FROM_BOM}",
"show": true
},
{
"group_by": true,
"label": "Exclude from Board",
"name": "${EXCLUDE_FROM_BOARD}",
"show": true
}
],
"filter_string": "",
"group_symbols": true,
"include_excluded_from_bom": true,
"name": "",
"sort_asc": true,
"sort_field": "Reference"
},
"connection_grid_size": 50.0,
"drawing": {
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@@ -544,6 +776,11 @@
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.375,
"operating_point_overlay_i_precision": 3,
"operating_point_overlay_i_range": "~A",
"operating_point_overlay_v_precision": 3,
"operating_point_overlay_v_range": "~V",
"overbar_offset_ratio": 1.23,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.15
},
@@ -564,11 +801,13 @@
},
"page_layout_descr_file": "",
"plot_directory": "sch/",
"space_save_all_events": true,
"spice_adjust_passive_values": false,
"spice_current_sheet_as_root": false,
"spice_external_command": "spice \"%I\"",
"spice_model_current_sheet_as_root": true,
"spice_save_all_currents": false,
"spice_save_all_dissipations": false,
"spice_save_all_voltages": false,
"subpart_first_id": 65,
"subpart_id_separator": 0
@@ -576,7 +815,7 @@
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View File

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(module "SOP50P490X110-10N" (layer F.Cu)
(descr "TS5A23159DGSR-1")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "SOP50P490X110-10N" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -3.15 -1.8) (end 3.15 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.15 -1.8) (end 3.15 1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.15 1.8) (end -3.15 1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.15 1.8) (end -3.15 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 -1.5) (end 1.5 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 -1.5) (end 1.5 1.5) (layer F.Fab) (width 0.1))
(fp_line (start 1.5 1.5) (end -1.5 1.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 1.5) (end -1.5 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 -1) (end -1 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -1.15 -1.5) (end 1.15 -1.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.15 -1.5) (end 1.15 1.5) (layer F.SilkS) (width 0.2))
(fp_line (start 1.15 1.5) (end -1.15 1.5) (layer F.SilkS) (width 0.2))
(fp_line (start -1.15 1.5) (end -1.15 -1.5) (layer F.SilkS) (width 0.2))
(fp_line (start -2.9 -1.5) (end -1.5 -1.5) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -2.2 -1 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -2.2 -0.5 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -2.2 0 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -2.2 0.5 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.2 1 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 2.2 1 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 2.2 0.5 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 2.2 0 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 2.2 -0.5 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 2.2 -1 90) (size 0.3 1.4) (layers F.Cu F.Paste F.Mask))
(model TS5A23159DGSR.stp
(at (xyz 0 0 0.027165354236843))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 -90))
)
)

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@@ -0,0 +1,38 @@
(module "SOT95P280X145-5N" (layer F.Cu)
(descr "DBV0005A")
(tags "Integrated Circuit")
(attr smd)
(fp_text reference IC** (at 0 0) (layer F.SilkS)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_text value "SOT95P280X145-5N" (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.27 1.27) (thickness 0.254)))
)
(fp_line (start -2.1 -1.775) (end 2.1 -1.775) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.1 -1.775) (end 2.1 1.775) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.1 1.775) (end -2.1 1.775) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.1 1.775) (end -2.1 -1.775) (layer F.CrtYd) (width 0.05))
(fp_line (start -0.8 -1.45) (end 0.8 -1.45) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -1.45) (end 0.8 1.45) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 1.45) (end -0.8 1.45) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 1.45) (end -0.8 -1.45) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.5) (end 0.15 -1.45) (layer F.Fab) (width 0.1))
(fp_line (start -0.3 -1.45) (end 0.3 -1.45) (layer F.SilkS) (width 0.2))
(fp_line (start 0.3 -1.45) (end 0.3 1.45) (layer F.SilkS) (width 0.2))
(fp_line (start 0.3 1.45) (end -0.3 1.45) (layer F.SilkS) (width 0.2))
(fp_line (start -0.3 1.45) (end -0.3 -1.45) (layer F.SilkS) (width 0.2))
(fp_line (start -1.85 -1.5) (end -0.65 -1.5) (layer F.SilkS) (width 0.2))
(pad 1 smd rect (at -1.25 -0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -1.25 0 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -1.25 0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 1.25 0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 1.25 -0.95 90) (size 0.6 1.2) (layers F.Cu F.Paste F.Mask))
(model TS12A4516DBVR.stp
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@@ -1,76 +1,366 @@
(footprint "VPR221_Horizontal" (version 20221018) (generator pcbnew)
(layer "F.Cu")
(attr through_hole)
(fp_text reference "REF**" (at 3.81 -23.42) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp cd59375d-9055-4dc3-bdd7-7cd89c1487b3)
)
(fp_text value "VPR221_Horizontal" (at 3.81 2) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp e5043a76-4e11-4140-b80b-bc311cdd8dd0)
)
(fp_text user "${REFERENCE}" (at 3.81 -23.42) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp f501908f-978e-4a4d-b027-ed72be7b9352)
)
(fp_line (start -1.31 -22.42) (end -1.31 -6.53)
(stroke (width 0.12) (type solid)) (layer "F.SilkS") (tstamp ef5e1460-7abf-44fb-b2e2-0bf72ef2dcdd))
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(model "${KIPRJMOD}/kirdy.pretty/VPR221_Horizontal.step"
(offset (xyz 3.75 14.5 0))
(scale (xyz 1 1 1))
(rotate (xyz -90 0 0))
)
(footprint "VPR221_Horizontal"
(version 20241229)
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