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topquark12 6 months ago
parent 70f9425cad
commit 0f59b6aa38
  1. 25
      .gitignore
  2. 2
      kirdy.kicad_pcb
  3. 61
      kirdy.kicad_pro
  4. 5
      kirdy.kicad_sch

25
.gitignore vendored

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# For PCBs designed using KiCad: https://www.kicad.org/
# Format documentation: https://kicad.org/help/file-formats/
# Temporary files
*.000
*.bak
*.bck
*.kicad_pcb-bak
*.kicad_sch-bak
*-backups
*.kicad_prl
*.sch-bak
*~
_autosave-*
*.tmp
*-save.pro
*-save.kicad_pcb
fp-info-cache
# Netlist files (exported from Eeschema)
*.net
# Autorouter files (exported from Pcbnew)
*.dsn
*.ses

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(kicad_pcb (version 20211014) (generator pcbnew)
)

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{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.1,
"copper_line_width": 0.2,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"other_line_width": 0.15,
"silk_line_width": 0.15,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"rules": {
"min_copper_edge_clearance": 0.0,
"solder_mask_clearance": 0.0,
"solder_mask_min_width": 0.0
},
"track_widths": [],
"via_dimensions": []
}
},
"boards": [],
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "kicad.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"nets": [],
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4
}
],
"meta": {
"version": 0
}
},
"pcbnew": {
"page_layout_descr_file": ""
},
"sheets": [],
"text_variables": {}
}

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(kicad_sch (version 20211123) (generator eeschema)
(paper "A4")
(lib_symbols)
(symbol_instances)
)
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