639 lines
30 KiB
TeX
639 lines
30 KiB
TeX
\documentclass[10pt]{datasheet}
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\usepackage{palatino}
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\usepackage{textgreek}
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\usepackage{minted}
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\usepackage{tcolorbox}
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\usepackage{etoolbox}
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\usepackage[justification=centering]{caption}
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\usepackage[utf8]{inputenc}
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\usepackage[english]{babel}
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\usepackage[english]{isodate}
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\usepackage{graphicx}
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\usepackage{subfig}
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\usepackage{tikz}
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\usepackage{pgfplots}
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\usepackage{circuitikz}
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\usepackage{pifont}
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\usetikzlibrary{calc}
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\usetikzlibrary{fit,backgrounds}
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\title{2118 BNC-TTL / 2128 SMA-TTL}
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\author{M-Labs Limited}
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\date{January 2022}
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\revision{Revision 2}
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\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
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\begin{document}
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\maketitle
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\section{Features}
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\begin{itemize}
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\item{8 channels.}
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\item{Input and output capable.}
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\item{Galvanically isolated.}
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\item{3ns minimum pulse width.}
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\item{BNC or SMA connectors.}
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\end{itemize}
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\section{Applications}
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\begin{itemize}
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\item{Photon counting.}
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\item{External equipment trigger.}
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\item{Optical shutter control.}
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\end{itemize}
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\section{General Description}
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The 2118 BNC-TTL card is a 8hp EEM module, while the 2128 SMA-TTL card is a 4hp EEM module.
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Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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Each card provides two banks of four digital channels each, with BNC (2118) or SMA (2128) connectors.
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Each bank has individual ground isolation.
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The direction (input or output) of each bank can be selected using DIP switches.
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Each channel supports 50\textOmega~terminations individually controllable using DIP switches.
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Outputs tolerate short circuits indefinitely.
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The card support a minimum pulse width of 3ns.
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% Switch to next column
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\vfill\break
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\newcommand*{\MyLabel}[3][2cm]{\parbox{#1}{\centering #2 \\ #3}}
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\newcommand*{\MymyLabel}[3][4cm]{\parbox{#1}{\centering #2 \\ #3}}
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\newcommand{\repeatfootnote}[1]{\textsuperscript{\ref{#1}}}
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\newcommand{\inputcolorboxminted}[2]{%
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\begin{tcolorbox}[colback=white]
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\inputminted[#1, gobble=4]{python}{#2}
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\end{tcolorbox}
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}
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\begin{figure}[h]
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\centering
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\scalebox{0.88}{
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\begin{circuitikz}[european, scale=0.95, every label/.append style={align=center}]
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\begin{scope}[yshift=1.3cm]
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\draw[color=white, text=black] (-0.1,0) node[twoportshape,t={IO 0}, circuitikz/bipoles/twoport/width=1.2, scale=0.4] (io0) {};
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\draw[color=white, text=black] (-0.1,-0.7) node[twoportshape,t={IO 1}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io1) {};
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\draw[color=white, text=black] (-0.1,-1.4) node[twoportshape,t={IO 2}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io2) {};
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\draw[color=white, text=black] (-0.1,-2.1) node[twoportshape,t={IO 3}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io3) {};
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\node [label={[xshift=-0.18cm, yshift=-0.305cm]\tiny{IO 0}}] {};
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\node [label={[xshift=-0.18cm, yshift=-0.97cm]\tiny{IO 1}}] {};
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\node [label={[xshift=-0.18cm, yshift=-1.64cm]\tiny{IO 2}}] {};
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\node [label={[xshift=-0.18cm, yshift=-2.302cm]\tiny{IO 3}}] {};
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% draw female SMA_0,1,2,3
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\begin{scope}[scale=0.07 , rotate=-90, xshift=0cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=10cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=20cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=30cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\draw (1.6,-1.05) node[twoportshape,t={IO Bus Transceiver}, circuitikz/bipoles/twoport/width=2.5, scale=0.7, rotate=-90 ] (bus1) {};
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\draw (3.05,-0) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso1) {};
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\draw (3.05,-0.7) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso2) {};
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\draw (3.05,-1.4) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso3) {};
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\draw (3.05,-2.1) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso4) {};
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\draw (3.05,-2.7) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (i2ciso1) {};
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\draw (4.5,-1.15) node[twoportshape,t=\MymyLabel{4-Channel LVDS}{Line Transceiver}, circuitikz/bipoles/twoport/width=2.6, scale=0.7, rotate=-90] (lvds1) {};
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\draw (6.8,-0.9) -- ++(0.00001,0) node[twoportshape, anchor=left, t={EEM port}, circuitikz/bipoles/twoport/width=6, scale=0.6, rotate=-90] (kasli) {} ;
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\draw (0.8,-3.5) node[twoportshape,t=\MymyLabel{Per-bank \phantom{spac} }{Input/Output Switch}, circuitikz/bipoles/twoport/width=2.7, scale=0.44] (ioswitch) {};
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\draw (3.05,-3.5) node[twoportshape,t=\MymyLabel{IO Expander}{for I2C Bus}, circuitikz/bipoles/twoport/width=1.8, scale=0.5] (i2c) {};
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\draw (5.68,-2.3) node[twoportshape,t=EEPROM, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (eeprom) {};
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\draw (0.8,-2.7) node[twoportshape,t=\MymyLabel{High-Z/50\textOmega}{Switch \phantom{ssssss} }, circuitikz/bipoles/twoport/width=2, scale=0.4] (termswitch1) {};
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% Termination Switch 1,2,3,4
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\begin{scope}[xshift=0.9cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1.1cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1.2cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\end{scope}
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% I/O Switch 1, 2
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\begin{scope}[xshift=1.2cm, yshift=-1.98cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1.32cm, yshift=-1.98cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\draw (0.8,-3.05) node[twoportshape,t=\MymyLabel{High-Z/50\textOmega}{Switch \phantom{ssssss} }, circuitikz/bipoles/twoport/width=2, scale=0.4] (termswitch2) {};
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% Termination Switch 5,6,7,8
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\begin{scope}[xshift=0.9cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1.1cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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\begin{scope}[xshift=1.2cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\end{scope}
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% channel 5,6,7,8
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\begin{scope}[yshift=-3.6cm]
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\draw[color=white, text=black] (-0.1,0) node[twoportshape,t={IO 4}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io4) {};
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\draw[color=white, text=black] (-0.1,-0.7) node[twoportshape,t={IO 5}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io5) {};
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\draw[color=white, text=black] (-0.1,-1.4) node[twoportshape,t={IO 6}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io6) {};
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\draw[color=white, text=black] (-0.1,-2.1) node[twoportshape,t={IO 7}, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io7) {};
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\node [label={[xshift=-0.18cm, yshift=-0.305cm]\tiny{IO 4}}] {};
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\node [label={[xshift=-0.18cm, yshift=-0.97cm]\tiny{IO 5}}] {};
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\node [label={[xshift=-0.18cm, yshift=-1.64cm]\tiny{IO 6}}] {};
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\node [label={[xshift=-0.18cm, yshift=-2.302cm]\tiny{IO 7}}] {};
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% draw female SMA 4,5,6,7
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\begin{scope}[scale=0.07 , rotate=-90, xshift=0cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=10cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=20cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\begin{scope}[scale=0.07 , rotate=-90, xshift=30cm, yshift=2cm]
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\draw (0,0.65) -- (0,3);
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\clip (-1.5,0) rectangle (1.5,1.5);
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\draw (0,0) circle(1.5);
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\clip (-0.8,0) rectangle (0.8,0.8);
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\draw (0,0) circle(0.8);
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\end{scope}
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\draw (1.6,-1.05) node[twoportshape,t={IO Bus Transceiver}, circuitikz/bipoles/twoport/width=2.5, scale=0.7, rotate=-90 ] (bus2) {};
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\draw (3.05,-0) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso5) {};
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\draw (3.05,-0.7) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso6) {};
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\draw (3.05,-1.4) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso7) {};
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\draw (3.05,-2.1) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso8) {};
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\draw (3.05,0.6) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (i2ciso2) {};
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\draw (4.5,-1.05) node[twoportshape,t=\MymyLabel{4-Channel LVDS}{Line Transceiver}, circuitikz/bipoles/twoport/width=2.6, scale=0.7, rotate=-90] (lvds2) {};
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\end{scope}
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% Drawing Connections
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\draw [latexslim-latexslim] (io0.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io1.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io2.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io3.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io4.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io5.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io6.east) -- ++(1,0);
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\draw [latexslim-latexslim] (io7.east) -- ++(1,0);
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\draw [latexslim-latexslim] (iso1.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso2.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso3.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso4.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso1.east) -- ++(0.69,0);
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\draw [latexslim-latexslim] (iso2.east) -- ++(0.69,0);
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\draw [latexslim-latexslim] (iso3.east) -- ++(0.69,0);
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\draw [latexslim-latexslim] (iso4.east) -- ++(0.69,0);
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\draw [latexslim-latexslim] (iso5.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso6.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso7.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso8.west) -- ++(-0.72,0) ;
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\draw [latexslim-latexslim] (iso5.east) -- ++(0.7,0);
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\draw [latexslim-latexslim] (iso6.east) -- ++(0.7,0);
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\draw [latexslim-latexslim] (iso7.east) -- ++(0.7,0);
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\draw [latexslim-latexslim] (iso8.east) -- ++(0.7,0);
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\draw [latexslim-] (eeprom.south) -- ++(0,-0.95);
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\draw [latexslim-latexslim] (lvds1.north) -- ++(1.61,0);
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\draw [latexslim-latexslim] (lvds2.north) -- ++(1.62,0);
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\draw [latexslim-latexslim] (i2c.east) -- ++(2.77,0);
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\draw [latexslim-] (i2c.west) -- (ioswitch.east) ;
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\draw [-latexslim] (i2c.north east) -- (lvds1.south east);
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\draw [-latexslim] (i2c.south east) -- (lvds2.south west);
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\draw [-latexslim] (i2ciso1.west) -- (bus1.north east);
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\draw [thin] [-latexslim] (i2c.north) -- (i2ciso1.south);
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\draw [-latexslim] (i2ciso2.west) -- (bus2.north west);
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\draw [thin] [-latexslim] (i2c.south) -- (i2ciso2.north);
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% termination switch connection
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\draw (0.65,-1.18) -- ++(0,2.47) ;
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\draw (0.75,-1.18) -- ++(0,1.77) ;
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\draw (0.85,-1.18) -- ++(0,1.07) ;
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\draw (0.95,-1.18) -- ++(0,0.37) ;
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\draw (0.65,-3.25) -- ++(0,-2.45) ;
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\draw (0.75,-3.25) -- ++(0,-1.75) ;
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\draw (0.85,-3.25) -- ++(0,-1.05) ;
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\draw (0.95,-3.25) -- ++(0,-0.35) ;
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\node[draw, dotted, thick, rounded corners, inner xsep=0.7em, inner ysep=0.4em, fit=(io0) (i2ciso1.south west)] (box1) {};
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\node[fill=white, rotate=-90] at (box1.west) {GND BANK 1};
|
|
\node[fill=white,above] at (box1.north) {\tiny{Either all 4 channels are inputs or all 4 channels are outputs }};
|
|
|
|
|
|
\node[draw, dotted, thick, rounded corners, inner xsep=0.7em, inner ysep=0.4em, fit=(io4)(termswitch2) (iso8.south west)] (box2) {};
|
|
\node[fill=white, rotate=-90] at (box2.west) {GND BANK 2};
|
|
\node[fill=white,below] at (box2.south) {\tiny{Either all 4 channels are inputs or all 4 channels are outputs }};
|
|
|
|
\end{circuitikz}
|
|
}
|
|
|
|
\caption{Simplified Block Diagram}
|
|
\end{figure}
|
|
|
|
\begin{figure}[hbt!]
|
|
\centering
|
|
\subfloat[\centering BNC-TTL]{{
|
|
\includegraphics[height=1.8in]{DIO_BNC_FP.jpg}
|
|
\includegraphics[height=1.8in]{photo2118.jpg}
|
|
}}%
|
|
\subfloat[\centering SMA-TTL]{{
|
|
\includegraphics[height=1.8in]{DIO_SMA_FP.jpg}
|
|
\includegraphics[height=1.8in]{photo2128.jpg}
|
|
}}%
|
|
\caption{BNC-TTL/SMA-TTL Card photos}%
|
|
\label{fig:example}%
|
|
\end{figure}
|
|
|
|
% For wide tables, a single column layout is better. It can be switched
|
|
% page-by-page.
|
|
\onecolumn
|
|
|
|
\section{Electrical Specifications}
|
|
All specifications are in $0\degree C \leq T_A \leq 70\degree C$ unless otherwise noted.
|
|
Specifications are based on the bus transceivers IC (SN74BCT25245DW\footnote{\label{transceiver}https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf})
|
|
and the isolator IC (SI8651BB-B-IS1\footnote{\label{isolator}https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf}).
|
|
The typical value of minimum pulse width is based on test results\footnote{\label{sinara187}https://github.com/sinara-hw/sinara/issues/187}.
|
|
|
|
\begin{table}[h]
|
|
\begin{threeparttable}
|
|
\caption{Recommended Operating Conditions}
|
|
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
|
|
\thickhline
|
|
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
|
|
\textbf{Unit} & \textbf{Conditions} \\
|
|
\hline
|
|
High-level input voltage\repeatfootnote{transceiver} & $V_{IH}$ & 2 & & 5.5* & V & \\
|
|
\hline
|
|
Low-level input voltage\repeatfootnote{transceiver} & $V_{IL}$ & -0.5 & & 0.8 & V & \\
|
|
\hline
|
|
Input clamp current\repeatfootnote{transceiver} & $I_{OH}$ & & & -18 & mA & termination disabled \\
|
|
\hline
|
|
High-level output current\repeatfootnote{transceiver} & $I_{OH}$ & & & -160 & mA & \\
|
|
\hline
|
|
Low-level output current\repeatfootnote{transceiver} & $I_{OL}$ & & & 376 & mA & \\
|
|
\thickhline
|
|
\multicolumn{7}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
|
|
\end{tabularx}
|
|
\end{threeparttable}
|
|
\end{table}
|
|
|
|
\begin{table}[h]
|
|
\begin{threeparttable}
|
|
\caption{Electrical Characteristics}
|
|
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
|
|
\thickhline
|
|
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
|
|
\textbf{Unit} & \textbf{Conditions} \\
|
|
\hline
|
|
High-level output voltage\repeatfootnote{transceiver} & $V_{OH}$ & 2 & & & V & $I_{OH}$=-160mA \\
|
|
& & 2.7 & & & V & $I_{OH}$=-6mA \\
|
|
\hline
|
|
Low-level output voltage\repeatfootnote{transceiver} & $V_{OL}$ & & 0.42 & 0.55 & V & $I_{OL}$=188mA \\
|
|
& & & & 0.7 & V & $I_{OL}$=376mA \\
|
|
\hline
|
|
Minimum pulse width\repeatfootnote{isolator}\textsuperscript{,}\repeatfootnote{sinara187} & & & 3 & 5 & ns & \\
|
|
\hline
|
|
Pulse width distortion\repeatfootnote{isolator} & $PWD$ & & 0.2 & 4.5 & ns & \\
|
|
\hline
|
|
Peak jitter\repeatfootnote{isolator} & $T_{JIT(PK)}$ & & 350 & & ps & \\
|
|
\hline
|
|
Data rate\repeatfootnote{isolator} & & 0 & & 150 & Mbps & \\
|
|
\thickhline
|
|
\end{tabularx}
|
|
\end{threeparttable}
|
|
\end{table}
|
|
|
|
\newpage
|
|
|
|
Minimum pulse width was measured\repeatfootnote{sinara187}.
|
|
Pulses were generated from a DDS generator as an input of a BNC-TTL card.
|
|
The input BNC-TTL card is connected to another BNC-TTL card as an output.
|
|
The output signal is measured and shown.
|
|
|
|
\begin{figure}[h]
|
|
\centering
|
|
\includegraphics[height=3in]{bnc_ttl_min_pulse_width.png}
|
|
\caption{Minimum pulse width required for BNC-TTL card}
|
|
\end{figure}
|
|
|
|
The red trace refers to the input pulses from the DDS generator, while the blue trace is the measured signal from the output BNC-TTL card.
|
|
Note that the first input (red) pulse could not propagate through the signal chain.
|
|
The first output (blue) pulse is the result of the second input (red, 3ns width) pulse.
|
|
|
|
\newpage
|
|
|
|
\section{Front Panel Drawings}
|
|
|
|
\begin{multicols}{2}
|
|
\begin{center}
|
|
\centering
|
|
\includegraphics[height=2.8in]{bnc_ttl_drawings.pdf}
|
|
\captionof{figure}{2118 BNC-TTL front panel drawings}
|
|
\end{center}
|
|
|
|
\columnbreak
|
|
|
|
\begin{center}
|
|
\centering
|
|
\includegraphics[height=2.8in]{bnc_ttl_assembly.pdf}
|
|
\captionof{figure}{2118 BNC-TTL front panel assembly}
|
|
\end{center}
|
|
\end{multicols}
|
|
|
|
\begin{multicols}{2}
|
|
\begin{center}
|
|
\captionof{table}{Bill of Material (2118 Standalone)}
|
|
\tiny
|
|
\begin{tabular}{|c|c|c|c|}
|
|
\hline
|
|
Index & Part No. & Qty & Description \\ \hline
|
|
1 & 90560220 & 1 & FP-FRONT PANEL, EXTRUDED, TYPE 2, STATIC, 3Ux8HP \\ \hline
|
|
2 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
|
3 & 3020716 & 0.04 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
|
\end{tabular}
|
|
\end{center}
|
|
|
|
\columnbreak
|
|
|
|
\begin{center}
|
|
\captionof{table}{Bill of Material (2118 Standalone)}
|
|
\tiny
|
|
\begin{tabular}{|c|c|c|c|}
|
|
\hline
|
|
Index & Part No. & Qty & Description \\ \hline
|
|
1 & 90457987 & 4 & CSCR M2.5*12.3 PAN PHL SS \\ \hline
|
|
2 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
|
3 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
|
4 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
|
5 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
|
|
6 & 3040005 & 1 & HANDLE 8HP GREY PLASTIC \\ \hline
|
|
7 & 3207076 & 0.01 & SCR M2.5*16 PAN 100 21101-222 \\ \hline
|
|
8 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
|
9 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
|
10 & 3201130 & 0.01 & NUT M2.5 HEX ST NI KIT(100PCS) \\ \hline
|
|
11 & 90560220 & 1 & FP-LYKJ 3U8HP PANEL \\ \hline
|
|
\end{tabular}
|
|
\end{center}
|
|
\end{multicols}
|
|
|
|
\begin{multicols}{2}
|
|
\begin{center}
|
|
\centering
|
|
\includegraphics[height=3in]{sma_ttl_drawings.pdf}
|
|
\captionof{figure}{2128 SMA-TTL front panel drawings}
|
|
\end{center}
|
|
|
|
\columnbreak
|
|
|
|
\begin{center}
|
|
\centering
|
|
\includegraphics[height=3in]{sma_ttl_assembly.pdf}
|
|
\captionof{figure}{2128 SMA-TTL front panel assembly}
|
|
\end{center}
|
|
\end{multicols}
|
|
|
|
\begin{multicols}{2}
|
|
\begin{center}
|
|
\captionof{table}{Bill of Material (2128 Standalone)}
|
|
\tiny
|
|
\begin{tabular}{|c|c|c|c|}
|
|
\hline
|
|
Index & Part No. & Qty & Description \\ \hline
|
|
1 & 90531967 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
|
|
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
|
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
|
\end{tabular}
|
|
\end{center}
|
|
|
|
\columnbreak
|
|
|
|
\begin{center}
|
|
\captionof{table}{Bill of Material (2128 Assembled)}
|
|
\tiny
|
|
\begin{tabular}{|c|c|c|c|}
|
|
\hline
|
|
Index & Part No. & Qty & Description \\ \hline
|
|
1 & 90531967 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
|
|
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
|
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
|
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
|
5 & 3001012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
|
|
6 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
|
7 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
|
8 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
|
9 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
|
|
\end{tabular}
|
|
\end{center}
|
|
\end{multicols}
|
|
|
|
\section{Configuring IO Direction \& Termination}
|
|
The termination and IO direction can be configured by switches.
|
|
The per-channel termination and per-bank IO direction switches are found at the middle-left and middle-right of both cards respectively.
|
|
|
|
Termination switches selects the termination of each channel, between high impedence (OFF) and 50\textOmega~(ON).
|
|
|
|
IO direction switches partly decides the IO direction of each bank.
|
|
\begin{itemize}
|
|
\itemsep0em
|
|
\item Closed switch (ON) \\
|
|
Fix the corresponding bank to output. The direction cannot be changed by I\textsuperscript{2}C.
|
|
\item Opened switch (OFF) \\
|
|
Switch to input mode. The direction is input by default. Configurable by I\textsuperscript{2}C.
|
|
\end{itemize}
|
|
|
|
\begin{figure}[hbt!]
|
|
\centering
|
|
\subfloat[\centering BNC-TTL]{{
|
|
\includegraphics[height=1.5in]{bnc_ttl_switches.jpg}
|
|
}}%
|
|
\subfloat[\centering SMA-TTL]{{
|
|
\includegraphics[height=1.5in]{sma_ttl_switches.jpg}
|
|
}}%
|
|
\caption{Position of switches}%
|
|
\end{figure}
|
|
|
|
\newpage
|
|
\section{Example ARTIQ code}
|
|
The sections below demonstrate simple usage scenarios of the 2118 BNC-TTL/2128 SMA-TTL card with the ARTIQ control system.
|
|
They do not exhaustively demonstrate all the features of the ARTIQ system.
|
|
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
|
|
|
|
Timing accuracy in the examples below is well under 1 nanosecond thanks to the ARTIQ RTIO system.
|
|
|
|
\subsection{One pulse per second}
|
|
The channel should be configured as output in both the gateware and hardware.
|
|
\inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py}
|
|
|
|
\subsection{Morse code}
|
|
This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
|
|
\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
|
|
|
|
\newpage
|
|
\subsection{Sub-coarse-RTIO-cycle pulse}
|
|
With the use of the ARTIQ RTIO, only 1 event can be enqueued per coarse RTIO cycle, which is typically 8ns.
|
|
Therefore, to emit a pulse that is less than 8ns, additional delay is needed such that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted at different coarse RTIO cycles.
|
|
The TTL pulse must satisfy the minimum pulse width stated in the electircal specifications.
|
|
|
|
\inputcolorboxminted{firstline=60,lastline=64}{examples/ttl.py}
|
|
|
|
\subsection{Edge counting in a 1ms window}
|
|
The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gate\char`_falling()} \& \texttt{gate\char`_both()} for rising edge, falling edge, both rising edge \& falling edge detection respectively.
|
|
The channel should be configured as input in both the gateware and hardware. Invoke one of the 3 methods to start edge detection.
|
|
\inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
|
|
Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
|
|
\inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
|
|
The detected edges are registered to the RTIO input FIFO. By default, the FIFO can hold 64 events. The FIFO depth is defined by the \texttt{ififo\char`_depth} parameter for \texttt{Channel} class in \texttt{rtio/channel.py}.
|
|
Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
|
|
Finally, invoke \texttt{count()} to retrieve the edge count from the input gate.
|
|
|
|
The RTIO system can report at most 1 edge detection event for every coarse RTIO cycle.
|
|
For example, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is 1 coarse RTIO cycle (typically 8 ns) with consideration of the RTIO specification alone.
|
|
However, both the electircal specifications and the possibility of triggering \texttt{RTIOOverflow} should be considered.
|
|
|
|
\newpage
|
|
\subsection{Edge counting using \texttt{EdgeCounter}}
|
|
This example code uses the gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second.
|
|
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
|
|
\inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
|
|
Edges are detected by comparing the current input state and that of the previous coarse RTIO cycle.
|
|
Therefore, the theoretical minimum separation between 2 opposite edges is 1 coarse RTIO cycle (typically 8 ns).
|
|
|
|
\subsection{Responding to an external trigger}
|
|
One channel needs to be configured as input, and the other as output.
|
|
\inputcolorboxminted{firstline=45,lastline=51}{examples/ttl_in.py}
|
|
|
|
\subsection{62.5 MHz clock signal generation}
|
|
A TTL channel can be configured as a \texttt{ClockGen} channel, which generates a periodic clock signal.
|
|
Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle.
|
|
Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2. \\
|
|
|
|
Typically, with the coarse RTIO clock at 125 MHz, a \texttt{ClockGen} channel can generate up to 62.5 MHz.
|
|
|
|
\inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py}
|
|
|
|
\newpage
|
|
\subsection{Minimum Sustained Event Separation}
|
|
The minimum sustained event separation is the least amount of time separation between input gated events, in which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions.
|
|
The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
|
|
|
|
\inputcolorboxminted{firstline=63,lastline=98}{examples/ttl_in.py}
|
|
|
|
\begin{center}
|
|
\begin{table}[H]
|
|
\captionof{table}{Minimum sustained event separation of different carrier}
|
|
\centering
|
|
\begin{tabular}{|c|c|c|}
|
|
\hline
|
|
Carrier & Kasli v1.1 & Kasli-SoC \\ \hline
|
|
Duration & 650 ns & 600 ns \\ \hline
|
|
\end{tabular}
|
|
\end{table}
|
|
\end{center}
|
|
|
|
\section{Ordering Information}
|
|
To order, please visit \url{https://m-labs.hk} and select the 2118 BNC-TTL/2128 SMA-TTL in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
|
|
|
\section*{}
|
|
\vspace*{\fill}
|
|
|
|
\begin{footnotesize}
|
|
Information furnished by M-Labs Limited is provided in good faith in the hope that it will be useful. However, no responsibility is assumed by M-Labs Limited for its use. Specifications may be subject to change without notice.
|
|
\end{footnotesize}
|
|
|
|
\end{document}
|