2118-2128.tex

@@ -4,7 +4,7 @@
 \title{2118 BNC-TTL / 2128 SMA-TTL}
 \author{M-Labs Limited}
 \date{January 2022}
-\revision{Revision 3}
+\revision{Revision 2}
 \companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
 
 \begin{document}
@@ -36,7 +36,7 @@
 
 Each channel supports 50\textOmega~terminations, individually controllable using DIP switches. Outputs tolerate short circuits indefinitely. Both cards are capable of a minimum pulse width of 3ns.
 
-    Isolated TTL cards are not well suited to low-noise or low-jitter applications due to interference from isolation components. For low-noise applications, use non-isolated cards such as 2238 MCX-TTL or 2245 LVDS-TTL.
+Note that isolated TTL cards are less suited to low-noise applications as the isolator itself injects noise between primary and secondary sides. Cable shields may also radiate EMI from the isolated grounds. For low-noise applications, use non-isolated cards such as 2238 MCX-TTL or 2245 LVDS-TTL.
 
 % Switch to next column
 \vfill\break
@@ -295,11 +295,11 @@
 \begin{figure}[hbt!]
     \centering
     \includegraphics[height=1.8in]{photo2118-2128.jpg }
-    \caption{BNC-TTL and SMA-TTL cards}
-    \includegraphics[angle=90, height=0.7in]{fp2118.jpg}
-    \includegraphics[angle=90, height=0.4in]{fp2128.jpg}
-    \caption{BNC-TTL and SMA-TTL front panels}
-    \label{fig:example}
+    \caption{BNC-TTL and SMA-TTL cards}%
+    \includegraphics[angle=90, height=0.7in]{DIO_BNC_FP.jpg}
+    \includegraphics[angle=90, height=0.4in]{DIO_SMA_FP.jpg}
+    \caption{BNC-TTL and SMA-TTL front panels}%
+    \label{fig:example}%
 \end{figure}
 
 \onecolumn
@@ -359,8 +359,6 @@
 \end{threeparttable}
 \end{table}
 
-    Low-jitter applications should note carefully the jitter introduced by the signal isolator. Noise is also introduced between the primary and secondary domains by the DC/DC converter. Where noise or jitter are crucial, it is instead recommended to use non-isolated cards such as 2238 MCX-TTL or 2245 LVDS-TTL.
-
 Minimum pulse width was measured by generating pulses of progressively longer duration through a DDS generator and using them as input for a BNC-TTL card. The input BNC-TTL card was connected to another BNC-TTL card as output. The output signal is measured and shown in Figure \ref{fig:pulsewidth}.
 
 \begin{figure}[ht]
@@ -397,25 +395,7 @@
     \caption{Position of switches}%
 \end{figure}
 
-\sysdescsection
-
-    2118 BNC-TTL and 2128 SMA-TTL should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
-
-    \begin{tcolorbox}[colback=white]
-        \begin{minted}{json}
-            "name" : {
-                "type": "dio",
-                "board": "DIO_BNC", // or "DIO_SMA", optional
-                "ports": [0],
-                "edge_counter": true, // optional
-                "bank_direction_low": "input", // or "output"
-                "bank_direction_high": "output" // or "input"
-            }
-        \end{minted}
-    \end{tcolorbox}
-
-    Replace 0 with the EEM port number used on the core device. Any port can be used. The \texttt{edge\_counter} field is boolean and may be specified true or false; a setting \texttt{true} will make a corresponding ARTIQ \texttt{edge\_counter} module available and consume a corresponding amount of additonal gateware resources. If not included, its default value is false.
-
+\newpage
 \codesection{2118 BNC-TTL/2128 SMA-TTL cards}
 
 Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
@@ -424,25 +404,21 @@
 The channel should be configured as output in both the gateware and hardware.
 \inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py}
 
-\newpage
-
 \subsection{Morse code}
 This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
 \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
 
+\newpage
 \subsection{Sub-coarse-RTIO-cycle pulse}
 With the use of ARTIQ RTIO, only one event can be enqueued per \textit{coarse RTIO cycle}, which typically corresponds to 8ns. To emit pulses of less than 8ns, careful timing is needed to ensure that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted during different coarse RTIO cycles.
 
 \inputcolorboxminted{firstline=60,lastline=64}{examples/ttl.py}
 
-\newpage
-
 \subsection{Edge counting in a 1ms window}
 The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gate\char`_falling()} \& \texttt{gate\char`_both()} for rising edge, falling edge, both rising edge \& falling edge detection respectively.
 The channel should be configured as input in both gateware and hardware. Invoke one of the 3 methods to start edge detection.
 \inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
 Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
-
 \inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
 The detected edges are registered to the RTIO input FIFO. By default, the FIFO can hold 64 events. The FIFO depth is defined by the \texttt{ififo\char`_depth} parameter for \texttt{Channel} class in \texttt{rtio/channel.py}.
 Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
@@ -451,7 +427,6 @@
 The RTIO system can report at most one edge detection event for every coarse RTIO cycle. In principle, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is one coarse RTIO cycle (typically 8 ns). However, both the electrical specifications and the possibility of triggering \texttt{RTIOOverflow} exceptions should also be considered.
 
 \newpage
-
 \subsection{Edge counting using \texttt{EdgeCounter}}
 This example code uses a gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second. If a gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
 \inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
@@ -469,7 +444,6 @@
 \inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py}
 
 \newpage
-
 \subsection{Minimum sustained event separation}
 The minimum sustained event separation is the least time separation between input gated events for which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions. The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
 

2238.tex

@@ -4,7 +4,7 @@
 \title{2238 MCX-TTL}
 \author{M-Labs Limited}
 \date{January 2022}
-\revision{Revision 3}
+\revision{Revision 2}
 \companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
 
 \begin{document}
@@ -439,7 +439,7 @@
     \centering
     \includegraphics[height=2in]{photo2238.jpg}
     \caption{MCX-TTL card}
-    \includegraphics[angle=90, height=0.6in]{fp2238.pdf}
+    \includegraphics[angle=90, height=0.6in]{DIO_MCX_FP.pdf}
     \caption{MCX-TTL front panel}
 \end{figure}
 
@@ -505,11 +505,8 @@
 \newpage
 
 \section{Configuring IO Direction \& Termination}
-
 IO direction and termination must be configured by switches. The termination switches are found at the top and the IO direction switches at the middle of the card respectively.
-
 \begin{multicols}{2}
-
 Termination switches between high impedence (OFF) and 50\textOmega~(ON). Note that termination switches are by-channel but IO direction switches are by-bank.
 
 \begin{itemize}
@@ -519,49 +516,15 @@
     \item IO direction switch open (OFF) \\
           The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
 \end{itemize}
-
 \columnbreak
-
 \begin{center}
     \centering
     \includegraphics[height=1.7in]{mcx_ttl_switches.jpg}
     \captionof{figure}{Position of switches}
 \end{center}
-
 \end{multicols}
 
-\sysdescsection
-
-    2238 MCX-TTL should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
-
-    \begin{tcolorbox}[colback=white]
-        \begin{minted}{json}
-            {
-                "type": "dio",
-                "board": "DIO_MCX", // optional
-                "ports": [0],
-                "edge_counter": true, // optional
-                "bank_direction_low": "input", // or "output"
-                "bank_direction_high": "output" // or "input"
-            },
-            {
-                "type": "dio",
-                "board": "DIO_MCX",
-                "ports": [1],
-                "bank_direction_low": "output",
-                "bank_direction_high": "output"
-            }
-        \end{minted}
-    \end{tcolorbox}
-
-    Note that due to its high channel account and double EEM connections 2238 MCX-TTL is entered into a system description as two peripheral entries, each representing two banks.
-
-    The \texttt{edge\_counter} field is boolean and may be specified true or false; a setting \texttt{true} will make a corresponding ARTIQ \texttt{edge\_counter} module available and consume a corresponding amount of additonal gateware resources. If not included, its default value is false. Both \texttt{edge\_counter} and IO direction can be specified separately for each entry.
-
-    For single-EEM operation, use only one of two peripheral entries.
-
 \newpage
-
 \codesection{2238 MCX-TTL card}
 
 Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
@@ -575,7 +538,6 @@
 \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
 
 \newpage
-
 \subsection{Edge counting in an 1ms window}
 The channel should be configured as input in both gateware and hardware.
 \inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}

2245.tex

@@ -7,7 +7,7 @@
 \title{2245 LVDS-TTL}
 \author{M-Labs Limited}
 \date{January 2022}
-\revision{Revision 3}
+\revision{Revision 2}
 \companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
 
 \begin{document}
@@ -297,7 +297,7 @@
 \begin{figure}[hbt!]
     \centering
     \includegraphics[angle=90, height=1.7in]{photo2245.jpg}
-    \includegraphics[angle=90, height=0.4in]{fp2245.pdf}
+    \includegraphics[angle=90, height=0.4in]{DIO_RJ45_FP.pdf}
     \caption{LVDS-TTL card and front panel}
 \end{figure}
 
@@ -312,7 +312,7 @@
 
 All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherwise noted. Information in this section is based on the datasheet of the repeater IC (FIN1101K8X\footnote{\label{repeaters}\url{https://www.onsemi.com/pdf/datasheet/fin1101-d.pdf}}).
 
-    \begin{table}[h!]
+\begin{table}[h]
 \begin{threeparttable}
 \caption{Recommended Input Voltage}
 \begin{tabularx}{\textwidth}{l | c | c c c | c | X}
@@ -334,7 +334,7 @@
 
 All typical values of DC specifications are at $T_A = 25\degree C$.
 
-    \begin{table}[h!]
+\begin{table}[h]
 \begin{threeparttable}
 \caption{DC Specifications}
 \begin{tabularx}{\textwidth}{l | c | c c c | c | X}
@@ -360,7 +360,7 @@
 
 All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 300mV$, $V_{IC} = 1.3V$ unless otherwise given.
 
-    \begin{table}[h!]
+\begin{table}[h]
 \begin{threeparttable}
 \caption{AC Specifications}
 \begin{tabularx}{\textwidth}{l | c c c | c | X}
@@ -379,20 +379,6 @@
     LVDS data jitter, & & \multirow{2}{*}{85} & \multirow{2}{*}{125} & \multirow{2}{*}{ps} & $PRBS=2^{23}-1$\\
     deterministic & & & & & 800 Mbps\\
     \hline
-    \end{tabularx}
-    \end{threeparttable}
-    \end{table}
-
-\newpage
-
-    \begin{table}[h!]
-        \begin{threeparttable}
-        \caption{AC Specifications, cont.}
-        \begin{tabularx}{\textwidth}{l | c c c | c | X}
-            \thickhline
-            \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
-            \textbf{Unit} & \textbf{Conditions} \\
-            \hline
     LVDS clock jitter, & & \multirow{2}{*}{2.1} & \multirow{2}{*}{3.5} & \multirow{2}{*}{ps} & \multirow{2}{*}{400 MHz clock}\\
     random (RMS) & & & & & \\
     \thickhline
@@ -400,10 +386,10 @@
 \end{threeparttable}
 \end{table}
 
+\newpage
+
 \section{Configuring IO Direction \& Termination}
-
 \begin{multicols}{2}
-
 The IO direction of each channel can be configured by DIP switches, which are found at the top of the card.
 \begin{itemize}
     \itemsep0em
@@ -414,45 +400,13 @@
 \end{itemize}
 
 \vspace*{\fill}\columnbreak
-
 \begin{center}
     \centering
     \includegraphics[height=1.5in]{lvds_ttl_switches.jpg}
     \captionof{figure}{Position of switches}
 \end{center}
-
 \end{multicols}
 
-\sysdescsection
-
-    2245 LVDS-TTL should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
-
-    \begin{tcolorbox}[colback=white]
-        \begin{minted}{json}
-            {
-                "type": "dio",
-                "board": "DIO_LVDS", // optional
-                "ports": [0],
-                "edge_counter": true, // optional
-                "bank_direction_low": "input", // or "output"
-                "bank_direction_high": "output" // or "input"
-            },
-            {
-                "type": "dio",
-                "board": "DIO_LVDS",
-                "ports": [1],
-                "bank_direction_low": "output",
-                "bank_direction_high": "output"
-            }
-        \end{minted}
-    \end{tcolorbox}
-
-    Note that due to its high channel account and double EEM connections 2245 LVDS-TTL is entered into a system description as two peripheral entries, each representing two banks.
-
-    The \texttt{edge\_counter} field is boolean and may be specified true or false; a setting \texttt{true} will make a corresponding ARTIQ \texttt{edge\_counter} module available and consume a corresponding amount of additonal gateware resources. If not included, its default value is false. Both \texttt{edge\_counter} and IO direction can be specified separately for each entry.
-
-    For single-EEM operation, use only one of two peripheral entries.
-
 \newpage
 
 \codesection{2245 LVDS-TTL card}
@@ -468,7 +422,6 @@
 \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
 
 \newpage
-
 \subsection{Counting rising edges in a 1ms window}
 The channel should be configured as input in both gateware and hardware.
 \inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}
@@ -494,6 +447,7 @@
   \noindent\strut\usebox0\par
 \egroup}
 
+\newpage
 \subsection{SPI Master Device}
 If one of the two card EEM ports is configured as \texttt{dio\char`_spi} instead of \texttt{dio}, its associated TTL channels can be configured as SPI master devices. Invocation of an SPI transfer follows this pattern:
 \begin{enumerate}
@@ -528,10 +482,8 @@
     \end{tabular}
 \end{table}
 
-    The following ARTIQ example demonstrates the flow of an SPI transaction on a typical SPI setup with 3 homogeneous slaves. The direction switches on the LVDS-TTL card should be set to the correct IO direction for all relevant channels before powering on.
-
-\newpage
-
+The following ARTIQ example demonstrates the flow of an SPI transaction on a typical SPI setup with 3 homogeneous slaves.
+The direction switches on the LVDS-TTL card should be set to the correct IO direction for all relevant channels before powering on.
 \begin{center}
     \begin{circuitikz}[european, scale=1, every label/.append style={align=center}]
         % SPI master
@@ -599,6 +551,7 @@
     \end{circuitikz}
 \end{center}
 
+\newpage
 \subsubsection{SPI Configuration}
 The following examples will assume the SPI communication has the following properties:
 \begin{itemize}
@@ -608,9 +561,6 @@
     \item Most significant bit (MSB) first
     \item Full duplex
 \end{itemize}
-
-\newpage
-
 The baseline configuration for an \texttt{SPIMaster} instance can be defined as such:
 \inputcolorboxminted[0]{firstline=2,lastline=8}{examples/spi.py}
 The \texttt{SPI\char`_END} \& \texttt{SPI\char`_INPUT} flags will be modified during runtime in the following example.
@@ -640,11 +590,10 @@
 \end{tikztimingtable}%
 \end{center}
 
+\newpage
 Suppose the instruction is \texttt{0x13}, while the data is \texttt{0xDEADBEEF}. In addition, both slave 1 \& 2 are selected. This SPI transaction can be performed with the following code:
 \inputcolorboxminted{firstline=18,lastline=27}{examples/spi.py}
 
-\newpage
-
 \subsubsection{SPI read}
 A 32-bit read is represented by the following timing diagram:
 
@@ -670,6 +619,7 @@
 Suppose the instruction is \texttt{0x81}, where only slave 0 is selected. This SPI transcation can be performed by the following code.
 \inputcolorboxminted{firstline=35,lastline=49}{examples/spi.py}
 
+\newpage
 \ordersection{2245 LVDS-TTL}
 
 \finalfootnote

examples/unsorted

@@ -1,99 +0,0 @@
-from artiq.experiment import *
-
-class SineWave(EnvExperiment):
-    def build(self):
-        self.setattr_device("core")
-
-        self.leds = dict()
-        self.ttl_outs = dict()
-        
-        self.dacs_config = dict()
-        self.dac_volt = dict()
-        self.dac_dds = dict()
-        self.dac_trigger = dict()
-        
-        ddb = self.get_device_db()
-        for name, desc in ddb.items():
-            if isinstance(desc, dict) and desc["type"] == "local":
-                module, cls = desc["module"], desc["class"]
-                if (module, cls) == ("artiq.coredevice.ttl", "TTLOut"):
-                    dev = self.get_device(name)
-                    if "led" in name: 
-                        self.leds[name] = dev
-                    else:
-                        self.ttl_outs[name] = dev
-                
-                if (module, cls) == ("artiq.coredevice.shuttler", "Config"):
-                    dev = self.get_device(name)
-                    self.dacs_config[name] = dev
-
-                if (module, cls) == ("artiq.coredevice.shuttler", "Volt"):
-                    dev = self.get_device(name)
-                    self.dac_volt[name] = dev
-                
-                if (module, cls) == ("artiq.coredevice.shuttler", "Dds"):
-                    dev = self.get_device(name)
-                    self.dac_dds[name] = dev
-                
-                if (module, cls) == ("artiq.coredevice.shuttler", "Trigger"):
-                    dev = self.get_device(name)
-                    self.dac_trigger[name] = dev
-                
-        
-        self.leds = sorted(self.leds.items(), key=lambda x: x[1].channel)
-        self.ttl_outs = sorted(self.ttl_outs.items(), key=lambda x: x[1].channel)
-
-        self.dacs_config = sorted(self.dacs_config.items(), key=lambda x: x[1].channel)
-        self.dac_volt = sorted(self.dac_volt.items(), key=lambda x: x[1].channel)
-        self.dac_dds = sorted(self.dac_dds.items(), key=lambda x: x[1].channel)
-        self.dac_trigger = sorted(self.dac_trigger.items(), key=lambda x: x[1].channel)
-        
-
-    @kernel
-    def set_dac_config(self, config):
-        config.set_config(0xFFFF)
-
-    @kernel
-    def set_test_dac_volt(self, volt):
-        a0 = 0
-        a1 = 0
-        a2 = 0
-        a3 = 0
-        volt.set_waveform(a0, a1, a2, a3)
-
-
-    @kernel
-    def set_test_dac_dds(self, dds):
-        b0 = 0x0FFF 
-        b1 = 0
-        b2 = 0
-        b3 = 0
-        c0 = 0
-        c1 = 0x147AE148 # Frequency = 10MHz
-        c2 = 0
-        dds.set_waveform(b0, b1, b2, b3, c0, c1, c2)
-    
-    @kernel
-    def set_dac_trigger(self, trigger):
-        trigger.trigger(0xFFFF)
-
-    @kernel
-    def run(self):
-        self.core.reset()
-
-        self.core.break_realtime()
-        t = now_mu() - self.core.seconds_to_mu(0.2)
-        while self.core.get_rtio_counter_mu() < t:
-            pass
-
-        for dac_config_name, dac_config_dev in self.dacs_config:
-            self.set_dac_config(dac_config_dev)
-
-        for dac_volt_name, dac_volt_dev in self.dac_volt:
-            self.set_test_dac_volt(dac_volt_dev)
-
-        for dac_dds_name, dac_dds_dev in self.dac_dds:
-            self.set_test_dac_dds(dac_dds_dev) 
-
-        for dac_trigger_name, dac_trigger_dev in self.dac_trigger:
-             self.set_dac_trigger(dac_trigger_dev)