4410-4412.tex

@@ -702,8 +702,8 @@ The reported values are obtained from the oscilloscope.
 
 \end{multicols}
 
-The ideal RMS voltage is described by the linear function $V_\mathrm{rms,ideal}(\mathrm{ASF})=\frac{V_\mathrm{rms}(0.1)}{0.1}*\mathrm{ASF}$.
+The expected RMS voltage is described by the linear function $V_\mathrm{rms,exp}(\mathrm{ASF})=\frac{V_\mathrm{rms}(0.1)}{0.1}*\mathrm{ASF}$.
-The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\mathrm{rms,ideal}(1)$) is shown below.
+The measured RMS voltage divided by the full scale expected RMS voltage (i.e. $V_\mathrm{rms,exp}(1)$) is shown below.
 
 \begin{figure}[H]
     \centering
@@ -767,11 +767,11 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
             (0, 0) (0.1, 16.6691) (0.2, 33.3762) (0.3, 49.8844) (0.4, 67.055) (0.5, 83.652)
             (0.6, 99.970) (0.7, 116.906) (0.8, 133.368) (0.9, 150.839) (1.0, 167.033)
         };
-        \legend{Ideal response, 0dB attenuation, 5dB attenuation, 10dB attenuation, 15dB attenuation}
+        \legend{Expected response, 0dB attenuation, 5dB attenuation, 10dB attenuation, 15dB attenuation}
             
         \end{axis}
     \end{tikzpicture}
-\caption{RMS voltage scaled by ideal voltage at ASF=1, 100 MHz}
+\caption{RMS voltage scaled by expected voltage at ASF=1, 100 MHz}
 \end{figure}
 
 \newpage

5108.tex

@@ -314,7 +314,7 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
     \hline
     Resolution &\multicolumn{4}{c|}{16 bits}& \\
     \thickhline
-    \multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage magnitude must not exceed 5V.}
+    \multicolumn{6}{l}{*At 1x gain with 50\textOmega~termination enabled, the input voltage magnitude must not exceed 5V.}
 \end{tabularx}
 \end{threeparttable}
 \end{table}

7210.tex

@@ -35,7 +35,7 @@
 \item{Distribute a low jitter clock signal.}
 \item{SMA \& MMCX clock input.}
 \item{4 SMA \& 6 MMCX output.}
-\item{\textless100 fs RMS clock jitter.}
+\item{\textless100 fs clock jitter.}
 \end{itemize}
 
 \section{Applications}
@@ -46,13 +46,12 @@
     \item{Drive clocks input for:\begin{itemize}
         \item{4410/4412 DDS Urukul}
         \item{4456 Synthesizer Mirny}
-        \item{4624 Phaser}
     \end{itemize}}
 \end{itemize}
 
 \section{General Description}
 The 7210 Clocker card is a 4hp EEM module.
-It distrubites clock signal with \textless100 fs RMS jitter.
+It distrubites clock signal with \textless100 fs jitter.
 
 Clock input can be supplied to Clocker through the external SMA connector or the internal MMCX connector.
 The input source can be selected using an SPDT switch.
@@ -262,7 +261,7 @@ Otherwise, connect it to a carrier card (1124 Kasli or 1125 Kasli-SoC) using the
 Specifications are derived based on the datasheets of
 the clock buffer (ADCLK950BCPZ\footnote{\label{clock_buffer}https://www.analog.com/media/en/technical-documentation/data-sheets/ADCLK950.pdf}) \&
 the RF transformer (TCM2-43X+\footnote{\label{rf_transformer}https://www.minicircuits.com/pdfs/TCM2-43X+.pdf}).
-Clock output specifications is tested by supplying a 100 MHz DDS signal to the SMA input connector.\footnote{\label{clocker6}https://github.com/sinara-hw/Clocker/issues/6\#issuecomment-414048168}
+Clock output specifications is tested by supplying a 100 MHz DDS signal to the SMA input connector.
 The output is connected to an oscilloscope with 50\textOmega~termination.
 
 \begin{table}[h]
@@ -275,12 +274,14 @@ The output is connected to an oscilloscope with 50\textOmega~termination.
     \textbf{Unit} & \textbf{Conditions} \\
     \hline
     Clock input\repeatfootnote{clock_buffer}\textsuperscript{,}\repeatfootnote{rf_transformer} & & & & & \\
-            \hspace{3mm} Peak-to-peak voltage & 0.40 & & 2.40 & V\textsubscript{p-p} & \\
+            \hspace{3mm} Differential peak-to-peak voltage & 0.40 & & 2.40 & V\textsubscript{p-p} & \\
             \hspace{3mm} Frequency & 10 & & 4000 & MHz & \\
     \hline
-    Clock output
+    Differential output
             & & 0.8 & & V\textsubscript{p-p} & \multirow{3}{*}{50\textOmega~load, 100 MHz} \\
             & & 5 & & dBm & \\
+    \cline{0-4}
+    Rise time (-200mV to 200mV) & & 415 & & ps & \\
     \thickhline
 \end{tabularx}
 \end{threeparttable}
@@ -289,9 +290,14 @@ The output is connected to an oscilloscope with 50\textOmega~termination.
 \begin{figure}[H]
     \centering
     \includegraphics[width=5in]{clocker_waveform.png}
-    \caption{Waveform of Clocker at 100 MHz\repeatfootnote{clocker6}}
+    \caption{Waveform of Clocker at 100 MHz}
 \end{figure}
 
+\begin{figure}[H]
+    \centering
+    \includegraphics[width=5in]{clocker_rise_time.png}
+    \caption{Rising Edge of Clocker at 100 MHz}
+\end{figure}  
 \newpage
 
 \section{Selecting Clock Source}