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5432: unify with fastino

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architeuthis 2025-02-01 00:52:16 +01:00
parent 1623991afd
commit dc3cab0782
2 changed files with 7 additions and 26 deletions
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31
5432.tex
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@ -1,4 +1,5 @@
\input{preamble.tex} \input{preamble.tex}
\input{shared/dactino.tex}
\graphicspath{{images/5432}, {images}} \graphicspath{{images/5432}, {images}}
\title{5432 DAC Zotino} \title{5432 DAC Zotino}
@ -14,14 +15,14 @@
\begin{itemize} \begin{itemize}
\item{32-channel DAC} \item{32-channel DAC}
\item{16-bits resolution} \item{16-bit resolution}
\item{1 MSPS shared between all channels} \item{1 MSPS shared between all channels}
\item{Output voltage $\pm$10V} \item{Output voltage $\pm$10V}
\item{HD68 connector} \item{HD68 connector}
\item{Can be broken out to BNC/SMA/MCX} \item{Can be broken out to BNC/SMA/MCX}
\end{itemize} \end{itemize}
\section{Applications} \section{Applications}
\begin{itemize} \begin{itemize}
\item{Controlling setpoints of PID controllers for laser power stabilization} \item{Controlling setpoints of PID controllers for laser power stabilization}
@ -29,11 +30,7 @@
\item{Driving DC electrodes in ion traps} \item{Driving DC electrodes in ion traps}
\end{itemize} \end{itemize}
\section{General Description} \generaldescription{5432 DAC Zotino}{high-speed 5632 DAC Fastino}
The 5432 Zotino is a 4hp EEM module and part of the ARTIQ/Sinara family. It adds digital-analog conversion capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
It provides four groups of eight analog channels each, exposed by one HD68 connector. Each channel supports output voltage from -10 V to 10 V. All channels can be updated simultaneously. Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528 SMA-IDC or 5538 MCX-IDC cards.
% Switch to next column % Switch to next column
\vfill\break \vfill\break
@ -231,7 +228,7 @@
\newpage \newpage
\sysdescsection \sysdescsection
5432 DAC Zotino should be entered in the \texttt{peripherals} list of the corresponding core device in the following format: 5432 DAC Zotino should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
@ -246,23 +243,7 @@
Replace 0 with the EEM port used on the core device. Any port may be used. Replace 0 with the EEM port used on the core device. Any port may be used.
\codesection{5432 DAC Zotino} \codesectiondactino{5432 DAC Zotino}{Zotino}{zotino.py}
\subsection{Setting output voltage}
The following example initializes the Zotino card, then emits 1.0 V, 2.0 V, 3.0 V and 4.0 V at channels 0, 1, 2, and 3 respectively. Voltages of all 4 channels are updated simultaneously with the use of \texttt{set\char`_dac()}.
\inputcolorboxminted{firstline=11,lastline=22}{examples/zotino.py}
\newpage
\subsection{Triangular wave}
Generates a triangular waveform at 10 Hz, 16 V peak-to-peak. Timing accuracy of the RTIO system can be demonstrated by the precision of the frequency.
Import \texttt{scipy.signal} and \texttt{numpy} modules to run this example.
\inputcolorboxminted{firstline=30,lastline=49}{examples/zotino.py}
\ordersection{5432 DAC Zotino} \ordersection{5432 DAC Zotino}

2
examples/zotino.py
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@ -46,4 +46,4 @@ class TriangularWave(EnvExperiment):
while True: while True:
self.zotino.set_dac([self.voltages[counter]], [0]) self.zotino.set_dac([self.voltages[counter]], [0])
counter = (counter + 1) % self.sample counter = (counter + 1) % self.sample
delay(self.interval) delay(self.interval)