7210: update, add phase noise chart
97
7210.tex
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\include{preamble.tex}
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\input{preamble.tex}
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\graphicspath{{images/7210}{images}}
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\graphicspath{{images/7210}{images}}
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\title{7210 Clocker}
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\title{7210 Clocker}
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\author{M-Labs Limited}
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\author{M-Labs Limited}
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\date{January 2022}
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\date{January 2024}
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\revision{Revision 2}
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\revision{Revision 3}
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\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
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\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
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\begin{document}
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\begin{document}
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@ -13,18 +13,18 @@
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\section{Features}
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\section{Features}
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\begin{itemize}
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\begin{itemize}
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\item{Distribute a low jitter clock signal.}
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\item{Low-jitter clock signal distribution}
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\item{SMA \& MMCX clock input.}
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\item{SMA \& MMCX input}
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\item{4 SMA \& 6 MMCX output.}
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\item{4 SMA \& 6 MMCX output}
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\item{\textless100 fs RMS clock jitter.}
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\item{\textless100 fs RMS jitter}
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\end{itemize}
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\end{itemize}
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\section{Applications}
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\section{Applications}
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\begin{itemize}
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\begin{itemize}
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\item{Distribute clock signal.}
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\item{Distribute clock signals}
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\item{Clock distribution amplifier.}
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\item{Amplify clock signals}
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\item{Drive clocks input for:\begin{itemize}
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\item{Drive clock input for:\begin{itemize}
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\item{4410/4412 DDS Urukul}
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\item{4410/4412 DDS Urukul}
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\item{4456 Synthesizer Mirny}
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\item{4456 Synthesizer Mirny}
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\item{4624 Phaser}
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\item{4624 Phaser}
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@ -32,17 +32,13 @@
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\end{itemize}
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\end{itemize}
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\section{General Description}
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\section{General Description}
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The 7210 Clocker card is a 4hp EEM module.
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The 7210 Clocker card is a 4hp EEM module, capable of distributing clock signals with \textless100 fs RMS jitter.
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It distrubites clock signal with \textless100 fs RMS jitter.
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Clock input can be supplied to Clocker through the external SMA connector or the internal MMCX connector.
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Clock input can be supplied to Clocker through the external SMA connector or the internal MMCX connector. The input source is selected using an SPDT switch.
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The input source can be selected using an SPDT switch.
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Each card distributes the input to 10 outputs.
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4 outputs are interfaced with SMA connectors, the other 6 are with MMCX connectors.
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Clocker can be powered externally or internally.
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Each Clocker card distributes an input to 10 outputs. 4 outputs are interfaced with SMA connectors, the other 6 with MMCX connectors.
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To provide external power, connect an external 12V power source through the front panel power jack.
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Otherwise, connect it to a carrier card (1124 Kasli or 1125 Kasli-SoC) using the EEM port.
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Clocker can be powered externally or internally. To provide external power, connect an external 12V power source either through front panel power jack or rear connector. Alternatively, connect it to a carrier card (e.g. 1124 Kasli, 1125 Kasli-SoC) using the EEM port.
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% Switch to next column
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% Switch to next column
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\vfill\break
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\vfill\break
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@ -218,24 +214,27 @@ Otherwise, connect it to a carrier card (1124 Kasli or 1125 Kasli-SoC) using the
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\caption{Simplified Block Diagram}
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\caption{Simplified Block Diagram}
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\end{figure}
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\end{figure}
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\vspace{5mm}
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\begin{figure}[hbt!]
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\begin{figure}[hbt!]
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\centering
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\centering
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\includegraphics[height=3in]{Clocker_FP.jpg}
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\includegraphics[height=3.5in]{photo7210.jpg}
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\includegraphics[height=3in]{photo7210.jpg}
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\includegraphics[height=3.5in]{clocker_front_panel.jpg}
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\caption{Clocker Card photo}
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\caption{Clocker card and front panel}
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\end{figure}
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\end{figure}
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% For wide tables, a single column layout is better. It can be switched
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% For wide tables, a single column layout is better. It can be switched
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% page-by-page.
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% page-by-page.
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\onecolumn
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\onecolumn
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\section{Source}
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Clocker, like all the Sinara hardware family, is open-source hardware, and design files (schematics, PCB layouts,
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BOMs) can be found in detail at the repository \url{https://github.com/sinara-hw/Clocker}.
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\section{Electrical Specifications}
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\section{Electrical Specifications}
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Specifications are derived based on the datasheets of
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Specifications are derived based on the datasheets of the clock buffer (ADCLK950BCPZ\footnote{\url{https://www.analog.com/media/en/technical-documentation/data-sheets/ADCLK950.pdf}}) and the RF transformer (TCM2-43X+\footnote{\url{https://www.minicircuits.com/pdfs/TCM2-43X+.pdf}}) used. Clock output specifications are tested by supplying a 100 MHz DDS signal to the SMA input connector\footnote{\label{clocker6}\url{https://github.com/sinara-hw/Clocker/issues/6\#issuecomment-414048168}}. The output is connected to an oscilloscope with 50\textOmega~termination.
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the clock buffer (ADCLK950BCPZ\footnote{\label{clock_buffer}https://www.analog.com/media/en/technical-documentation/data-sheets/ADCLK950.pdf}) \&
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the RF transformer (TCM2-43X+\footnote{\label{rf_transformer}https://www.minicircuits.com/pdfs/TCM2-43X+.pdf}).
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Clock output specifications is tested by supplying a 100 MHz DDS signal to the SMA input connector.\footnote{\label{clocker6}https://github.com/sinara-hw/Clocker/issues/6\#issuecomment-414048168}
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The output is connected to an oscilloscope with 50\textOmega~termination.
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\begin{table}[h]
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\begin{table}[h]
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\centering
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\centering
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@ -246,13 +245,13 @@ The output is connected to an oscilloscope with 50\textOmega~termination.
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\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Unit} & \textbf{Conditions} \\
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\textbf{Unit} & \textbf{Conditions} \\
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\hline
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\hline
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Clock input\repeatfootnote{clock_buffer}\textsuperscript{,}\repeatfootnote{rf_transformer} & & & & & \\
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Clock input & & & & & \\
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\hspace{3mm} Peak-to-peak voltage & 0.40 & & 2.40 & V\textsubscript{p-p} & \\
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\hspace{3mm} Peak-to-peak voltage & 0.40 & & 2.40 & V\textsubscript{p-p} & \\
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\hspace{3mm} Frequency & 10 & & 4000 & MHz & \\
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\hspace{3mm} Frequency & 10 & & 4000 & MHz & \\
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\hline
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\hline
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Clock output
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Clock output & & & & & \\
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& & 0.8 & & V\textsubscript{p-p} & \multirow{3}{*}{50\textOmega~load, 100 MHz} \\
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\hspace{3mm} Peak-to-peak voltage & & 0.8 & & V\textsubscript{p-p} & \multirow{3}{*}{50\textOmega~load, 100 MHz} \\
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& & 5 & & dBm & \\
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\hspace{3mm} Power & & 5 & & dBm & \\
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\thickhline
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\thickhline
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\end{tabularx}
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\end{tabularx}
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\end{threeparttable}
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\end{threeparttable}
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@ -260,35 +259,45 @@ The output is connected to an oscilloscope with 50\textOmega~termination.
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\begin{figure}[H]
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\begin{figure}[H]
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\centering
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\centering
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\includegraphics[width=5in]{clocker_waveform.png}
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\includegraphics[width=6in]{clocker_waveform.png}
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\caption{Waveform of Clocker at 100 MHz\repeatfootnote{clocker6}}
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\caption{Waveform of Clocker at 100 MHz\repeatfootnote{clocker6}}
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\end{figure}
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\end{figure}
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\newpage
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\newpage
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\section{Phase-Noise Performance}
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Performance measured against 100 MHz Wenzel Quartz, phase-locked to 10MHz Wenzel Blue Top oscillator\footnote{\label{clockerpn}\url{https://github.com/sinara-hw/Clocker/issues/4\#issuecomment-1310591042}}. Blue trace represents measurement against itself for reference.
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\begin{figure}[H]
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\centering
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\includegraphics[width=6.5in]{clocker_phase_noise.png}
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\caption{Absolute phase noise of Clocker measured @ 100 MHz (pink trace)\repeatfootnote{clockerpn}}
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\end{figure}
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\section{Selecting Clock Source}
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\section{Selecting Clock Source}
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Clock input can be supplied to the 7210 Clocker using either the internal MMCX connector or the external SMA connector on the front panel.
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Clock input can be supplied to 7210 Clocker using either the internal MMCX connector or the external SMA connector on the front panel. The selection of clock input is configurable by an SPDT switch, located between the MMCX input connector (\texttt{INT CLK IN}) and the MMCX output connectors. See Figure 5.
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The selection of clock input is configurable by a SPDT switch.
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It is located between the MMCX input connector (\texttt{INT CLK IN}) and the MMCX output connectors.
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\begin{multicols}{2}
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\begin{multicols}{2}
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Either INT or EXT can be selected.
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Either \texttt{INT} or \texttt{EXT} can be selected.
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\begin{itemize}
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\begin{itemize}
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\itemsep0em
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\item Internal MMCX (\texttt{INT}) \\
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\item Internal MMCX (INT) \\
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Clock signal from the MMCX connector \texttt{INT CLK IN} is distributed to all outputs.
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Clock signal from the MMCX connector \texttt{INT CLK IN} is distributed to all MMCX outputs.
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\item External SMA (\texttt{EXT}) \\
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\item External SMA (EXT) \\
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Clock signal from the SMA connector \texttt{CLK IN} on the front panel is distributed to all outputs.
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Clock signal from the SMA connector \texttt{CLK IN} on the front panel is distributed to all MMCX outputs.
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\end{itemize}
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\end{itemize}
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\columnbreak
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\vspace*{\fill}\columnbreak
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\begin{center}
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\begin{center}
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\centering
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\centering
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\includegraphics[height=1.7in]{clocker_spdt_switch.jpg}
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\includegraphics[height=1.5in]{clocker_spdt_switch.jpg}
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\captionof{figure}{Position of the SPDT switch}
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\captionof{figure}{Position of the SPDT switch}
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\end{center}
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\end{center}
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\end{multicols}
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\end{multicols}
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\section{Ordering Information}
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\section{Ordering Information}
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To order, please visit \url{https://m-labs.hk} and select the 7210 Clocker in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
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To order, please visit \url{https://m-labs.hk} and select 7210 Clocker in the ARTIQ/Sinara crate configuration tool. Cards may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
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\section*{}
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\section*{}
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\vspace*{\fill}
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\vspace*{\fill}
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Before Width: | Height: | Size: 61 KiB After Width: | Height: | Size: 61 KiB |
After Width: | Height: | Size: 244 KiB |
Before Width: | Height: | Size: 81 KiB After Width: | Height: | Size: 62 KiB |
Before Width: | Height: | Size: 81 KiB After Width: | Height: | Size: 257 KiB |