EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 5
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 5550 1100 2050 2550
U 60C0E996
F0 "FPGA" 50
F1 "FPGA.sch" 50
F2 "FPGA_VCC" I R 7600 1300 50 
F3 "FPGA_GND" I R 7600 1600 50 
$EndSheet
$Sheet
S 2150 1100 1950 2550
U 60C2FDBB
F0 "MCU" 50
F1 "MCU.sch" 50
$EndSheet
$Sheet
S 2150 5000 2050 2150
U 60C2FE2A
F0 "Power" 50
F1 "Power.sch" 50
$EndSheet
$Sheet
S 5600 5000 2000 1450
U 60FB17F2
F0 "Analog_LVDS" 50
F1 "Analog_LVDS.sch" 50
$EndSheet
$EndSCHEMATC