diff --git a/CurrentSenser.sch b/CurrentSenser.sch
deleted file mode 100644
index 528436d..0000000
--- a/CurrentSenser.sch
+++ /dev/null
@@ -1,622 +0,0 @@
-EESchema Schematic File Version 4
-EELAYER 30 0
-EELAYER END
-$Descr A4 11693 8268
-encoding utf-8
-Sheet 8 8
-Title ""
-Date ""
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
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-F 1 "10k" H 6220 3355 50  0000 L CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 6080 3400 50  0001 C CNN
-F 3 "~" H 6150 3400 50  0001 C CNN
-	1    6150 3400
-	0    -1   -1   0   
-$EndComp
-$Comp
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-U 1 1 628EC8B3
-P 5750 3400
-F 0 "D22" V 5789 3282 50  0000 R CNN
-F 1 "LED_12V_OUT" V 5698 3282 50  0000 R CNN
-F 2 "LED_SMD:LED_0603_1608Metric" H 5750 3400 50  0001 C CNN
-F 3 "~" H 5750 3400 50  0001 C CNN
-	1    5750 3400
-	-1   0    0    1   
-$EndComp
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-P 6450 3550
-F 0 "#PWR0158" H 6450 3300 50  0001 C CNN
-F 1 "GND" H 6455 3377 50  0000 C CNN
-F 2 "" H 6450 3550 50  0001 C CNN
-F 3 "" H 6450 3550 50  0001 C CNN
-	1    6450 3550
-	1    0    0    -1  
-$EndComp
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-	5450 3400 5600 3400
-Wire Wire Line
-	5900 3400 6000 3400
-Wire Wire Line
-	6300 3400 6450 3400
-Wire Wire Line
-	6450 3400 6450 3550
-Text GLabel 5550 5400 2    50   Input ~ 0
-+12V_OUT
-Wire Wire Line
-	5550 5400 5450 5400
-$Comp
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-U 1 1 60FB945B
-P 5450 4650
-F 0 "R130" V 5243 4650 50  0000 C CNN
-F 1 "0.03/1%/3W" V 5334 4650 50  0000 C CNN
-F 2 "Resistor_SMD:R_2010_5025Metric" V 5380 4650 50  0001 C CNN
-F 3 "~" H 5450 4650 50  0001 C CNN
-	1    5450 4650
-	-1   0    0    1   
-$EndComp
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-Wire Wire Line
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-NoConn ~ 7100 4500
-$Comp
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-F 0 "U17" H 7500 4135 50  0000 C CNN
-F 1 "INA190A1" H 7500 4226 50  0000 C CNN
-F 2 "Package_TO_SOT_SMD:TSOT-23-8" H 7500 4500 50  0001 C CNN
-F 3 "https://www.ti.com/lit/ds/symlink/ina190.pdf" H 7500 4500 50  0001 C CNN
-	1    7500 4500
-	-1   0    0    1   
-$EndComp
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-U 1 1 62250711
-P 8350 4400
-F 0 "#PWR0162" H 8350 4150 50  0001 C CNN
-F 1 "GND" V 8355 4272 50  0000 R CNN
-F 2 "" H 8350 4400 50  0001 C CNN
-F 3 "" H 8350 4400 50  0001 C CNN
-	1    8350 4400
-	0    -1   -1   0   
-$EndComp
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-F 2 "" H 6800 3050 50  0001 C CNN
-F 3 "" H 6800 3050 50  0001 C CNN
-	1    6800 3050
-	1    0    0    -1  
-$EndComp
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-F 0 "L7" V 7340 3200 50  0000 C CNN
-F 1 "10uH" V 7249 3200 50  0000 C CNN
-F 2 "Inductor_SMD:L_0603_1608Metric" H 7150 3200 50  0001 C CNN
-F 3 "~" H 7150 3200 50  0001 C CNN
-	1    7150 3200
-	0    -1   -1   0   
-$EndComp
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-Wire Wire Line
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-Wire Wire Line
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-F 0 "C93" H 8265 4596 50  0000 L CNN
-F 1 "0.1uF" H 8265 4505 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 8188 4400 50  0001 C CNN
-F 3 "~" H 8150 4550 50  0001 C CNN
-	1    8150 4550
-	1    0    0    -1  
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-	8000 4600 8000 4700
-Connection ~ 8150 4400
-Wire Wire Line
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-Connection ~ 8150 4700
-Connection ~ 8000 4700
-$Comp
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-P 6050 4650
-F 0 "C90" H 6165 4696 50  0000 L CNN
-F 1 "22nF" H 6165 4605 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 6088 4500 50  0001 C CNN
-F 3 "~" H 6050 4650 50  0001 C CNN
-	1    6050 4650
-	1    0    0    -1  
-$EndComp
-$Comp
-L Device:R R131
-U 1 1 6228FFFD
-P 5800 4300
-F 0 "R131" V 5593 4300 50  0000 C CNN
-F 1 "100" V 5684 4300 50  0000 C CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 5730 4300 50  0001 C CNN
-F 3 "~" H 5800 4300 50  0001 C CNN
-	1    5800 4300
-	0    1    1    0   
-$EndComp
-$Comp
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-U 1 1 622966C0
-P 5800 5000
-F 0 "R132" V 5593 5000 50  0000 C CNN
-F 1 "100" V 5684 5000 50  0000 C CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 5730 5000 50  0001 C CNN
-F 3 "~" H 5800 5000 50  0001 C CNN
-	1    5800 5000
-	0    1    1    0   
-$EndComp
-Wire Wire Line
-	6050 4500 6050 4300
-Wire Wire Line
-	6050 4800 6050 5000
-Wire Wire Line
-	6400 5000 6400 4700
-Wire Wire Line
-	6400 4600 6400 4300
-Wire Wire Line
-	6400 4600 7100 4600
-Wire Wire Line
-	6400 4700 7100 4700
-Text HLabel 7650 5200 2    50   Input ~ 0
-12V_CURRENT
-$Comp
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-U 1 1 622C2DA6
-P 8550 3350
-F 0 "U18" H 8894 3396 50  0000 L CNN
-F 1 "LMV321" H 8894 3305 50  0000 L CNN
-F 2 "Package_TO_SOT_SMD:SOT-23-5" H 8550 3350 50  0001 L CNN
-F 3 "http://www.ti.com/lit/ds/symlink/lmv324.pdf" H 8550 3350 50  0001 C CNN
-	1    8550 3350
-	-1   0    0    -1  
-$EndComp
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-	7900 4400 8150 4400
-$Comp
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-U 1 1 622D7C74
-P 9150 3050
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-F 1 "10k/1%" H 9220 3005 50  0000 L CNN
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-F 3 "~" H 9150 3050 50  0001 C CNN
-	1    9150 3050
-	1    0    0    -1  
-$EndComp
-$Comp
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-U 1 1 622D8703
-P 9150 3450
-F 0 "R136" H 9220 3496 50  0000 L CNN
-F 1 "10k/1%" H 9220 3405 50  0000 L CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 9080 3450 50  0001 C CNN
-F 3 "~" H 9150 3450 50  0001 C CNN
-	1    9150 3450
-	1    0    0    -1  
-$EndComp
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-Connection ~ 9150 3250
-Wire Wire Line
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-Wire Wire Line
-	8850 3250 9150 3250
-Wire Wire Line
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-Wire Wire Line
-	8950 3450 8850 3450
-Wire Wire Line
-	8950 3850 8950 3450
-Wire Wire Line
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-Wire Wire Line
-	8000 3850 8950 3850
-Wire Wire Line
-	7900 4500 8000 4500
-Wire Wire Line
-	8000 4500 8000 3850
-Connection ~ 8000 3850
-Wire Wire Line
-	6800 3200 6800 3050
-Text Label 7550 3200 0    50   ~ 0
-+3V3A
-$Comp
-L Device:C C91
-U 1 1 62308E49
-P 7400 3350
-F 0 "C91" H 7515 3396 50  0000 L CNN
-F 1 "10uF" H 7515 3305 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 7438 3200 50  0001 C CNN
-F 3 "~" H 7400 3350 50  0001 C CNN
-	1    7400 3350
-	1    0    0    -1  
-$EndComp
-$Comp
-L power:GND #PWR0160
-U 1 1 6230C6C8
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-F 1 "GND" H 7405 3427 50  0000 C CNN
-F 2 "" H 7400 3600 50  0001 C CNN
-F 3 "" H 7400 3600 50  0001 C CNN
-	1    7400 3600
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	7300 3200 7400 3200
-Connection ~ 7400 3200
-Wire Wire Line
-	7400 3200 7550 3200
-Wire Wire Line
-	7400 3500 7400 3600
-Text Label 8400 4700 0    50   ~ 0
-+3V3A
-Text Label 9150 2750 0    50   ~ 0
-+3V3A
-Wire Wire Line
-	9150 2900 9150 2850
-Wire Wire Line
-	8650 3050 8650 2850
-Wire Wire Line
-	8650 2850 9150 2850
-Connection ~ 9150 2850
-Wire Wire Line
-	9150 2850 9150 2750
-Wire Wire Line
-	8650 3650 8650 3750
-Wire Wire Line
-	8650 3750 9150 3750
-Wire Wire Line
-	9150 3750 9150 3600
-$Comp
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-U 1 1 623172E5
-P 9150 3850
-F 0 "#PWR0163" H 9150 3600 50  0001 C CNN
-F 1 "GND" H 9155 3677 50  0000 C CNN
-F 2 "" H 9150 3850 50  0001 C CNN
-F 3 "" H 9150 3850 50  0001 C CNN
-	1    9150 3850
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	9150 3750 9150 3850
-Connection ~ 9150 3750
-$Comp
-L Device:C C92
-U 1 1 6232E952
-P 7500 5450
-F 0 "C92" H 7615 5496 50  0000 L CNN
-F 1 "1uF" H 7615 5405 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 7538 5300 50  0001 C CNN
-F 3 "~" H 7500 5450 50  0001 C CNN
-	1    7500 5450
-	1    0    0    -1  
-$EndComp
-$Comp
-L Device:R R134
-U 1 1 62330B74
-P 7200 5200
-F 0 "R134" V 6993 5200 50  0000 C CNN
-F 1 "1k" V 7084 5200 50  0000 C CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 7130 5200 50  0001 C CNN
-F 3 "~" H 7200 5200 50  0001 C CNN
-	1    7200 5200
-	0    1    1    0   
-$EndComp
-$Comp
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-U 1 1 62338366
-P 7500 5700
-F 0 "#PWR0161" H 7500 5450 50  0001 C CNN
-F 1 "GND" H 7505 5527 50  0000 C CNN
-F 2 "" H 7500 5700 50  0001 C CNN
-F 3 "" H 7500 5700 50  0001 C CNN
-	1    7500 5700
-	1    0    0    -1  
-$EndComp
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-	7500 5300 7500 5200
-Connection ~ 7500 5200
-Wire Wire Line
-	7500 5200 7350 5200
-Wire Wire Line
-	7500 5200 7650 5200
-Wire Wire Line
-	7050 5200 6900 5200
-Wire Wire Line
-	6900 5200 6900 4400
-Wire Wire Line
-	6900 4400 7100 4400
-Wire Wire Line
-	7500 5600 7500 5700
-Wire Wire Line
-	5450 4800 5450 5000
-Wire Wire Line
-	5950 4300 6050 4300
-Connection ~ 6050 4300
-Wire Wire Line
-	6050 4300 6400 4300
-Wire Wire Line
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-Connection ~ 5450 4300
-Wire Wire Line
-	5450 4300 5450 4500
-Wire Wire Line
-	5650 5000 5450 5000
-Connection ~ 5450 5000
-Wire Wire Line
-	5450 5000 5450 5400
-Wire Wire Line
-	5950 5000 6050 5000
-Connection ~ 6050 5000
-Wire Wire Line
-	6050 5000 6400 5000
-Text HLabel 4200 2350 1    50   Input ~ 0
-12V_SW
-Wire Wire Line
-	5450 3400 5450 4300
-Wire Wire Line
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-Wire Wire Line
-	4900 3600 4900 3500
-Wire Wire Line
-	4900 3400 4800 3400
-Wire Wire Line
-	4800 3500 4900 3500
-Connection ~ 4900 3500
-Wire Wire Line
-	4900 3500 4900 3400
-Wire Wire Line
-	5450 3400 4900 3400
-Connection ~ 5450 3400
-Connection ~ 4900 3400
-$Comp
-L power:GND #PWR0155
-U 1 1 627712E5
-P 4200 4650
-F 0 "#PWR0155" H 4200 4400 50  0001 C CNN
-F 1 "GND" H 4205 4477 50  0000 C CNN
-F 2 "" H 4200 4650 50  0001 C CNN
-F 3 "" H 4200 4650 50  0001 C CNN
-	1    4200 4650
-	1    0    0    -1  
-$EndComp
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-U 1 1 62772446
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-F 0 "#PWR0156" H 4500 2650 50  0001 C CNN
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-F 2 "" H 4500 2900 50  0001 C CNN
-F 3 "" H 4500 2900 50  0001 C CNN
-	1    4500 2900
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	4400 3100 4400 3000
-Wire Wire Line
-	4400 3000 4500 3000
-Wire Wire Line
-	4500 3000 4500 3100
-Wire Wire Line
-	4500 2900 4500 3000
-Connection ~ 4500 3000
-Wire Wire Line
-	3900 3400 3800 3400
-Wire Wire Line
-	3800 3400 3800 3500
-Wire Wire Line
-	3800 3700 3900 3700
-Wire Wire Line
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-Connection ~ 3800 3600
-Wire Wire Line
-	3800 3600 3800 3700
-Wire Wire Line
-	3900 3500 3800 3500
-Connection ~ 3800 3500
-Wire Wire Line
-	3800 3500 3800 3600
-$Comp
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-U 1 1 6277EC72
-P 4400 4300
-F 0 "R126" H 4100 4350 50  0000 L CNN
-F 1 "100k/1%" H 4000 4250 50  0000 L CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 4330 4300 50  0001 C CNN
-F 3 "~" H 4400 4300 50  0001 C CNN
-	1    4400 4300
-	1    0    0    -1  
-$EndComp
-$Comp
-L Device:R R127
-U 1 1 6278110F
-P 4650 4300
-F 0 "R127" H 4720 4346 50  0000 L CNN
-F 1 "120k/1%" H 4720 4255 50  0000 L CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 4580 4300 50  0001 C CNN
-F 3 "~" H 4650 4300 50  0001 C CNN
-	1    4650 4300
-	1    0    0    -1  
-$EndComp
-$Comp
-L Device:C C89
-U 1 1 6278162C
-P 4950 3950
-F 0 "C89" H 5065 3996 50  0000 L CNN
-F 1 "0.1uF" H 5065 3905 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 4988 3800 50  0001 C CNN
-F 3 "~" H 4950 3950 50  0001 C CNN
-	1    4950 3950
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
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-Wire Wire Line
-	4650 4450 4650 4550
-Wire Wire Line
-	4650 4550 4400 4550
-Connection ~ 4200 4550
-Wire Wire Line
-	4200 4550 4200 4650
-Wire Wire Line
-	4400 4450 4400 4550
-Connection ~ 4400 4550
-Wire Wire Line
-	4400 4550 4200 4550
-Wire Wire Line
-	4400 4150 4400 3950
-Wire Wire Line
-	4500 3950 4500 4050
-Wire Wire Line
-	4500 4050 4650 4050
-Wire Wire Line
-	4650 4050 4650 4150
-Wire Wire Line
-	4950 4100 4950 4550
-Wire Wire Line
-	4950 4550 4650 4550
-Connection ~ 4650 4550
-Wire Wire Line
-	4800 3700 4950 3700
-Wire Wire Line
-	4950 3700 4950 3800
-$Comp
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-U 1 1 6279EA0A
-P 3800 3150
-F 0 "#PWR0154" H 3800 3000 50  0001 C CNN
-F 1 "+12V" H 3815 3323 50  0000 C CNN
-F 2 "" H 3800 3150 50  0001 C CNN
-F 3 "" H 3800 3150 50  0001 C CNN
-	1    3800 3150
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	3800 3150 3800 3400
-Connection ~ 3800 3400
-Text HLabel 4300 2350 1    50   Input ~ 0
-12V_OUT_FAULT
-$Comp
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-U 1 1 62740A70
-P 4400 3250
-F 0 "U16" H 4844 3021 50  0000 L CNN
-F 1 "TPS2590" H 4844 2930 50  0000 L CNN
-F 2 "Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm" H 4400 3250 50  0001 C CNN
-F 3 "" H 4400 3250 50  0001 C CNN
-	1    4400 3250
-	1    0    0    -1  
-$EndComp
-$Comp
-L Device:R R128
-U 1 1 628126CC
-P 4700 2450
-F 0 "R128" V 4493 2450 50  0000 C CNN
-F 1 "10k" V 4584 2450 50  0000 C CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 4630 2450 50  0001 C CNN
-F 3 "~" H 4700 2450 50  0001 C CNN
-	1    4700 2450
-	0    1    1    0   
-$EndComp
-$Comp
-L Device:R R129
-U 1 1 6282003A
-P 4700 2550
-F 0 "R129" V 4493 2550 50  0000 C CNN
-F 1 "10k" V 4584 2550 50  0000 C CNN
-F 2 "Resistor_SMD:R_0402_1005Metric" V 4630 2550 50  0001 C CNN
-F 3 "~" H 4700 2550 50  0001 C CNN
-	1    4700 2550
-	0    -1   -1   0   
-$EndComp
-Wire Wire Line
-	4850 2450 4950 2450
-Wire Wire Line
-	4950 2450 4950 2550
-Wire Wire Line
-	4950 2550 4850 2550
-$Comp
-L power:+3V3 #PWR0157
-U 1 1 62841214
-P 4950 2300
-F 0 "#PWR0157" H 4950 2150 50  0001 C CNN
-F 1 "+3V3" H 4965 2473 50  0000 C CNN
-F 2 "" H 4950 2300 50  0001 C CNN
-F 3 "" H 4950 2300 50  0001 C CNN
-	1    4950 2300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	4950 2300 4950 2450
-Connection ~ 4950 2450
-Wire Wire Line
-	4200 2350 4200 2550
-Wire Wire Line
-	4300 2350 4300 2450
-Wire Wire Line
-	4550 2450 4300 2450
-Connection ~ 4300 2450
-Wire Wire Line
-	4300 2450 4300 3100
-Wire Wire Line
-	4550 2550 4200 2550
-Connection ~ 4200 2550
-Wire Wire Line
-	4200 2550 4200 3100
-$Comp
-L Device:C C98
-U 1 1 63198E1A
-P 9800 3300
-F 0 "C98" H 9915 3346 50  0000 L CNN
-F 1 "0.1uF" H 9915 3255 50  0000 L CNN
-F 2 "Capacitor_SMD:C_0402_1005Metric" H 9838 3150 50  0001 C CNN
-F 3 "~" H 9800 3300 50  0001 C CNN
-	1    9800 3300
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	9800 2850 9150 2850
-Wire Wire Line
-	9150 3750 9800 3750
-Wire Wire Line
-	9800 2850 9800 3150
-Wire Wire Line
-	9800 3450 9800 3750
-Text HLabel 8000 3150 1    50   Input ~ 0
-12V_CURRENT_REF
-Wire Wire Line
-	8000 3150 8000 3350
-Connection ~ 8000 3350
-$EndSCHEMATC
diff --git a/MCU.sch b/MCU.sch
index f72005d..0cdae21 100644
--- a/MCU.sch
+++ b/MCU.sch
@@ -1093,7 +1093,6 @@ Text HLabel 5400 2950 2    50   Input ~ 0
 CPU_FPGA_CRESET
 Wire Wire Line
 	5000 6350 5400 6350
-NoConn ~ 3000 5350
 $Comp
 L TestAutomation:FTSH-105-XX-X-DV J7
 U 1 1 6258FCEE
@@ -1420,7 +1419,6 @@ Text HLabel 5400 3450 2    50   Input ~ 0
 CPU_ADC9
 Wire Wire Line
 	5400 3450 5000 3450
-NoConn ~ 5000 5450
 $Comp
 L Connector_Generic:Conn_02x12_Odd_Even J9
 U 1 1 62043672
@@ -1450,4 +1448,12 @@ Wire Wire Line
 Wire Wire Line
 	8600 4700 8600 4800
 Connection ~ 8600 4800
+Text HLabel 2600 5350 0    50   Input ~ 0
+3V3MP_OUT_FAULT
+Wire Wire Line
+	2600 5350 3000 5350
+Text HLabel 5400 5450 2    50   Input ~ 0
+CPU_3V3MP_SW
+Wire Wire Line
+	5400 5450 5000 5450
 $EndSCHEMATC
diff --git a/Power.sch b/Power.sch
index 95e90a4..0240844 100644
--- a/Power.sch
+++ b/Power.sch
@@ -1204,24 +1204,6 @@ F 3 "" H 8100 4900 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L Device:D_Schottky D?
-U 1 1 61905BD3
-P 2700 6600
-AR Path="/60E4702B/61905BD3" Ref="D?"  Part="1" 
-AR Path="/60C0E996/61905BD3" Ref="D?"  Part="1" 
-AR Path="/60C2FE2A/61905BD3" Ref="D5"  Part="1" 
-F 0 "D5" H 2600 6500 50  0000 L CNN
-F 1 "SS16" H 2750 6500 50  0000 L CNN
-F 2 "Diode_SMD:D_SMA" H 2700 6600 50  0001 C CNN
-F 3 "~" H 2700 6600 50  0001 C CNN
-	1    2700 6600
-	-1   0    0    1   
-$EndComp
-Wire Wire Line
-	2900 7000 2900 7050
-Text GLabel 2900 7050 3    50   Input ~ 0
-+3V3MP
-$Comp
 L Device:LED D7
 U 1 1 62135C47
 P 6500 1000
@@ -1820,23 +1802,6 @@ F 3 "" H 1200 6400 50  0001 C CNN
 	1    1200 6400
 	1    0    0    -1  
 $EndComp
-$Comp
-L Device:Polyfuse F2
-U 1 1 63235C00
-P 2900 6850
-F 0 "F2" V 2800 6850 50  0000 C CNN
-F 1 "JK-SMD0805-050/6V" V 3050 6850 50  0000 C CNN
-F 2 "Fuse:Fuse_0805_2012Metric" H 2950 6650 50  0001 L CNN
-F 3 "~" H 2900 6850 50  0001 C CNN
-	1    2900 6850
-	1    0    0    -1  
-$EndComp
-Wire Wire Line
-	2250 6600 2550 6600
-Wire Wire Line
-	2900 6700 2900 6600
-Wire Wire Line
-	2900 6600 2850 6600
 Wire Wire Line
 	2300 5400 2750 5400
 $Comp
diff --git a/PowerOutputs.sch b/PowerOutputs.sch
new file mode 100644
index 0000000..71d61a0
--- /dev/null
+++ b/PowerOutputs.sch
@@ -0,0 +1,838 @@
+EESchema Schematic File Version 4
+EELAYER 30 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 8 8
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
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+F 0 "R133" H 5120 2146 50  0000 L CNN
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+F 2 "Resistor_SMD:R_0402_1005Metric" V 4980 2100 50  0001 C CNN
+F 3 "~" H 5050 2100 50  0001 C CNN
+	1    5050 2100
+	0    -1   -1   0   
+$EndComp
+$Comp
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+F 0 "D22" V 4689 1982 50  0000 R CNN
+F 1 "LED_12V_OUT" V 4598 1982 50  0000 R CNN
+F 2 "LED_SMD:LED_0603_1608Metric" H 4650 2100 50  0001 C CNN
+F 3 "~" H 4650 2100 50  0001 C CNN
+	1    4650 2100
+	-1   0    0    1   
+$EndComp
+$Comp
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+F 2 "" H 5350 2250 50  0001 C CNN
+F 3 "" H 5350 2250 50  0001 C CNN
+	1    5350 2250
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	4800 2100 4900 2100
+Wire Wire Line
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+Wire Wire Line
+	5350 2100 5350 2250
+Text GLabel 4450 4100 2    50   Input ~ 0
++12V_OUT
+Wire Wire Line
+	4450 4100 4350 4100
+$Comp
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+P 4350 3350
+F 0 "R130" V 4143 3350 50  0000 C CNN
+F 1 "0.03/1%/3W" V 4234 3350 50  0000 C CNN
+F 2 "Resistor_SMD:R_2010_5025Metric" V 4280 3350 50  0001 C CNN
+F 3 "~" H 4350 3350 50  0001 C CNN
+	1    4350 3350
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	6800 3300 6900 3300
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+F 2 "Package_TO_SOT_SMD:TSOT-23-8" H 6400 3200 50  0001 C CNN
+F 3 "https://www.ti.com/lit/ds/symlink/ina190.pdf" H 6400 3200 50  0001 C CNN
+	1    6400 3200
+	-1   0    0    1   
+$EndComp
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+F 0 "#PWR0162" H 7250 2850 50  0001 C CNN
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+F 3 "" H 7250 3100 50  0001 C CNN
+	1    7250 3100
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+$EndComp
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+F 3 "" H 5700 1750 50  0001 C CNN
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+	1    0    0    -1  
+$EndComp
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+F 1 "10uH" V 6149 1900 50  0000 C CNN
+F 2 "Inductor_SMD:L_0603_1608Metric" H 6050 1900 50  0001 C CNN
+F 3 "~" H 6050 1900 50  0001 C CNN
+	1    6050 1900
+	0    -1   -1   0   
+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+$Comp
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+F 3 "~" H 7050 3250 50  0001 C CNN
+	1    7050 3250
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+$EndComp
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+Connection ~ 7050 3100
+Wire Wire Line
+	7050 3400 6900 3400
+Connection ~ 7050 3400
+Connection ~ 6900 3400
+$Comp
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+F 3 "~" H 4950 3350 50  0001 C CNN
+	1    4950 3350
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 6228FFFD
+P 4700 3000
+F 0 "R131" V 4493 3000 50  0000 C CNN
+F 1 "100" V 4584 3000 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 4630 3000 50  0001 C CNN
+F 3 "~" H 4700 3000 50  0001 C CNN
+	1    4700 3000
+	0    1    1    0   
+$EndComp
+$Comp
+L Device:R R132
+U 1 1 622966C0
+P 4700 3700
+F 0 "R132" V 4493 3700 50  0000 C CNN
+F 1 "100" V 4584 3700 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 4630 3700 50  0001 C CNN
+F 3 "~" H 4700 3700 50  0001 C CNN
+	1    4700 3700
+	0    1    1    0   
+$EndComp
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+Wire Wire Line
+	4950 3500 4950 3700
+Wire Wire Line
+	5300 3700 5300 3400
+Wire Wire Line
+	5300 3300 5300 3000
+Wire Wire Line
+	5300 3300 6000 3300
+Wire Wire Line
+	5300 3400 6000 3400
+Text HLabel 6550 3900 2    50   Input ~ 0
+12V_CURRENT
+$Comp
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+U 1 1 622C2DA6
+P 7450 2050
+F 0 "U18" H 7794 2096 50  0000 L CNN
+F 1 "LMV321" H 7794 2005 50  0000 L CNN
+F 2 "Package_TO_SOT_SMD:SOT-23-5" H 7450 2050 50  0001 L CNN
+F 3 "http://www.ti.com/lit/ds/symlink/lmv324.pdf" H 7450 2050 50  0001 C CNN
+	1    7450 2050
+	-1   0    0    -1  
+$EndComp
+Wire Wire Line
+	6800 3100 7050 3100
+$Comp
+L Device:R R135
+U 1 1 622D7C74
+P 8050 1750
+F 0 "R135" H 8120 1796 50  0000 L CNN
+F 1 "10k/1%" H 8120 1705 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 7980 1750 50  0001 C CNN
+F 3 "~" H 8050 1750 50  0001 C CNN
+	1    8050 1750
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:R R136
+U 1 1 622D8703
+P 8050 2150
+F 0 "R136" H 8120 2196 50  0000 L CNN
+F 1 "10k/1%" H 8120 2105 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 7980 2150 50  0001 C CNN
+F 3 "~" H 8050 2150 50  0001 C CNN
+	1    8050 2150
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Connection ~ 8050 1950
+Wire Wire Line
+	8050 1950 8050 2000
+Wire Wire Line
+	7750 1950 8050 1950
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	6900 2050 6900 2550
+Wire Wire Line
+	6900 2550 7850 2550
+Wire Wire Line
+	6800 3200 6900 3200
+Wire Wire Line
+	6900 3200 6900 2550
+Connection ~ 6900 2550
+Wire Wire Line
+	5700 1900 5700 1750
+Text Label 6450 1900 0    50   ~ 0
++3V3A
+$Comp
+L Device:C C91
+U 1 1 62308E49
+P 6300 2050
+F 0 "C91" H 6415 2096 50  0000 L CNN
+F 1 "10uF" H 6415 2005 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0402_1005Metric" H 6338 1900 50  0001 C CNN
+F 3 "~" H 6300 2050 50  0001 C CNN
+	1    6300 2050
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR0160
+U 1 1 6230C6C8
+P 6300 2300
+F 0 "#PWR0160" H 6300 2050 50  0001 C CNN
+F 1 "GND" H 6305 2127 50  0000 C CNN
+F 2 "" H 6300 2300 50  0001 C CNN
+F 3 "" H 6300 2300 50  0001 C CNN
+	1    6300 2300
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6200 1900 6300 1900
+Connection ~ 6300 1900
+Wire Wire Line
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+Wire Wire Line
+	6300 2200 6300 2300
+Text Label 7300 3400 0    50   ~ 0
++3V3A
+Text Label 8050 1450 0    50   ~ 0
++3V3A
+Wire Wire Line
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+Wire Wire Line
+	7550 1750 7550 1550
+Wire Wire Line
+	7550 1550 8050 1550
+Connection ~ 8050 1550
+Wire Wire Line
+	8050 1550 8050 1450
+Wire Wire Line
+	7550 2350 7550 2450
+Wire Wire Line
+	7550 2450 8050 2450
+Wire Wire Line
+	8050 2450 8050 2300
+$Comp
+L power:GND #PWR0163
+U 1 1 623172E5
+P 8050 2550
+F 0 "#PWR0163" H 8050 2300 50  0001 C CNN
+F 1 "GND" H 8055 2377 50  0000 C CNN
+F 2 "" H 8050 2550 50  0001 C CNN
+F 3 "" H 8050 2550 50  0001 C CNN
+	1    8050 2550
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	8050 2450 8050 2550
+Connection ~ 8050 2450
+$Comp
+L Device:C C92
+U 1 1 6232E952
+P 6400 4150
+F 0 "C92" H 6515 4196 50  0000 L CNN
+F 1 "1uF" H 6515 4105 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0402_1005Metric" H 6438 4000 50  0001 C CNN
+F 3 "~" H 6400 4150 50  0001 C CNN
+	1    6400 4150
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:R R134
+U 1 1 62330B74
+P 6100 3900
+F 0 "R134" V 5893 3900 50  0000 C CNN
+F 1 "1k" V 5984 3900 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 6030 3900 50  0001 C CNN
+F 3 "~" H 6100 3900 50  0001 C CNN
+	1    6100 3900
+	0    1    1    0   
+$EndComp
+$Comp
+L power:GND #PWR0161
+U 1 1 62338366
+P 6400 4400
+F 0 "#PWR0161" H 6400 4150 50  0001 C CNN
+F 1 "GND" H 6405 4227 50  0000 C CNN
+F 2 "" H 6400 4400 50  0001 C CNN
+F 3 "" H 6400 4400 50  0001 C CNN
+	1    6400 4400
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	6400 4000 6400 3900
+Connection ~ 6400 3900
+Wire Wire Line
+	6400 3900 6250 3900
+Wire Wire Line
+	6400 3900 6550 3900
+Wire Wire Line
+	5950 3900 5800 3900
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 4350 3000
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 4350 3700
+Wire Wire Line
+	4350 3700 4350 4100
+Wire Wire Line
+	4850 3700 4950 3700
+Connection ~ 4950 3700
+Wire Wire Line
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+Text HLabel 2900 1350 0    50   Input ~ 0
+12V_SW
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 3800 2200
+Wire Wire Line
+	3800 2200 3800 2100
+Wire Wire Line
+	4350 2100 3800 2100
+Connection ~ 4350 2100
+Connection ~ 3800 2100
+$Comp
+L power:GND #PWR0155
+U 1 1 627712E5
+P 3100 3350
+F 0 "#PWR0155" H 3100 3100 50  0001 C CNN
+F 1 "GND" H 3105 3177 50  0000 C CNN
+F 2 "" H 3100 3350 50  0001 C CNN
+F 3 "" H 3100 3350 50  0001 C CNN
+	1    3100 3350
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR0156
+U 1 1 62772446
+P 3500 1700
+F 0 "#PWR0156" H 3500 1450 50  0001 C CNN
+F 1 "GND" H 3505 1527 50  0000 C CNN
+F 2 "" H 3500 1700 50  0001 C CNN
+F 3 "" H 3500 1700 50  0001 C CNN
+	1    3500 1700
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	3300 1800 3300 1700
+Wire Wire Line
+	3300 1700 3400 1700
+Wire Wire Line
+	3400 1700 3400 1800
+Wire Wire Line
+	3500 1700 3400 1700
+Connection ~ 3400 1700
+Wire Wire Line
+	2800 2100 2700 2100
+Wire Wire Line
+	2700 2100 2700 2200
+Wire Wire Line
+	2700 2400 2800 2400
+Wire Wire Line
+	2800 2300 2700 2300
+Connection ~ 2700 2300
+Wire Wire Line
+	2700 2300 2700 2400
+Wire Wire Line
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+Connection ~ 2700 2200
+Wire Wire Line
+	2700 2200 2700 2300
+$Comp
+L Device:R R126
+U 1 1 6277EC72
+P 3300 3000
+F 0 "R126" H 3000 3050 50  0000 L CNN
+F 1 "200k/1%" H 2900 2950 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3230 3000 50  0001 C CNN
+F 3 "~" H 3300 3000 50  0001 C CNN
+	1    3300 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:R R127
+U 1 1 6278110F
+P 3550 3000
+F 0 "R127" H 3620 3046 50  0000 L CNN
+F 1 "200k/1%" H 3620 2955 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3480 3000 50  0001 C CNN
+F 3 "~" H 3550 3000 50  0001 C CNN
+	1    3550 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C C89
+U 1 1 6278162C
+P 3850 2650
+F 0 "C89" H 3965 2696 50  0000 L CNN
+F 1 "0.1uF" H 3965 2605 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0402_1005Metric" H 3888 2500 50  0001 C CNN
+F 3 "~" H 3850 2650 50  0001 C CNN
+	1    3850 2650
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3100 2650 3100 3250
+Wire Wire Line
+	3550 3150 3550 3250
+Wire Wire Line
+	3550 3250 3300 3250
+Connection ~ 3100 3250
+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 3300 3250
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	3850 3250 3550 3250
+Connection ~ 3550 3250
+Wire Wire Line
+	3700 2400 3850 2400
+Wire Wire Line
+	3850 2400 3850 2500
+$Comp
+L power:+12V #PWR0154
+U 1 1 6279EA0A
+P 2700 1850
+F 0 "#PWR0154" H 2700 1700 50  0001 C CNN
+F 1 "+12V" H 2715 2023 50  0000 C CNN
+F 2 "" H 2700 1850 50  0001 C CNN
+F 3 "" H 2700 1850 50  0001 C CNN
+	1    2700 1850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2700 1850 2700 2100
+Connection ~ 2700 2100
+Text HLabel 3100 1250 0    50   Input ~ 0
+12V_OUT_FAULT
+$Comp
+L TestAutomation:TPS2590 U16
+U 1 1 62740A70
+P 3300 1950
+F 0 "U16" H 3744 1721 50  0000 L CNN
+F 1 "TPS2590" H 3744 1630 50  0000 L CNN
+F 2 "Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm" H 3300 1950 50  0001 C CNN
+F 3 "" H 3300 1950 50  0001 C CNN
+	1    3300 1950
+	1    0    0    -1  
+$EndComp
+$Comp
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+U 1 1 628126CC
+P 3600 1250
+F 0 "R128" V 3393 1250 50  0000 C CNN
+F 1 "10k" V 3484 1250 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3530 1250 50  0001 C CNN
+F 3 "~" H 3600 1250 50  0001 C CNN
+	1    3600 1250
+	0    1    1    0   
+$EndComp
+$Comp
+L Device:R R129
+U 1 1 6282003A
+P 3600 1350
+F 0 "R129" V 3393 1350 50  0000 C CNN
+F 1 "10k" V 3484 1350 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3530 1350 50  0001 C CNN
+F 3 "~" H 3600 1350 50  0001 C CNN
+	1    3600 1350
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	3750 1250 3850 1250
+Wire Wire Line
+	3850 1250 3850 1350
+Wire Wire Line
+	3850 1350 3750 1350
+$Comp
+L power:+3V3 #PWR0157
+U 1 1 62841214
+P 4000 1250
+F 0 "#PWR0157" H 4000 1100 50  0001 C CNN
+F 1 "+3V3" H 4015 1423 50  0000 C CNN
+F 2 "" H 4000 1250 50  0001 C CNN
+F 3 "" H 4000 1250 50  0001 C CNN
+	1    4000 1250
+	0    1    1    0   
+$EndComp
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 3200 1250
+Wire Wire Line
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+Wire Wire Line
+	3450 1350 3100 1350
+Connection ~ 3100 1350
+Wire Wire Line
+	3100 1350 3100 1800
+$Comp
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+U 1 1 63198E1A
+P 8700 2000
+F 0 "C98" H 8815 2046 50  0000 L CNN
+F 1 "0.1uF" H 8815 1955 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0402_1005Metric" H 8738 1850 50  0001 C CNN
+F 3 "~" H 8700 2000 50  0001 C CNN
+	1    8700 2000
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	8050 2450 8700 2450
+Wire Wire Line
+	8700 1550 8700 1850
+Wire Wire Line
+	8700 2150 8700 2450
+Text HLabel 6900 1850 1    50   Input ~ 0
+12V_CURRENT_REF
+Wire Wire Line
+	6900 1850 6900 2050
+Connection ~ 6900 2050
+Text GLabel 4900 5800 2    50   Input ~ 0
++3V3MP
+Text HLabel 3400 5100 0    50   Input ~ 0
+3V3MP_SW
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	4300 5800 4200 5800
+Wire Wire Line
+	4200 5900 4300 5900
+Connection ~ 4300 5900
+Wire Wire Line
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+Connection ~ 4300 5800
+$Comp
+L power:GND #PWR0173
+U 1 1 620ED89D
+P 3600 7050
+F 0 "#PWR0173" H 3600 6800 50  0001 C CNN
+F 1 "GND" H 3605 6877 50  0000 C CNN
+F 2 "" H 3600 7050 50  0001 C CNN
+F 3 "" H 3600 7050 50  0001 C CNN
+	1    3600 7050
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR0174
+U 1 1 620ED8A3
+P 4000 5400
+F 0 "#PWR0174" H 4000 5150 50  0001 C CNN
+F 1 "GND" H 4005 5227 50  0000 C CNN
+F 2 "" H 4000 5400 50  0001 C CNN
+F 3 "" H 4000 5400 50  0001 C CNN
+	1    4000 5400
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
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+Wire Wire Line
+	3800 5400 3900 5400
+Wire Wire Line
+	3900 5400 3900 5500
+Wire Wire Line
+	3900 5400 4000 5400
+Connection ~ 3900 5400
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
+	3200 6100 3300 6100
+Wire Wire Line
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+Connection ~ 3200 6000
+Wire Wire Line
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+Wire Wire Line
+	3300 5900 3200 5900
+Connection ~ 3200 5900
+Wire Wire Line
+	3200 5900 3200 6000
+$Comp
+L Device:R R137
+U 1 1 620ED8B7
+P 3800 6700
+F 0 "R137" H 3500 6750 50  0000 L CNN
+F 1 "2M/1%" H 3400 6650 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3730 6700 50  0001 C CNN
+F 3 "~" H 3800 6700 50  0001 C CNN
+	1    3800 6700
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:R R138
+U 1 1 620ED8BD
+P 4050 6700
+F 0 "R138" H 4120 6746 50  0000 L CNN
+F 1 "2M/1%" H 4120 6655 50  0000 L CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 3980 6700 50  0001 C CNN
+F 3 "~" H 4050 6700 50  0001 C CNN
+	1    4050 6700
+	1    0    0    -1  
+$EndComp
+$Comp
+L Device:C C100
+U 1 1 620ED8C3
+P 4350 6350
+F 0 "C100" H 4465 6396 50  0000 L CNN
+F 1 "0.1uF" H 4465 6305 50  0000 L CNN
+F 2 "Capacitor_SMD:C_0402_1005Metric" H 4388 6200 50  0001 C CNN
+F 3 "~" H 4350 6350 50  0001 C CNN
+	1    4350 6350
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3600 6350 3600 6950
+Wire Wire Line
+	4050 6850 4050 6950
+Wire Wire Line
+	4050 6950 3800 6950
+Connection ~ 3600 6950
+Wire Wire Line
+	3600 6950 3600 7050
+Wire Wire Line
+	3800 6850 3800 6950
+Connection ~ 3800 6950
+Wire Wire Line
+	3800 6950 3600 6950
+Wire Wire Line
+	3800 6550 3800 6350
+Wire Wire Line
+	3900 6350 3900 6450
+Wire Wire Line
+	3900 6450 4050 6450
+Wire Wire Line
+	4050 6450 4050 6550
+Wire Wire Line
+	4350 6500 4350 6950
+Wire Wire Line
+	4350 6950 4050 6950
+Connection ~ 4050 6950
+Wire Wire Line
+	4200 6100 4350 6100
+Wire Wire Line
+	4350 6100 4350 6200
+Connection ~ 3200 5800
+Text HLabel 3600 5000 0    50   Input ~ 0
+3V3MP_OUT_FAULT
+$Comp
+L Device:R R139
+U 1 1 620ED8E9
+P 4100 5000
+F 0 "R139" V 3893 5000 50  0000 C CNN
+F 1 "10k" V 3984 5000 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 4030 5000 50  0001 C CNN
+F 3 "~" H 4100 5000 50  0001 C CNN
+	1    4100 5000
+	0    1    1    0   
+$EndComp
+$Comp
+L Device:R R140
+U 1 1 620ED8EF
+P 4100 5100
+F 0 "R140" V 3893 5100 50  0000 C CNN
+F 1 "10k" V 3984 5100 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" V 4030 5100 50  0001 C CNN
+F 3 "~" H 4100 5100 50  0001 C CNN
+	1    4100 5100
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	4250 5000 4350 5000
+Wire Wire Line
+	4350 5000 4350 5100
+Wire Wire Line
+	4350 5100 4250 5100
+$Comp
+L power:+3V3 #PWR0175
+U 1 1 620ED8F8
+P 4500 5000
+F 0 "#PWR0175" H 4500 4850 50  0001 C CNN
+F 1 "+3V3" H 4515 5173 50  0000 C CNN
+F 2 "" H 4500 5000 50  0001 C CNN
+F 3 "" H 4500 5000 50  0001 C CNN
+	1    4500 5000
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	4500 5000 4350 5000
+Connection ~ 4350 5000
+Wire Wire Line
+	3400 5100 3600 5100
+Wire Wire Line
+	3600 5000 3700 5000
+Wire Wire Line
+	3950 5000 3700 5000
+Wire Wire Line
+	3950 5100 3600 5100
+Wire Wire Line
+	4300 5800 4900 5800
+$Comp
+L TestAutomation:TPS2590 U19
+U 1 1 620ED8E3
+P 3800 5650
+F 0 "U19" H 4244 5421 50  0000 L CNN
+F 1 "TPS2590" H 4244 5330 50  0000 L CNN
+F 2 "Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm" H 3800 5650 50  0001 C CNN
+F 3 "" H 3800 5650 50  0001 C CNN
+	1    3800 5650
+	1    0    0    -1  
+$EndComp
+$Comp
+L power:+3V3 #PWR0172
+U 1 1 621541E1
+P 2800 5800
+F 0 "#PWR0172" H 2800 5650 50  0001 C CNN
+F 1 "+3V3" H 2815 5973 50  0000 C CNN
+F 2 "" H 2800 5800 50  0001 C CNN
+F 3 "" H 2800 5800 50  0001 C CNN
+	1    2800 5800
+	0    -1   -1   0   
+$EndComp
+Wire Wire Line
+	2800 5800 3200 5800
+Text Notes 2600 3700 0    50   ~ 0
+Current Limit = 201k/200k=1.005A
+Text Notes 3850 7150 0    50   ~ 0
+Current Limit = 201k/2M=100.5mA
+Wire Wire Line
+	3700 5000 3700 5500
+Connection ~ 3700 5000
+Wire Wire Line
+	3600 5500 3600 5100
+Connection ~ 3600 5100
+Connection ~ 3850 1250
+$EndSCHEMATC
diff --git a/TestAutomation.kicad_pcb b/TestAutomation.kicad_pcb
index 0aab701..5026ff2 100644
--- a/TestAutomation.kicad_pcb
+++ b/TestAutomation.kicad_pcb
@@ -3,10 +3,10 @@
   (general
     (thickness 1.6)
     (drawings 21)
-    (tracks 4466)
+    (tracks 4568)
     (zones 0)
-    (modules 318)
-    (nets 446)
+    (modules 322)
+    (nets 449)
   )
 
   (page A4)
@@ -113,443 +113,446 @@
   (net 6 /FPGA/GNDPLL1)
   (net 7 /FPGA/VCCPLL1)
   (net 8 +12V_OUT)
-  (net 9 /CurrentSenser/12V_CURRENT)
-  (net 10 +12V)
-  (net 11 +3V3)
-  (net 12 +2V5)
-  (net 13 +1V2)
-  (net 14 +5V)
-  (net 15 /Ethernet/+3V3A)
-  (net 16 "Net-(C44-Pad2)")
-  (net 17 /MCU/+3V3A)
-  (net 18 +3V3MP)
-  (net 19 "Net-(D4-Pad2)")
-  (net 20 "Net-(D4-Pad1)")
-  (net 21 "Net-(D9-Pad2)")
-  (net 22 "Net-(D10-Pad2)")
-  (net 23 "Net-(D11-Pad2)")
-  (net 24 /Ethernet/POE_VC-)
-  (net 25 /Ethernet/POE_VC+)
-  (net 26 "Net-(D17-Pad2)")
-  (net 27 "Net-(D19-Pad2)")
-  (net 28 "Net-(D21-Pad2)")
-  (net 29 /FPGA_IO1)
-  (net 30 /FPGA_IO3)
-  (net 31 /FPGA_IO5)
-  (net 32 /FPGA_IO7)
-  (net 33 /FPGA_IO9)
-  (net 34 /FPGA_IO11)
-  (net 35 /FPGA_IO13)
-  (net 36 /FPGA_IO15)
-  (net 37 /FPGA_IO14)
-  (net 38 /FPGA_IO12)
-  (net 39 /FPGA_IO10)
-  (net 40 /FPGA_IO8)
-  (net 41 /FPGA_IO6)
-  (net 42 /FPGA_IO4)
-  (net 43 /FPGA_IO2)
-  (net 44 /FPGA_IO0)
-  (net 45 /MCU/CPU_SWCLK)
-  (net 46 /MCU/CPU_SWDIO)
-  (net 47 /MCU/CPU_UART4_TX)
-  (net 48 /MCU/CPU_UART4_RX)
-  (net 49 /MCU/CPU_PWM_CH1)
-  (net 50 /MCU/CPU_PWM_CH2)
-  (net 51 /MCU/CPU_PWM_CH3)
-  (net 52 /MCU/CPU_PWM_CH4)
-  (net 53 /MCU/CPU_IIC2_SDA)
-  (net 54 /MCU/CPU_IIC2_SCL)
-  (net 55 /MCU/CPU_UART1_RX)
-  (net 56 /MCU/CPU_UART1_TX)
-  (net 57 /MCU/CPU_SPI2_MOSI)
-  (net 58 /MCU/CPU_SPI2_MISO)
-  (net 59 /MCU/CPU_SPI2_SCK)
-  (net 60 /MCU/CPU_SPI2_CS)
-  (net 61 /MCU/CPU_DAC1)
-  (net 62 /MCU/CPU_DAC0)
-  (net 63 /MCU/CPU_ADC5)
-  (net 64 /MCU/CPU_ADC4)
-  (net 65 /MCU/CPU_ADC3)
-  (net 66 /MCU/CPU_ADC2)
-  (net 67 /MCU/CPU_ADC1)
-  (net 68 /MCU/CPU_ADC0)
-  (net 69 /CurrentSenser/12V_SW)
-  (net 70 "Net-(Q1-Pad1)")
-  (net 71 "Net-(Q2-Pad3)")
-  (net 72 /MCU/CPU_RESET)
-  (net 73 "Net-(Q7-Pad1)")
-  (net 74 /MCU/CPU_POE_AT_EVENT)
-  (net 75 /MCU/CPU_POE_SRC_STATUS)
-  (net 76 /Ethernet/RJ45_LED_G)
-  (net 77 /Ethernet/RJ45_LED_Y)
-  (net 78 /CurrentSenser/+3V3A)
-  (net 79 /EEM0_IIC_SCL)
-  (net 80 /EEM0_IIC_SDA)
-  (net 81 /EEM1_IIC_SCL)
-  (net 82 /EEM1_IIC_SDA)
-  (net 83 /EEM2_IIC_SCL)
-  (net 84 /EEM2_IIC_SDA)
-  (net 85 /EEM0_7_N)
-  (net 86 /EEM0_6_P)
-  (net 87 /EEM0_5_N)
-  (net 88 /EEM0_4_P)
-  (net 89 /EEM0_3_N)
-  (net 90 /EEM0_2_P)
-  (net 91 /EEM0_1_N)
-  (net 92 /EEM0_0_P)
-  (net 93 /EEM0_7_P)
-  (net 94 /EEM0_6_N)
-  (net 95 /EEM0_5_P)
-  (net 96 /EEM0_4_N)
-  (net 97 /EEM0_3_P)
-  (net 98 /EEM0_2_N)
-  (net 99 /EEM0_1_P)
-  (net 100 /EEM0_0_N)
-  (net 101 /EEM1_7_N)
-  (net 102 /EEM1_6_P)
-  (net 103 /EEM1_5_N)
-  (net 104 /EEM1_4_P)
-  (net 105 /EEM1_3_N)
-  (net 106 /EEM1_2_P)
-  (net 107 /EEM1_1_N)
-  (net 108 /EEM1_0_P)
-  (net 109 /EEM1_7_P)
-  (net 110 /EEM1_6_N)
-  (net 111 /EEM1_5_P)
-  (net 112 /EEM1_4_N)
-  (net 113 /EEM1_3_P)
-  (net 114 /EEM1_2_N)
-  (net 115 /EEM1_1_P)
-  (net 116 /EEM1_0_N)
-  (net 117 /EEM2_7_N)
-  (net 118 /EEM2_6_P)
-  (net 119 /EEM2_5_N)
-  (net 120 /EEM2_4_P)
-  (net 121 /EEM2_3_N)
-  (net 122 /EEM2_2_P)
-  (net 123 /EEM2_1_N)
-  (net 124 /EEM2_0_P)
-  (net 125 /EEM2_7_P)
-  (net 126 /EEM2_6_N)
-  (net 127 /EEM2_5_P)
-  (net 128 /EEM2_4_N)
-  (net 129 /EEM2_3_P)
-  (net 130 /EEM2_2_N)
-  (net 131 /EEM2_1_P)
-  (net 132 /EEM2_0_N)
-  (net 133 /CDONE)
-  (net 134 /CRESET)
-  (net 135 /SPI_CS)
-  (net 136 /ENC_INT)
-  (net 137 /ADC_D0)
-  (net 138 /ADC_D1)
-  (net 139 /ADC_D2)
-  (net 140 /ADC_D3)
-  (net 141 /ADC_D4)
-  (net 142 /ADC_D5)
-  (net 143 /ADC_D6)
-  (net 144 /ADC_D7)
-  (net 145 /ADC_CLK)
-  (net 146 /FSMC_CLK)
-  (net 147 /FSMC_D15)
-  (net 148 /FSMC_D9)
-  (net 149 /FSMC_D10)
-  (net 150 /FSMC_D0)
-  (net 151 /FSMC_A7)
-  (net 152 /FSMC_NL)
-  (net 153 /FSMC_NBL0)
-  (net 154 /FSMC_D6)
-  (net 155 /FSMC_D7)
-  (net 156 /FSMC_D5)
-  (net 157 /FSMC_D1)
-  (net 158 /FSMC_A3)
-  (net 159 /FSMC_A1)
-  (net 160 /FSMC_NWAIT)
-  (net 161 /FSMC_NOE)
-  (net 162 /FSMC_D12)
-  (net 163 /FSMC_D8)
-  (net 164 /FSMC_D3)
-  (net 165 /FSMC_A4)
-  (net 166 /FSMC_A6)
-  (net 167 /FSMC_A0)
-  (net 168 /FSMC_NBL1)
-  (net 169 /FSMC_D14)
-  (net 170 /FSMC_D11)
-  (net 171 /FSMC_D4)
-  (net 172 /FSMC_A2)
-  (net 173 /FSMC_D13)
-  (net 174 /FSMC_D2)
-  (net 175 /FSMC_A5)
-  (net 176 /FSMC_NE1)
-  (net 177 /FSMC_NWE)
-  (net 178 /CSBSEL0)
-  (net 179 /SPI_MOSI)
-  (net 180 /SPI_MISO)
-  (net 181 /CSBSEL1)
-  (net 182 /SPI_SCK)
-  (net 183 /SPI_ENC_CS)
-  (net 184 "Net-(C7-Pad2)")
-  (net 185 "Net-(D8-Pad2)")
-  (net 186 "Net-(D10-Pad1)")
-  (net 187 "Net-(D11-Pad1)")
-  (net 188 "Net-(D21-Pad1)")
-  (net 189 "Net-(D22-Pad1)")
-  (net 190 "Net-(Q3-Pad1)")
-  (net 191 "Net-(Q4-Pad1)")
-  (net 192 "Net-(Q5-Pad6)")
-  (net 193 "Net-(Q5-Pad2)")
-  (net 194 "Net-(Q5-Pad3)")
-  (net 195 "Net-(D22-Pad2)")
-  (net 196 HSADC_IN)
-  (net 197 "Net-(J6-Pad12)")
-  (net 198 "Net-(J6-Pad10)")
-  (net 199 "Net-(J6-Pad6)")
-  (net 200 "Net-(J6-Pad2)")
-  (net 201 "Net-(J6-Pad3)")
-  (net 202 "Net-(J6-Pad1)")
-  (net 203 "Net-(SW3-Pad2)")
-  (net 204 /FPGA/LVDS0_0_P)
-  (net 205 /FPGA/LVDS0_0_N)
-  (net 206 /FPGA/LVDS0_1_P)
-  (net 207 /FPGA/LVDS0_1_N)
-  (net 208 /FPGA/LVDS0_2_P)
-  (net 209 /FPGA/LVDS0_2_N)
-  (net 210 /FPGA/LVDS0_3_P)
-  (net 211 /FPGA/LVDS0_3_N)
-  (net 212 /FPGA/LVDS0_4_P)
-  (net 213 /FPGA/LVDS0_4_N)
-  (net 214 /FPGA/LVDS0_5_P)
-  (net 215 /FPGA/LVDS0_5_N)
-  (net 216 /FPGA/LVDS0_6_P)
-  (net 217 /FPGA/LVDS0_6_N)
-  (net 218 /FPGA/LVDS0_7_P)
-  (net 219 /FPGA/LVDS0_7_N)
-  (net 220 /FPGA/LVDS1_0_P)
-  (net 221 /FPGA/LVDS1_0_N)
-  (net 222 /FPGA/LVDS1_1_P)
-  (net 223 /FPGA/LVDS1_1_N)
-  (net 224 /FPGA/LVDS1_2_P)
-  (net 225 /FPGA/LVDS1_2_N)
-  (net 226 /FPGA/LVDS1_3_P)
-  (net 227 /FPGA/LVDS1_3_N)
-  (net 228 /FPGA/LVDS1_4_P)
-  (net 229 /FPGA/LVDS1_4_N)
-  (net 230 /FPGA/LVDS1_5_P)
-  (net 231 /FPGA/LVDS1_5_N)
-  (net 232 /FPGA/LVDS1_6_P)
-  (net 233 /FPGA/LVDS1_6_N)
-  (net 234 /FPGA/LVDS1_7_P)
-  (net 235 /FPGA/LVDS1_7_N)
-  (net 236 /FPGA/LVDS2_0_P)
-  (net 237 /FPGA/LVDS2_0_N)
-  (net 238 /FPGA/LVDS2_1_P)
-  (net 239 /FPGA/LVDS2_1_N)
-  (net 240 /FPGA/LVDS2_2_P)
-  (net 241 /FPGA/LVDS2_2_N)
-  (net 242 /FPGA/LVDS2_3_P)
-  (net 243 /FPGA/LVDS2_3_N)
-  (net 244 /FPGA/LVDS2_4_P)
-  (net 245 /FPGA/LVDS2_4_N)
-  (net 246 /FPGA/LVDS2_5_P)
-  (net 247 /FPGA/LVDS2_5_N)
-  (net 248 /FPGA/LVDS2_6_P)
-  (net 249 /FPGA/LVDS2_6_N)
-  (net 250 /FPGA/LVDS2_7_P)
-  (net 251 /FPGA/LVDS2_7_N)
-  (net 252 /FPGA/FPGA_LED)
-  (net 253 /FPGA/FPGA_KEY)
-  (net 254 /IIC_SCL)
-  (net 255 /IIC_SDA)
-  (net 256 "Net-(R135-Pad2)")
-  (net 257 +6V)
-  (net 258 "Net-(R126-Pad1)")
-  (net 259 /CurrentSenser/12V_OUT_FAULT)
-  (net 260 "Net-(C4-Pad1)")
-  (net 261 "Net-(C5-Pad1)")
-  (net 262 "Net-(C8-Pad2)")
-  (net 263 "Net-(C44-Pad1)")
-  (net 264 "Net-(C45-Pad2)")
-  (net 265 "Net-(C45-Pad1)")
-  (net 266 "Net-(C47-Pad1)")
-  (net 267 "Net-(C50-Pad2)")
-  (net 268 "Net-(C51-Pad1)")
-  (net 269 "Net-(C57-Pad1)")
-  (net 270 "Net-(C59-Pad1)")
-  (net 271 "Net-(C60-Pad1)")
-  (net 272 "Net-(C67-Pad2)")
-  (net 273 "Net-(C70-Pad2)")
-  (net 274 "Net-(C70-Pad1)")
-  (net 275 "Net-(C71-Pad2)")
-  (net 276 "Net-(C71-Pad1)")
-  (net 277 "Net-(C72-Pad1)")
-  (net 278 "Net-(C73-Pad1)")
-  (net 279 "Net-(C74-Pad1)")
-  (net 280 "Net-(C75-Pad1)")
-  (net 281 "Net-(C76-Pad1)")
-  (net 282 "Net-(C77-Pad2)")
-  (net 283 "Net-(C89-Pad1)")
-  (net 284 "Net-(C90-Pad2)")
-  (net 285 "Net-(C90-Pad1)")
-  (net 286 "Net-(D7-Pad2)")
-  (net 287 "Net-(R2-Pad1)")
-  (net 288 "Net-(R3-Pad1)")
-  (net 289 "Net-(R5-Pad2)")
-  (net 290 "Net-(R87-Pad2)")
-  (net 291 "Net-(R89-Pad1)")
-  (net 292 "Net-(R94-Pad1)")
-  (net 293 "Net-(R98-Pad2)")
-  (net 294 "Net-(R111-Pad1)")
-  (net 295 "Net-(R113-Pad1)")
-  (net 296 "Net-(R114-Pad2)")
-  (net 297 "Net-(R124-Pad1)")
-  (net 298 "Net-(R127-Pad1)")
-  (net 299 "Net-(R134-Pad2)")
-  (net 300 "Net-(U10-Pad2)")
-  (net 301 /MCU/CPU_ADC7)
-  (net 302 /MCU/CPU_ADC6)
-  (net 303 /CurrentSenser/12V_CURRENT_REF)
-  (net 304 "Net-(D5-Pad1)")
-  (net 305 "Net-(D23-Pad1)")
-  (net 306 "Net-(J7-Pad06)")
-  (net 307 "Net-(J7-Pad07)")
-  (net 308 "Net-(J7-Pad08)")
-  (net 309 "Net-(J7-Pad09)")
-  (net 310 "Net-(J7-Pad10)")
-  (net 311 "Net-(U4-PadT7)")
-  (net 312 "Net-(U4-PadT6)")
-  (net 313 "Net-(U4-PadR16)")
-  (net 314 "Net-(U4-PadR15)")
-  (net 315 "Net-(U4-PadR14)")
-  (net 316 "Net-(U4-PadR4)")
-  (net 317 "Net-(U4-PadP14)")
-  (net 318 "Net-(U4-PadP10)")
-  (net 319 "Net-(U4-PadP9)")
-  (net 320 "Net-(U4-PadP8)")
-  (net 321 "Net-(U4-PadP7)")
-  (net 322 "Net-(U4-PadP6)")
-  (net 323 "Net-(U4-PadP5)")
-  (net 324 "Net-(U4-PadP4)")
-  (net 325 "Net-(U4-PadN12)")
-  (net 326 "Net-(U4-PadN10)")
-  (net 327 "Net-(U4-PadN9)")
-  (net 328 "Net-(U4-PadN7)")
-  (net 329 "Net-(U4-PadN6)")
-  (net 330 "Net-(U4-PadN5)")
-  (net 331 "Net-(U4-PadN3)")
-  (net 332 "Net-(U4-PadM14)")
-  (net 333 "Net-(U4-PadM13)")
-  (net 334 "Net-(U4-PadM12)")
-  (net 335 "Net-(U4-PadM11)")
-  (net 336 "Net-(U4-PadM9)")
-  (net 337 "Net-(U4-PadM8)")
-  (net 338 "Net-(U4-PadM7)")
-  (net 339 "Net-(U4-PadM6)")
-  (net 340 "Net-(U4-PadM3)")
-  (net 341 "Net-(U4-PadL14)")
-  (net 342 "Net-(U4-PadL13)")
-  (net 343 "Net-(U4-PadL12)")
-  (net 344 "Net-(U4-PadL11)")
-  (net 345 "Net-(U4-PadL10)")
-  (net 346 "Net-(U4-PadL9)")
-  (net 347 "Net-(U4-PadL5)")
-  (net 348 "Net-(U4-PadK14)")
-  (net 349 "Net-(U4-PadK13)")
-  (net 350 "Net-(U4-PadK12)")
-  (net 351 "Net-(U4-PadJ16)")
-  (net 352 "Net-(U4-PadJ14)")
-  (net 353 "Net-(U4-PadJ13)")
-  (net 354 "Net-(U4-PadJ12)")
-  (net 355 "Net-(U4-PadJ11)")
-  (net 356 "Net-(U4-PadJ10)")
-  (net 357 "Net-(U4-PadH14)")
-  (net 358 "Net-(U4-PadH13)")
-  (net 359 "Net-(U4-PadH12)")
-  (net 360 "Net-(U4-PadH11)")
-  (net 361 "Net-(U4-PadG15)")
-  (net 362 "Net-(U4-PadG13)")
-  (net 363 "Net-(U4-PadG12)")
-  (net 364 "Net-(U4-PadG11)")
-  (net 365 "Net-(U4-PadG10)")
-  (net 366 "Net-(U4-PadF15)")
-  (net 367 "Net-(U4-PadF12)")
-  (net 368 "Net-(U4-PadF9)")
-  (net 369 "Net-(U4-PadE16)")
-  (net 370 "Net-(U4-PadE14)")
-  (net 371 "Net-(U4-PadE13)")
-  (net 372 "Net-(U4-PadE11)")
-  (net 373 "Net-(U4-PadE10)")
-  (net 374 "Net-(U4-PadE9)")
-  (net 375 "Net-(U4-PadE6)")
-  (net 376 "Net-(U4-PadE5)")
-  (net 377 "Net-(U4-PadD16)")
-  (net 378 "Net-(U4-PadD14)")
-  (net 379 "Net-(U4-PadD13)")
-  (net 380 "Net-(U4-PadD12)")
-  (net 381 "Net-(U4-PadD11)")
-  (net 382 "Net-(U4-PadD10)")
-  (net 383 "Net-(U4-PadD9)")
-  (net 384 "Net-(U4-PadD8)")
-  (net 385 "Net-(U4-PadD7)")
-  (net 386 "Net-(U4-PadD6)")
-  (net 387 "Net-(U4-PadD5)")
-  (net 388 "Net-(U4-PadD4)")
-  (net 389 "Net-(U4-PadD3)")
-  (net 390 "Net-(U4-PadC6)")
-  (net 391 "Net-(U4-PadC5)")
-  (net 392 "Net-(U4-PadC4)")
-  (net 393 "Net-(U4-PadB16)")
-  (net 394 "Net-(U6-Pad4)")
-  (net 395 "Net-(U11-Pad4)")
-  (net 396 "Net-(U12-Pad4)")
-  (net 397 "Net-(U12-Pad5)")
-  (net 398 "Net-(U12-Pad9)")
-  (net 399 "Net-(U12-Pad6)")
-  (net 400 "Net-(U13-Pad2)")
-  (net 401 "Net-(U14-Pad61)")
-  (net 402 "Net-(U14-Pad60)")
-  (net 403 "Net-(U14-Pad59)")
-  (net 404 "Net-(U14-Pad58)")
-  (net 405 "Net-(U14-Pad57)")
-  (net 406 "Net-(U14-Pad56)")
-  (net 407 "Net-(U14-Pad55)")
-  (net 408 "Net-(U14-Pad54)")
-  (net 409 "Net-(U14-Pad53)")
-  (net 410 "Net-(U14-Pad48)")
-  (net 411 "Net-(U14-Pad45)")
-  (net 412 "Net-(U14-Pad44)")
-  (net 413 "Net-(U14-Pad43)")
-  (net 414 "Net-(U14-Pad42)")
-  (net 415 "Net-(U14-Pad41)")
-  (net 416 "Net-(U14-Pad40)")
-  (net 417 "Net-(U14-Pad39)")
-  (net 418 "Net-(U14-Pad38)")
-  (net 419 "Net-(U14-Pad37)")
-  (net 420 "Net-(U14-Pad36)")
-  (net 421 "Net-(U14-Pad35)")
-  (net 422 "Net-(U14-Pad33)")
-  (net 423 "Net-(U14-Pad20)")
-  (net 424 "Net-(U14-Pad19)")
-  (net 425 "Net-(U14-Pad13)")
-  (net 426 "Net-(U14-Pad12)")
-  (net 427 "Net-(U14-Pad11)")
-  (net 428 "Net-(U14-Pad10)")
-  (net 429 "Net-(U14-Pad9)")
-  (net 430 "Net-(U14-Pad8)")
-  (net 431 "Net-(U14-Pad7)")
-  (net 432 "Net-(U14-Pad6)")
-  (net 433 "Net-(U14-Pad5)")
-  (net 434 "Net-(U15-Pad18)")
-  (net 435 "Net-(U15-Pad73)")
-  (net 436 "Net-(U15-Pad83)")
-  (net 437 "Net-(U16-Pad6)")
-  (net 438 "Net-(U17-Pad6)")
-  (net 439 "Net-(C74-Pad2)")
-  (net 440 "Net-(C99-Pad2)")
-  (net 441 "Net-(C99-Pad1)")
-  (net 442 "Net-(R88-Pad2)")
-  (net 443 /FPGA/FPGA_Clock)
-  (net 444 "Net-(U4-PadP15)")
-  (net 445 "Net-(U4-PadB13)")
+  (net 9 +12V)
+  (net 10 +3V3)
+  (net 11 +2V5)
+  (net 12 +1V2)
+  (net 13 +5V)
+  (net 14 /Ethernet/+3V3A)
+  (net 15 "Net-(C44-Pad2)")
+  (net 16 /MCU/+3V3A)
+  (net 17 +3V3MP)
+  (net 18 "Net-(D4-Pad2)")
+  (net 19 "Net-(D4-Pad1)")
+  (net 20 "Net-(D9-Pad2)")
+  (net 21 "Net-(D10-Pad2)")
+  (net 22 "Net-(D11-Pad2)")
+  (net 23 /Ethernet/POE_VC-)
+  (net 24 /Ethernet/POE_VC+)
+  (net 25 "Net-(D17-Pad2)")
+  (net 26 "Net-(D19-Pad2)")
+  (net 27 "Net-(D21-Pad2)")
+  (net 28 /FPGA_IO1)
+  (net 29 /FPGA_IO3)
+  (net 30 /FPGA_IO5)
+  (net 31 /FPGA_IO7)
+  (net 32 /FPGA_IO9)
+  (net 33 /FPGA_IO11)
+  (net 34 /FPGA_IO13)
+  (net 35 /FPGA_IO15)
+  (net 36 /FPGA_IO14)
+  (net 37 /FPGA_IO12)
+  (net 38 /FPGA_IO10)
+  (net 39 /FPGA_IO8)
+  (net 40 /FPGA_IO6)
+  (net 41 /FPGA_IO4)
+  (net 42 /FPGA_IO2)
+  (net 43 /FPGA_IO0)
+  (net 44 /MCU/CPU_SWCLK)
+  (net 45 /MCU/CPU_SWDIO)
+  (net 46 /MCU/CPU_UART4_TX)
+  (net 47 /MCU/CPU_UART4_RX)
+  (net 48 /MCU/CPU_PWM_CH1)
+  (net 49 /MCU/CPU_PWM_CH2)
+  (net 50 /MCU/CPU_PWM_CH3)
+  (net 51 /MCU/CPU_PWM_CH4)
+  (net 52 /MCU/CPU_IIC2_SDA)
+  (net 53 /MCU/CPU_IIC2_SCL)
+  (net 54 /MCU/CPU_UART1_RX)
+  (net 55 /MCU/CPU_UART1_TX)
+  (net 56 /MCU/CPU_SPI2_MOSI)
+  (net 57 /MCU/CPU_SPI2_MISO)
+  (net 58 /MCU/CPU_SPI2_SCK)
+  (net 59 /MCU/CPU_SPI2_CS)
+  (net 60 /MCU/CPU_DAC1)
+  (net 61 /MCU/CPU_DAC0)
+  (net 62 /MCU/CPU_ADC5)
+  (net 63 /MCU/CPU_ADC4)
+  (net 64 /MCU/CPU_ADC3)
+  (net 65 /MCU/CPU_ADC2)
+  (net 66 /MCU/CPU_ADC1)
+  (net 67 /MCU/CPU_ADC0)
+  (net 68 "Net-(Q1-Pad1)")
+  (net 69 "Net-(Q2-Pad3)")
+  (net 70 /MCU/CPU_RESET)
+  (net 71 "Net-(Q7-Pad1)")
+  (net 72 /MCU/CPU_POE_AT_EVENT)
+  (net 73 /MCU/CPU_POE_SRC_STATUS)
+  (net 74 /Ethernet/RJ45_LED_G)
+  (net 75 /Ethernet/RJ45_LED_Y)
+  (net 76 /EEM0_IIC_SCL)
+  (net 77 /EEM0_IIC_SDA)
+  (net 78 /EEM1_IIC_SCL)
+  (net 79 /EEM1_IIC_SDA)
+  (net 80 /EEM2_IIC_SCL)
+  (net 81 /EEM2_IIC_SDA)
+  (net 82 /EEM0_7_N)
+  (net 83 /EEM0_6_P)
+  (net 84 /EEM0_5_N)
+  (net 85 /EEM0_4_P)
+  (net 86 /EEM0_3_N)
+  (net 87 /EEM0_2_P)
+  (net 88 /EEM0_1_N)
+  (net 89 /EEM0_0_P)
+  (net 90 /EEM0_7_P)
+  (net 91 /EEM0_6_N)
+  (net 92 /EEM0_5_P)
+  (net 93 /EEM0_4_N)
+  (net 94 /EEM0_3_P)
+  (net 95 /EEM0_2_N)
+  (net 96 /EEM0_1_P)
+  (net 97 /EEM0_0_N)
+  (net 98 /EEM1_7_N)
+  (net 99 /EEM1_6_P)
+  (net 100 /EEM1_5_N)
+  (net 101 /EEM1_4_P)
+  (net 102 /EEM1_3_N)
+  (net 103 /EEM1_2_P)
+  (net 104 /EEM1_1_N)
+  (net 105 /EEM1_0_P)
+  (net 106 /EEM1_7_P)
+  (net 107 /EEM1_6_N)
+  (net 108 /EEM1_5_P)
+  (net 109 /EEM1_4_N)
+  (net 110 /EEM1_3_P)
+  (net 111 /EEM1_2_N)
+  (net 112 /EEM1_1_P)
+  (net 113 /EEM1_0_N)
+  (net 114 /EEM2_7_N)
+  (net 115 /EEM2_6_P)
+  (net 116 /EEM2_5_N)
+  (net 117 /EEM2_4_P)
+  (net 118 /EEM2_3_N)
+  (net 119 /EEM2_2_P)
+  (net 120 /EEM2_1_N)
+  (net 121 /EEM2_0_P)
+  (net 122 /EEM2_7_P)
+  (net 123 /EEM2_6_N)
+  (net 124 /EEM2_5_P)
+  (net 125 /EEM2_4_N)
+  (net 126 /EEM2_3_P)
+  (net 127 /EEM2_2_N)
+  (net 128 /EEM2_1_P)
+  (net 129 /EEM2_0_N)
+  (net 130 /CDONE)
+  (net 131 /CRESET)
+  (net 132 /SPI_CS)
+  (net 133 /ENC_INT)
+  (net 134 /ADC_D0)
+  (net 135 /ADC_D1)
+  (net 136 /ADC_D2)
+  (net 137 /ADC_D3)
+  (net 138 /ADC_D4)
+  (net 139 /ADC_D5)
+  (net 140 /ADC_D6)
+  (net 141 /ADC_D7)
+  (net 142 /ADC_CLK)
+  (net 143 /FSMC_CLK)
+  (net 144 /FSMC_D15)
+  (net 145 /FSMC_D9)
+  (net 146 /FSMC_D10)
+  (net 147 /FSMC_D0)
+  (net 148 /FSMC_A7)
+  (net 149 /FSMC_NL)
+  (net 150 /FSMC_NBL0)
+  (net 151 /FSMC_D6)
+  (net 152 /FSMC_D7)
+  (net 153 /FSMC_D5)
+  (net 154 /FSMC_D1)
+  (net 155 /FSMC_A3)
+  (net 156 /FSMC_A1)
+  (net 157 /FSMC_NWAIT)
+  (net 158 /FSMC_NOE)
+  (net 159 /FSMC_D12)
+  (net 160 /FSMC_D8)
+  (net 161 /FSMC_D3)
+  (net 162 /FSMC_A4)
+  (net 163 /FSMC_A6)
+  (net 164 /FSMC_A0)
+  (net 165 /FSMC_NBL1)
+  (net 166 /FSMC_D14)
+  (net 167 /FSMC_D11)
+  (net 168 /FSMC_D4)
+  (net 169 /FSMC_A2)
+  (net 170 /FSMC_D13)
+  (net 171 /FSMC_D2)
+  (net 172 /FSMC_A5)
+  (net 173 /FSMC_NE1)
+  (net 174 /FSMC_NWE)
+  (net 175 /CSBSEL0)
+  (net 176 /SPI_MOSI)
+  (net 177 /SPI_MISO)
+  (net 178 /CSBSEL1)
+  (net 179 /SPI_SCK)
+  (net 180 /SPI_ENC_CS)
+  (net 181 "Net-(C7-Pad2)")
+  (net 182 "Net-(D8-Pad2)")
+  (net 183 "Net-(D10-Pad1)")
+  (net 184 "Net-(D11-Pad1)")
+  (net 185 "Net-(D21-Pad1)")
+  (net 186 "Net-(D22-Pad1)")
+  (net 187 "Net-(Q3-Pad1)")
+  (net 188 "Net-(Q4-Pad1)")
+  (net 189 "Net-(Q5-Pad6)")
+  (net 190 "Net-(Q5-Pad2)")
+  (net 191 "Net-(Q5-Pad3)")
+  (net 192 "Net-(D22-Pad2)")
+  (net 193 HSADC_IN)
+  (net 194 "Net-(J6-Pad12)")
+  (net 195 "Net-(J6-Pad10)")
+  (net 196 "Net-(J6-Pad6)")
+  (net 197 "Net-(J6-Pad2)")
+  (net 198 "Net-(J6-Pad3)")
+  (net 199 "Net-(J6-Pad1)")
+  (net 200 "Net-(SW3-Pad2)")
+  (net 201 /FPGA/LVDS0_0_P)
+  (net 202 /FPGA/LVDS0_0_N)
+  (net 203 /FPGA/LVDS0_1_P)
+  (net 204 /FPGA/LVDS0_1_N)
+  (net 205 /FPGA/LVDS0_2_P)
+  (net 206 /FPGA/LVDS0_2_N)
+  (net 207 /FPGA/LVDS0_3_P)
+  (net 208 /FPGA/LVDS0_3_N)
+  (net 209 /FPGA/LVDS0_4_P)
+  (net 210 /FPGA/LVDS0_4_N)
+  (net 211 /FPGA/LVDS0_5_P)
+  (net 212 /FPGA/LVDS0_5_N)
+  (net 213 /FPGA/LVDS0_6_P)
+  (net 214 /FPGA/LVDS0_6_N)
+  (net 215 /FPGA/LVDS0_7_P)
+  (net 216 /FPGA/LVDS0_7_N)
+  (net 217 /FPGA/LVDS1_0_P)
+  (net 218 /FPGA/LVDS1_0_N)
+  (net 219 /FPGA/LVDS1_1_P)
+  (net 220 /FPGA/LVDS1_1_N)
+  (net 221 /FPGA/LVDS1_2_P)
+  (net 222 /FPGA/LVDS1_2_N)
+  (net 223 /FPGA/LVDS1_3_P)
+  (net 224 /FPGA/LVDS1_3_N)
+  (net 225 /FPGA/LVDS1_4_P)
+  (net 226 /FPGA/LVDS1_4_N)
+  (net 227 /FPGA/LVDS1_5_P)
+  (net 228 /FPGA/LVDS1_5_N)
+  (net 229 /FPGA/LVDS1_6_P)
+  (net 230 /FPGA/LVDS1_6_N)
+  (net 231 /FPGA/LVDS1_7_P)
+  (net 232 /FPGA/LVDS1_7_N)
+  (net 233 /FPGA/LVDS2_0_P)
+  (net 234 /FPGA/LVDS2_0_N)
+  (net 235 /FPGA/LVDS2_1_P)
+  (net 236 /FPGA/LVDS2_1_N)
+  (net 237 /FPGA/LVDS2_2_P)
+  (net 238 /FPGA/LVDS2_2_N)
+  (net 239 /FPGA/LVDS2_3_P)
+  (net 240 /FPGA/LVDS2_3_N)
+  (net 241 /FPGA/LVDS2_4_P)
+  (net 242 /FPGA/LVDS2_4_N)
+  (net 243 /FPGA/LVDS2_5_P)
+  (net 244 /FPGA/LVDS2_5_N)
+  (net 245 /FPGA/LVDS2_6_P)
+  (net 246 /FPGA/LVDS2_6_N)
+  (net 247 /FPGA/LVDS2_7_P)
+  (net 248 /FPGA/LVDS2_7_N)
+  (net 249 /FPGA/FPGA_LED)
+  (net 250 /FPGA/FPGA_KEY)
+  (net 251 /IIC_SCL)
+  (net 252 /IIC_SDA)
+  (net 253 "Net-(R135-Pad2)")
+  (net 254 +6V)
+  (net 255 "Net-(R126-Pad1)")
+  (net 256 "Net-(C4-Pad1)")
+  (net 257 "Net-(C5-Pad1)")
+  (net 258 "Net-(C8-Pad2)")
+  (net 259 "Net-(C44-Pad1)")
+  (net 260 "Net-(C45-Pad2)")
+  (net 261 "Net-(C45-Pad1)")
+  (net 262 "Net-(C47-Pad1)")
+  (net 263 "Net-(C50-Pad2)")
+  (net 264 "Net-(C51-Pad1)")
+  (net 265 "Net-(C57-Pad1)")
+  (net 266 "Net-(C59-Pad1)")
+  (net 267 "Net-(C60-Pad1)")
+  (net 268 "Net-(C67-Pad2)")
+  (net 269 "Net-(C70-Pad2)")
+  (net 270 "Net-(C70-Pad1)")
+  (net 271 "Net-(C71-Pad2)")
+  (net 272 "Net-(C71-Pad1)")
+  (net 273 "Net-(C72-Pad1)")
+  (net 274 "Net-(C73-Pad1)")
+  (net 275 "Net-(C74-Pad1)")
+  (net 276 "Net-(C75-Pad1)")
+  (net 277 "Net-(C76-Pad1)")
+  (net 278 "Net-(C77-Pad2)")
+  (net 279 "Net-(C89-Pad1)")
+  (net 280 "Net-(C90-Pad2)")
+  (net 281 "Net-(C90-Pad1)")
+  (net 282 "Net-(D7-Pad2)")
+  (net 283 "Net-(R2-Pad1)")
+  (net 284 "Net-(R3-Pad1)")
+  (net 285 "Net-(R5-Pad2)")
+  (net 286 "Net-(R87-Pad2)")
+  (net 287 "Net-(R89-Pad1)")
+  (net 288 "Net-(R94-Pad1)")
+  (net 289 "Net-(R98-Pad2)")
+  (net 290 "Net-(R111-Pad1)")
+  (net 291 "Net-(R113-Pad1)")
+  (net 292 "Net-(R114-Pad2)")
+  (net 293 "Net-(R124-Pad1)")
+  (net 294 "Net-(R127-Pad1)")
+  (net 295 "Net-(R134-Pad2)")
+  (net 296 "Net-(U10-Pad2)")
+  (net 297 /MCU/CPU_ADC7)
+  (net 298 /MCU/CPU_ADC6)
+  (net 299 "Net-(D23-Pad1)")
+  (net 300 "Net-(J7-Pad06)")
+  (net 301 "Net-(J7-Pad07)")
+  (net 302 "Net-(J7-Pad08)")
+  (net 303 "Net-(J7-Pad09)")
+  (net 304 "Net-(J7-Pad10)")
+  (net 305 "Net-(U4-PadT7)")
+  (net 306 "Net-(U4-PadT6)")
+  (net 307 "Net-(U4-PadR16)")
+  (net 308 "Net-(U4-PadR15)")
+  (net 309 "Net-(U4-PadR14)")
+  (net 310 "Net-(U4-PadR4)")
+  (net 311 "Net-(U4-PadP14)")
+  (net 312 "Net-(U4-PadP10)")
+  (net 313 "Net-(U4-PadP9)")
+  (net 314 "Net-(U4-PadP8)")
+  (net 315 "Net-(U4-PadP7)")
+  (net 316 "Net-(U4-PadP6)")
+  (net 317 "Net-(U4-PadP5)")
+  (net 318 "Net-(U4-PadP4)")
+  (net 319 "Net-(U4-PadN12)")
+  (net 320 "Net-(U4-PadN10)")
+  (net 321 "Net-(U4-PadN9)")
+  (net 322 "Net-(U4-PadN7)")
+  (net 323 "Net-(U4-PadN6)")
+  (net 324 "Net-(U4-PadN5)")
+  (net 325 "Net-(U4-PadN3)")
+  (net 326 "Net-(U4-PadM14)")
+  (net 327 "Net-(U4-PadM13)")
+  (net 328 "Net-(U4-PadM12)")
+  (net 329 "Net-(U4-PadM11)")
+  (net 330 "Net-(U4-PadM9)")
+  (net 331 "Net-(U4-PadM8)")
+  (net 332 "Net-(U4-PadM7)")
+  (net 333 "Net-(U4-PadM6)")
+  (net 334 "Net-(U4-PadM3)")
+  (net 335 "Net-(U4-PadL14)")
+  (net 336 "Net-(U4-PadL13)")
+  (net 337 "Net-(U4-PadL12)")
+  (net 338 "Net-(U4-PadL11)")
+  (net 339 "Net-(U4-PadL10)")
+  (net 340 "Net-(U4-PadL9)")
+  (net 341 "Net-(U4-PadL5)")
+  (net 342 "Net-(U4-PadK14)")
+  (net 343 "Net-(U4-PadK13)")
+  (net 344 "Net-(U4-PadK12)")
+  (net 345 "Net-(U4-PadJ16)")
+  (net 346 "Net-(U4-PadJ14)")
+  (net 347 "Net-(U4-PadJ13)")
+  (net 348 "Net-(U4-PadJ12)")
+  (net 349 "Net-(U4-PadJ11)")
+  (net 350 "Net-(U4-PadJ10)")
+  (net 351 "Net-(U4-PadH14)")
+  (net 352 "Net-(U4-PadH13)")
+  (net 353 "Net-(U4-PadH12)")
+  (net 354 "Net-(U4-PadH11)")
+  (net 355 "Net-(U4-PadG15)")
+  (net 356 "Net-(U4-PadG13)")
+  (net 357 "Net-(U4-PadG12)")
+  (net 358 "Net-(U4-PadG11)")
+  (net 359 "Net-(U4-PadG10)")
+  (net 360 "Net-(U4-PadF15)")
+  (net 361 "Net-(U4-PadF12)")
+  (net 362 "Net-(U4-PadF9)")
+  (net 363 "Net-(U4-PadE16)")
+  (net 364 "Net-(U4-PadE14)")
+  (net 365 "Net-(U4-PadE13)")
+  (net 366 "Net-(U4-PadE11)")
+  (net 367 "Net-(U4-PadE10)")
+  (net 368 "Net-(U4-PadE9)")
+  (net 369 "Net-(U4-PadE6)")
+  (net 370 "Net-(U4-PadE5)")
+  (net 371 "Net-(U4-PadD16)")
+  (net 372 "Net-(U4-PadD14)")
+  (net 373 "Net-(U4-PadD13)")
+  (net 374 "Net-(U4-PadD12)")
+  (net 375 "Net-(U4-PadD11)")
+  (net 376 "Net-(U4-PadD10)")
+  (net 377 "Net-(U4-PadD9)")
+  (net 378 "Net-(U4-PadD8)")
+  (net 379 "Net-(U4-PadD7)")
+  (net 380 "Net-(U4-PadD6)")
+  (net 381 "Net-(U4-PadD5)")
+  (net 382 "Net-(U4-PadD4)")
+  (net 383 "Net-(U4-PadD3)")
+  (net 384 "Net-(U4-PadC6)")
+  (net 385 "Net-(U4-PadC5)")
+  (net 386 "Net-(U4-PadC4)")
+  (net 387 "Net-(U4-PadB16)")
+  (net 388 "Net-(U6-Pad4)")
+  (net 389 "Net-(U11-Pad4)")
+  (net 390 "Net-(U12-Pad4)")
+  (net 391 "Net-(U12-Pad5)")
+  (net 392 "Net-(U12-Pad9)")
+  (net 393 "Net-(U12-Pad6)")
+  (net 394 "Net-(U13-Pad2)")
+  (net 395 "Net-(U14-Pad61)")
+  (net 396 "Net-(U14-Pad60)")
+  (net 397 "Net-(U14-Pad59)")
+  (net 398 "Net-(U14-Pad58)")
+  (net 399 "Net-(U14-Pad57)")
+  (net 400 "Net-(U14-Pad56)")
+  (net 401 "Net-(U14-Pad55)")
+  (net 402 "Net-(U14-Pad54)")
+  (net 403 "Net-(U14-Pad53)")
+  (net 404 "Net-(U14-Pad48)")
+  (net 405 "Net-(U14-Pad45)")
+  (net 406 "Net-(U14-Pad44)")
+  (net 407 "Net-(U14-Pad43)")
+  (net 408 "Net-(U14-Pad42)")
+  (net 409 "Net-(U14-Pad41)")
+  (net 410 "Net-(U14-Pad40)")
+  (net 411 "Net-(U14-Pad39)")
+  (net 412 "Net-(U14-Pad38)")
+  (net 413 "Net-(U14-Pad37)")
+  (net 414 "Net-(U14-Pad36)")
+  (net 415 "Net-(U14-Pad35)")
+  (net 416 "Net-(U14-Pad33)")
+  (net 417 "Net-(U14-Pad20)")
+  (net 418 "Net-(U14-Pad19)")
+  (net 419 "Net-(U14-Pad13)")
+  (net 420 "Net-(U14-Pad12)")
+  (net 421 "Net-(U14-Pad11)")
+  (net 422 "Net-(U14-Pad10)")
+  (net 423 "Net-(U14-Pad9)")
+  (net 424 "Net-(U14-Pad8)")
+  (net 425 "Net-(U14-Pad7)")
+  (net 426 "Net-(U14-Pad6)")
+  (net 427 "Net-(U14-Pad5)")
+  (net 428 "Net-(U15-Pad73)")
+  (net 429 "Net-(U16-Pad6)")
+  (net 430 "Net-(U17-Pad6)")
+  (net 431 "Net-(C74-Pad2)")
+  (net 432 "Net-(C99-Pad2)")
+  (net 433 "Net-(C99-Pad1)")
+  (net 434 "Net-(R88-Pad2)")
+  (net 435 /FPGA/FPGA_Clock)
+  (net 436 "Net-(U4-PadP15)")
+  (net 437 "Net-(U4-PadB13)")
+  (net 438 "Net-(C100-Pad1)")
+  (net 439 "Net-(R137-Pad1)")
+  (net 440 "Net-(R138-Pad1)")
+  (net 441 "Net-(U19-Pad6)")
+  (net 442 /PowerOutputs/+3V3A)
+  (net 443 /PowerOutputs/12V_CURRENT)
+  (net 444 /MCU/12V_OUT_FAULT)
+  (net 445 /PowerOutputs/12V_SW)
+  (net 446 /MCU/3V3MP_OUT_FAULT)
+  (net 447 /PowerOutputs/3V3MP_SW)
+  (net 448 /PowerOutputs/12V_CURRENT_REF)
 
   (net_class Default "This is the default net class."
     (clearance 0.0889)
@@ -581,11 +584,6 @@
     (add_net /CRESET)
     (add_net /CSBSEL0)
     (add_net /CSBSEL1)
-    (add_net /CurrentSenser/+3V3A)
-    (add_net /CurrentSenser/12V_CURRENT)
-    (add_net /CurrentSenser/12V_CURRENT_REF)
-    (add_net /CurrentSenser/12V_OUT_FAULT)
-    (add_net /CurrentSenser/12V_SW)
     (add_net /ENC_INT)
     (add_net /Ethernet/+3V3A)
     (add_net /Ethernet/POE_VC+)
@@ -651,6 +649,8 @@
     (add_net /IIC_SCL)
     (add_net /IIC_SDA)
     (add_net /MCU/+3V3A)
+    (add_net /MCU/12V_OUT_FAULT)
+    (add_net /MCU/3V3MP_OUT_FAULT)
     (add_net /MCU/CPU_ADC0)
     (add_net /MCU/CPU_ADC1)
     (add_net /MCU/CPU_ADC2)
@@ -680,6 +680,11 @@
     (add_net /MCU/CPU_UART1_TX)
     (add_net /MCU/CPU_UART4_RX)
     (add_net /MCU/CPU_UART4_TX)
+    (add_net /PowerOutputs/+3V3A)
+    (add_net /PowerOutputs/12V_CURRENT)
+    (add_net /PowerOutputs/12V_CURRENT_REF)
+    (add_net /PowerOutputs/12V_SW)
+    (add_net /PowerOutputs/3V3MP_SW)
     (add_net /SPI_CS)
     (add_net /SPI_ENC_CS)
     (add_net /SPI_MISO)
@@ -687,6 +692,7 @@
     (add_net /SPI_SCK)
     (add_net GND)
     (add_net HSADC_IN)
+    (add_net "Net-(C100-Pad1)")
     (add_net "Net-(C2-Pad1)")
     (add_net "Net-(C4-Pad1)")
     (add_net "Net-(C44-Pad1)")
@@ -732,7 +738,6 @@
     (add_net "Net-(D23-Pad1)")
     (add_net "Net-(D4-Pad1)")
     (add_net "Net-(D4-Pad2)")
-    (add_net "Net-(D5-Pad1)")
     (add_net "Net-(D7-Pad2)")
     (add_net "Net-(D8-Pad2)")
     (add_net "Net-(D9-Pad2)")
@@ -763,6 +768,8 @@
     (add_net "Net-(R127-Pad1)")
     (add_net "Net-(R134-Pad2)")
     (add_net "Net-(R135-Pad2)")
+    (add_net "Net-(R137-Pad1)")
+    (add_net "Net-(R138-Pad1)")
     (add_net "Net-(R2-Pad1)")
     (add_net "Net-(R3-Pad1)")
     (add_net "Net-(R5-Pad2)")
@@ -812,11 +819,10 @@
     (add_net "Net-(U14-Pad7)")
     (add_net "Net-(U14-Pad8)")
     (add_net "Net-(U14-Pad9)")
-    (add_net "Net-(U15-Pad18)")
     (add_net "Net-(U15-Pad73)")
-    (add_net "Net-(U15-Pad83)")
     (add_net "Net-(U16-Pad6)")
     (add_net "Net-(U17-Pad6)")
+    (add_net "Net-(U19-Pad6)")
     (add_net "Net-(U4-PadB13)")
     (add_net "Net-(U4-PadB16)")
     (add_net "Net-(U4-PadC4)")
@@ -1029,442 +1035,111 @@
     (add_net /FPGA/LVDS2_7_P)
   )
 
-  (module Connector_PinHeader_1.27mm:PinHeader_2x17_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 62005B8B)
-    (at 183.052 65.55 180)
-    (descr "surface-mounted straight pin header, 2x17, 1.27mm pitch, double rows")
-    (tags "Surface mounted pin header SMD 2x17 1.27mm double row")
-    (path /60CB9D41/6214914E)
+  (module Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm (layer F.Cu) (tedit 62078116) (tstamp 6208C9D6)
+    (at 195.49 131.54 90)
+    (descr "QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_noLead_generator.py")
+    (tags "QFN NoLead")
+    (path /60E3407A/620ED8E3)
     (attr smd)
-    (fp_text reference J5 (at -0.02 11.51) (layer F.SilkS)
+    (fp_text reference U19 (at -3.5 0 180) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value FPGA_IO (at -0.02 -12.27) (layer F.SilkS)
+    (fp_text value TPS2590 (at 0 3.32 90) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start 4.3 -11.3) (end -4.3 -11.3) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 4.3 11.3) (end 4.3 -11.3) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -4.3 11.3) (end 4.3 11.3) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -4.3 -11.3) (end -4.3 11.3) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 1.765 10.79) (end 1.765 10.855) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 10.79) (end -1.765 10.855) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.765 -10.855) (end 1.765 -10.79) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 -10.855) (end -1.765 -10.79) (layer F.SilkS) (width 0.12))
-    (fp_line (start -3.09 -10.79) (end -1.765 -10.79) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 10.855) (end 1.765 10.855) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 -10.855) (end 1.765 -10.855) (layer F.SilkS) (width 0.12))
-    (fp_line (start 2.75 10.36) (end 1.705 10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 9.96) (end 2.75 10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 9.96) (end 2.75 9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 10.36) (end -1.705 10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 9.96) (end -2.75 10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 9.96) (end -2.75 9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 9.09) (end 1.705 9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 8.69) (end 2.75 9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 8.69) (end 2.75 8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 9.09) (end -1.705 9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 8.69) (end -2.75 9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 8.69) (end -2.75 8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 7.82) (end 1.705 7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 7.42) (end 2.75 7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 7.42) (end 2.75 7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 7.82) (end -1.705 7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 7.42) (end -2.75 7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 7.42) (end -2.75 7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 6.55) (end 1.705 6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 6.15) (end 2.75 6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 6.15) (end 2.75 6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 6.55) (end -1.705 6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 6.15) (end -2.75 6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 6.15) (end -2.75 6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 5.28) (end 1.705 5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 4.88) (end 2.75 5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 4.88) (end 2.75 4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 5.28) (end -1.705 5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 4.88) (end -2.75 5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 4.88) (end -2.75 4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 4.01) (end 1.705 4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 3.61) (end 2.75 4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 3.61) (end 2.75 3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 4.01) (end -1.705 4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 3.61) (end -2.75 4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 3.61) (end -2.75 3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -3.61) (end 1.705 -3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -4.01) (end 2.75 -3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -4.01) (end 2.75 -4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -3.61) (end -1.705 -3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -4.01) (end -2.75 -3.61) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -4.01) (end -2.75 -4.01) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -4.88) (end 1.705 -4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -5.28) (end 2.75 -4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -5.28) (end 2.75 -5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -4.88) (end -1.705 -4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -5.28) (end -2.75 -4.88) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -5.28) (end -2.75 -5.28) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -6.15) (end 1.705 -6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -6.55) (end 2.75 -6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -6.55) (end 2.75 -6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -6.15) (end -1.705 -6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -6.55) (end -2.75 -6.15) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -6.55) (end -2.75 -6.55) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -7.42) (end 1.705 -7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -7.82) (end 2.75 -7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -7.82) (end 2.75 -7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -7.42) (end -1.705 -7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -7.82) (end -2.75 -7.42) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -7.82) (end -2.75 -7.82) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -8.69) (end 1.705 -8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -9.09) (end 2.75 -8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -9.09) (end 2.75 -9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -8.69) (end -1.705 -8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -9.09) (end -2.75 -8.69) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -9.09) (end -2.75 -9.09) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -9.96) (end 1.705 -9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -10.36) (end 2.75 -9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -10.36) (end 2.75 -10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -9.96) (end -1.705 -9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -10.36) (end -2.75 -9.96) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -10.36) (end -2.75 -10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -10.795) (end 1.705 10.795) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -10.36) (end -1.27 -10.795) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 10.795) (end -1.705 -10.36) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.27 -10.795) (end 1.705 -10.795) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 10.795) (end -1.705 10.795) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0 90) (layer F.Fab)
+    (fp_line (start 2.62 -2.62) (end -2.62 -2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.62 2.62) (end 2.62 -2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.62 2.62) (end 2.62 2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.62 -2.62) (end -2.62 2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 -1) (end -1 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2 2) (end -2 -1) (layer F.Fab) (width 0.1))
+    (fp_line (start 2 2) (end -2 2) (layer F.Fab) (width 0.1))
+    (fp_line (start 2 -2) (end 2 2) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -2) (end 2 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.385 -2.11) (end -2.11 -2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.11 2.11) (end 2.11 1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.385 2.11) (end 2.11 2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.11 2.11) (end -2.11 1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.385 2.11) (end -2.11 2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.11 -2.11) (end 2.11 -1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.385 -2.11) (end 2.11 -2.11) (layer F.SilkS) (width 0.12))
+    (fp_text user %R (at 0 0 90) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 34 smd rect (at 1.95 10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 14 +5V))
-    (pad 33 smd rect (at -1.95 10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 14 +5V))
-    (pad 32 smd rect (at 1.95 8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 36 /FPGA_IO15))
-    (pad 31 smd rect (at -1.95 8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+    (pad "" smd roundrect (at 0.675 0.675 90) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.229358))
+    (pad "" smd roundrect (at 0.675 -0.675 90) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.229358))
+    (pad "" smd roundrect (at -0.675 0.675 90) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.229358))
+    (pad "" smd roundrect (at -0.675 -0.675 90) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.229358))
+    (pad 17 smd rect (at 0 0 90) (size 2.7 2.7) (layers F.Cu F.Mask)
       (net 1 GND))
-    (pad 30 smd rect (at 1.95 7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 29 smd rect (at -1.95 7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 37 /FPGA_IO14))
-    (pad 28 smd rect (at 1.95 6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 35 /FPGA_IO13))
-    (pad 27 smd rect (at -1.95 6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+    (pad 16 smd roundrect (at -0.975 -1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 447 /PowerOutputs/3V3MP_SW))
+    (pad 15 smd roundrect (at -0.325 -1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 446 /MCU/3V3MP_OUT_FAULT))
+    (pad 14 smd roundrect (at 0.325 -1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
-    (pad 26 smd rect (at 1.95 5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 25 smd rect (at -1.95 5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 38 /FPGA_IO12))
-    (pad 24 smd rect (at 1.95 3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 34 /FPGA_IO11))
-    (pad 23 smd rect (at -1.95 3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+    (pad 13 smd roundrect (at 0.975 -1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
-    (pad 22 smd rect (at 1.95 2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 21 smd rect (at -1.95 2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 39 /FPGA_IO10))
-    (pad 20 smd rect (at 1.95 1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 33 /FPGA_IO9))
-    (pad 19 smd rect (at -1.95 1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+    (pad 12 smd roundrect (at 1.9625 -0.975 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 17 +3V3MP))
+    (pad 11 smd roundrect (at 1.9625 -0.325 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 17 +3V3MP))
+    (pad 10 smd roundrect (at 1.9625 0.325 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 17 +3V3MP))
+    (pad 9 smd roundrect (at 1.9625 0.975 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 438 "Net-(C100-Pad1)"))
+    (pad 8 smd roundrect (at 0.975 1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 440 "Net-(R138-Pad1)"))
+    (pad 7 smd roundrect (at 0.325 1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 439 "Net-(R137-Pad1)"))
+    (pad 6 smd roundrect (at -0.325 1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 441 "Net-(U19-Pad6)"))
+    (pad 5 smd roundrect (at -0.975 1.9625 90) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
-    (pad 18 smd rect (at 1.95 0 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 17 smd rect (at -1.95 0 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 40 /FPGA_IO8))
-    (pad 16 smd rect (at 1.95 -1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 32 /FPGA_IO7))
-    (pad 15 smd rect (at -1.95 -1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 14 smd rect (at 1.95 -2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 13 smd rect (at -1.95 -2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 41 /FPGA_IO6))
-    (pad 12 smd rect (at 1.95 -3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 31 /FPGA_IO5))
-    (pad 11 smd rect (at -1.95 -3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 10 smd rect (at 1.95 -5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 9 smd rect (at -1.95 -5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 42 /FPGA_IO4))
-    (pad 8 smd rect (at 1.95 -6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 30 /FPGA_IO3))
-    (pad 7 smd rect (at -1.95 -6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 6 smd rect (at 1.95 -7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 5 smd rect (at -1.95 -7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 43 /FPGA_IO2))
-    (pad 4 smd rect (at 1.95 -8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 29 /FPGA_IO1))
-    (pad 3 smd rect (at -1.95 -8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 2 smd rect (at 1.95 -10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 1 smd rect (at -1.95 -10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 44 /FPGA_IO0))
-    (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x17_P1.27mm_Vertical_SMD.wrl
+    (pad 4 smd roundrect (at -1.9625 0.975 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (pad 3 smd roundrect (at -1.9625 0.325 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (pad 2 smd roundrect (at -1.9625 -0.325 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (pad 1 smd roundrect (at -1.9625 -0.975 90) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
       (rotate (xyz 0 0 0))
     )
   )
 
-  (module Connector_PinHeader_1.27mm:PinHeader_2x12_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 62005D66)
-    (at 183.052 127.44)
-    (descr "surface-mounted straight pin header, 2x12, 1.27mm pitch, double rows")
-    (tags "Surface mounted pin header SMD 2x12 1.27mm double row")
-    (path /60C2FDBB/62043672)
-    (attr smd)
-    (fp_text reference J9 (at 0 -8.68) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value Analog (at 0 8.68) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 4.3 -8.15) (end -4.3 -8.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 4.3 8.15) (end 4.3 -8.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -4.3 8.15) (end 4.3 8.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -4.3 -8.15) (end -4.3 8.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 1.765 7.615) (end 1.765 7.68) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 7.615) (end -1.765 7.68) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.765 -7.68) (end 1.765 -7.615) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 -7.68) (end -1.765 -7.615) (layer F.SilkS) (width 0.12))
-    (fp_line (start -3.09 -7.615) (end -1.765 -7.615) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 7.68) (end 1.765 7.68) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.765 -7.68) (end 1.765 -7.68) (layer F.SilkS) (width 0.12))
-    (fp_line (start 2.75 7.185) (end 1.705 7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 6.785) (end 2.75 7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 6.785) (end 2.75 6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 7.185) (end -1.705 7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 6.785) (end -2.75 7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 6.785) (end -2.75 6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 5.915) (end 1.705 5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 5.515) (end 2.75 5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 5.515) (end 2.75 5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 5.915) (end -1.705 5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 5.515) (end -2.75 5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 5.515) (end -2.75 5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 4.645) (end 1.705 4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 4.245) (end 2.75 4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 4.245) (end 2.75 4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 4.645) (end -1.705 4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 4.245) (end -2.75 4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 4.245) (end -2.75 4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 3.375) (end 1.705 3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 2.975) (end 2.75 3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 2.975) (end 2.75 2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 3.375) (end -1.705 3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 2.975) (end -2.75 3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 2.975) (end -2.75 2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 2.105) (end 1.705 2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 1.705) (end 2.75 2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 1.705) (end 2.75 1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 2.105) (end -1.705 2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 1.705) (end -2.75 2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 1.705) (end -2.75 1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.835) (end 1.705 0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 0.435) (end 2.75 0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 0.435) (end 2.75 0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 0.835) (end -1.705 0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 0.435) (end -2.75 0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 0.435) (end -2.75 0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.435) (end 1.705 -0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -0.835) (end 2.75 -0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -0.835) (end 2.75 -0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -0.435) (end -1.705 -0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -0.835) (end -2.75 -0.435) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -0.835) (end -2.75 -0.835) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -1.705) (end 1.705 -1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -2.105) (end 2.75 -1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -2.105) (end 2.75 -2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -1.705) (end -1.705 -1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -2.105) (end -2.75 -1.705) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -2.105) (end -2.75 -2.105) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -2.975) (end 1.705 -2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -3.375) (end 2.75 -2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -3.375) (end 2.75 -3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -2.975) (end -1.705 -2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -3.375) (end -2.75 -2.975) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -3.375) (end -2.75 -3.375) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -4.245) (end 1.705 -4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -4.645) (end 2.75 -4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -4.645) (end 2.75 -4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -4.245) (end -1.705 -4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -4.645) (end -2.75 -4.245) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -4.645) (end -2.75 -4.645) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -5.515) (end 1.705 -5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -5.915) (end 2.75 -5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -5.915) (end 2.75 -5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -5.515) (end -1.705 -5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -5.915) (end -2.75 -5.515) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -5.915) (end -2.75 -5.915) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -6.785) (end 1.705 -6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start 2.75 -7.185) (end 2.75 -6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -7.185) (end 2.75 -7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -6.785) (end -1.705 -6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.75 -7.185) (end -2.75 -6.785) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -7.185) (end -2.75 -7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 -7.62) (end 1.705 7.62) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 -7.185) (end -1.27 -7.62) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.705 7.62) (end -1.705 -7.185) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.27 -7.62) (end 1.705 -7.62) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.705 7.62) (end -1.705 7.62) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0 90) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad 24 smd rect (at 1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 23 smd rect (at -1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 61 /MCU/CPU_DAC1))
-    (pad 22 smd rect (at 1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 21 smd rect (at -1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 62 /MCU/CPU_DAC0))
-    (pad 20 smd rect (at 1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 19 smd rect (at -1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 68 /MCU/CPU_ADC0))
-    (pad 18 smd rect (at 1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 17 smd rect (at -1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 67 /MCU/CPU_ADC1))
-    (pad 16 smd rect (at 1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 15 smd rect (at -1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 66 /MCU/CPU_ADC2))
-    (pad 14 smd rect (at 1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 13 smd rect (at -1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 65 /MCU/CPU_ADC3))
-    (pad 12 smd rect (at 1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 11 smd rect (at -1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 64 /MCU/CPU_ADC4))
-    (pad 10 smd rect (at 1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 9 smd rect (at -1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 63 /MCU/CPU_ADC5))
-    (pad 8 smd rect (at 1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 7 smd rect (at -1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 302 /MCU/CPU_ADC6))
-    (pad 6 smd rect (at 1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 5 smd rect (at -1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 301 /MCU/CPU_ADC7))
-    (pad 4 smd rect (at 1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 3 smd rect (at -1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 2 smd rect (at 1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 196 HSADC_IN))
-    (pad 1 smd rect (at -1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x12_P1.27mm_Vertical_SMD.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm (layer F.Cu) (tedit 5A0FD1B2) (tstamp 6114F25E)
-    (at 165.78 87.14 180)
-    (descr "SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package")
-    (tags "SMD SMT crystal")
-    (path /60C0E996/611ED7C3)
-    (attr smd)
-    (fp_text reference X1 (at 0 -2.45) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value SG-8002CE (at 0 2.45) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 2.1 -1.7) (end -2.1 -1.7) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.1 1.7) (end 2.1 1.7) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2 1.65) (end 2 1.65) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2 -1.65) (end -2 1.65) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 -1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 -1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0) (layer F.Fab)
-      (effects (font (size 0.7 0.7) (thickness 0.105)))
-    )
-    (pad 4 smd rect (at -1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad 3 smd rect (at 1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 442 "Net-(R88-Pad2)"))
-    (pad 2 smd rect (at 1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad 1 smd rect (at -1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6114E320)
-    (at 169.07 87.09 270)
+  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6208C08A)
+    (at 190.79 132.45 180)
     (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
     (tags resistor)
-    (path /60C0E996/611F4FD3)
+    (path /60E3407A/620ED8EF)
     (attr smd)
-    (fp_text reference R88 (at 0 -1.17 90) (layer F.SilkS)
+    (fp_text reference R140 (at 0.23 -3.02) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 22 (at 0 1.17 90) (layer F.Fab)
+    (fp_text value 10k (at 0 1.17) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
     (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
-    (fp_text user %R (at 0 0 90) (layer F.Fab)
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
-    (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 442 "Net-(R88-Pad2)"))
-    (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 443 /FPGA/FPGA_Clock))
+    (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 447 /PowerOutputs/3V3MP_SW))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -1472,6 +1147,150 @@
     )
   )
 
+  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6208C079)
+    (at 190.81 130.91)
+    (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /60E3407A/620ED8E9)
+    (attr smd)
+    (fp_text reference R139 (at -0.27 2.99) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 10k (at 0 1.17) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.26 0.26) (thickness 0.04)))
+    )
+    (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 446 /MCU/3V3MP_OUT_FAULT))
+    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 10 +3V3))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6208C068)
+    (at 200.62 132.5)
+    (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /60E3407A/620ED8BD)
+    (attr smd)
+    (fp_text reference R138 (at 3.2 0.76) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 2M/1% (at 0 1.17) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.26 0.26) (thickness 0.04)))
+    )
+    (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 440 "Net-(R138-Pad1)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6208C057)
+    (at 200.62 133.87)
+    (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /60E3407A/620ED8B7)
+    (attr smd)
+    (fp_text reference R137 (at 3.2 0.76) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 2M/1% (at 0 1.17) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.26 0.26) (thickness 0.04)))
+    )
+    (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 439 "Net-(R137-Pad1)"))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6208A246)
+    (at 200.62 131.13)
+    (descr "Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /60E3407A/620ED8C3)
+    (attr smd)
+    (fp_text reference C100 (at 3.14 0.57) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 0.1uF (at 0 1.16) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 0.91 0.46) (end -0.91 0.46) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.91 -0.46) (end 0.91 0.46) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.91 -0.46) (end 0.91 -0.46) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.91 0.46) (end -0.91 -0.46) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.107836 0.36) (end 0.107836 0.36) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.107836 -0.36) (end 0.107836 -0.36) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.5 0.25) (end -0.5 0.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.5 -0.25) (end 0.5 0.25) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.25 0.25) (thickness 0.04)))
+    )
+    (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 438 "Net-(C100-Pad1)"))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
   (module TestAutomation:ScrewKeepout (layer F.Cu) (tedit 60FE66E7) (tstamp 60ECC450)
     (at 210 134)
     (fp_text reference M3 (at 0 0.5) (layer F.SilkS) hide
@@ -1560,699 +1379,6 @@
     (pad "" thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Mask))
   )
 
-  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13CA6)
-    (at 99.34 93.99 90)
-    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
-    (tags capacitor)
-    (path /60C2FE2A/6101658E)
-    (attr smd)
-    (fp_text reference C45 (at -0.02 -1.75 90) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value 4.7nF/2kV (at 0 1.85 90) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0 90) (layer F.Fab)
-      (effects (font (size 0.8 0.8) (thickness 0.12)))
-    )
-    (pad 2 smd roundrect (at 1.475 0 90) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 264 "Net-(C45-Pad2)"))
-    (pad 1 smd roundrect (at -1.475 0 90) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 265 "Net-(C45-Pad1)"))
-    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60FF406B)
-    (at 108.46 100.57)
-    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
-    (tags capacitor)
-    (path /60E4702B/611CD3A8)
-    (attr smd)
-    (fp_text reference C99 (at -0.01 -1.95) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value "1nF 2kV" (at 0 1.85) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0) (layer F.Fab) hide
-      (effects (font (size 0.8 0.8) (thickness 0.12)))
-    )
-    (pad 2 smd roundrect (at 1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 440 "Net-(C99-Pad2)"))
-    (pad 1 smd roundrect (at -1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 441 "Net-(C99-Pad1)"))
-    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13D0C)
-    (at 83.03 93.64 180)
-    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
-    (tags capacitor)
-    (path /60C2FE2A/610484DB)
-    (attr smd)
-    (fp_text reference C51 (at 1.15 -1.86 180) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value 4.7nF/2kV (at 0 1.85) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0) (layer F.Fab) hide
-      (effects (font (size 0.8 0.8) (thickness 0.12)))
-    )
-    (pad 2 smd roundrect (at 1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 1 GND))
-    (pad 1 smd roundrect (at -1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 268 "Net-(C51-Pad1)"))
-    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13CFB)
-    (at 83.03 97.22)
-    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
-    (tags capacitor)
-    (path /60C2FE2A/6104520B)
-    (attr smd)
-    (fp_text reference C50 (at -1.07 1.86 180) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value 4.7nF/2kV (at 0 1.85) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0) (layer F.Fab) hide
-      (effects (font (size 0.8 0.8) (thickness 0.12)))
-    )
-    (pad 2 smd roundrect (at 1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 267 "Net-(C50-Pad2)"))
-    (pad 1 smd roundrect (at -1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
-      (net 1 GND))
-    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
-  (module Package_BGA:BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD (layer F.Cu) (tedit 5B6330C4) (tstamp 60D2846B)
-    (at 179.592 87.249 180)
-    (descr "BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf")
-    (tags BGA-256)
-    (path /60C0E996/623CB106)
-    (solder_mask_margin 0.075)
-    (attr smd)
-    (fp_text reference U4 (at 0 -8.2) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value ICE40HX8K-CT256 (at 0 8.2) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 8 8) (end -8 8) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 8 8) (end 8 -8) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -8 -8) (end -8 8) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -8 -8) (end 8 -8) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -7 -6) (end -7 7) (layer F.Fab) (width 0.1))
-    (fp_line (start -6 -7) (end -7 -6) (layer F.Fab) (width 0.1))
-    (fp_line (start 7 -7) (end -6 -7) (layer F.Fab) (width 0.1))
-    (fp_line (start 7 7) (end 7 -7) (layer F.Fab) (width 0.1))
-    (fp_line (start -7 7) (end 7 7) (layer F.Fab) (width 0.1))
-    (fp_line (start 7.1 7.1) (end 7.1 -7.1) (layer F.SilkS) (width 0.12))
-    (fp_line (start -7.1 7.1) (end 7.1 7.1) (layer F.SilkS) (width 0.12))
-    (fp_line (start -7.1 -7.1) (end -7.1 7.1) (layer F.SilkS) (width 0.12))
-    (fp_line (start 7.1 -7.1) (end -7.1 -7.1) (layer F.SilkS) (width 0.12))
-    (fp_line (start -7.3 -7.3) (end -7.3 -6.6) (layer F.SilkS) (width 0.12))
-    (fp_line (start -6.6 -7.3) (end -7.3 -7.3) (layer F.SilkS) (width 0.12))
-    (fp_text user %R (at 0 0) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad T16 smd circle (at 6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 253 /FPGA/FPGA_KEY))
-    (pad R16 smd circle (at 6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 313 "Net-(U4-PadR16)"))
-    (pad P16 smd circle (at 6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 144 /ADC_D7))
-    (pad N16 smd circle (at 6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 143 /ADC_D6))
-    (pad M16 smd circle (at 6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 141 /ADC_D4))
-    (pad L16 smd circle (at 6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 140 /ADC_D3))
-    (pad K16 smd circle (at 6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 138 /ADC_D1))
-    (pad J16 smd circle (at 6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 351 "Net-(U4-PadJ16)"))
-    (pad H16 smd circle (at 6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 145 /ADC_CLK))
-    (pad G16 smd circle (at 6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 84 /EEM2_IIC_SDA))
-    (pad F16 smd circle (at 6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 83 /EEM2_IIC_SCL))
-    (pad E16 smd circle (at 6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 369 "Net-(U4-PadE16)"))
-    (pad D16 smd circle (at 6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 377 "Net-(U4-PadD16)"))
-    (pad C16 smd circle (at 6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 255 /IIC_SDA))
-    (pad B16 smd circle (at 6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 393 "Net-(U4-PadB16)"))
-    (pad A16 smd circle (at 6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 176 /FSMC_NE1))
-    (pad T15 smd circle (at 5.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 252 /FPGA/FPGA_LED))
-    (pad R15 smd circle (at 5.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 314 "Net-(U4-PadR15)"))
-    (pad P15 smd circle (at 5.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 444 "Net-(U4-PadP15)"))
-    (pad N15 smd circle (at 5.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad M15 smd circle (at 5.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 142 /ADC_D5))
-    (pad L15 smd circle (at 5.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad K15 smd circle (at 5.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 139 /ADC_D2))
-    (pad J15 smd circle (at 5.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 137 /ADC_D0))
-    (pad H15 smd circle (at 5.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad G15 smd circle (at 5.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 361 "Net-(U4-PadG15)"))
-    (pad F15 smd circle (at 5.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 366 "Net-(U4-PadF15)"))
-    (pad E15 smd circle (at 5.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad D15 smd circle (at 5.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 254 /IIC_SCL))
-    (pad C15 smd circle (at 5.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad B15 smd circle (at 5.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 160 /FSMC_NWAIT))
-    (pad A15 smd circle (at 5.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 177 /FSMC_NWE))
-    (pad T14 smd circle (at 4.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 36 /FPGA_IO15))
-    (pad R14 smd circle (at 4.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 315 "Net-(U4-PadR14)"))
-    (pad P14 smd circle (at 4.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 317 "Net-(U4-PadP14)"))
-    (pad N14 smd circle (at 4.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask))
-    (pad M14 smd circle (at 4.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 332 "Net-(U4-PadM14)"))
-    (pad L14 smd circle (at 4.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 341 "Net-(U4-PadL14)"))
-    (pad K14 smd circle (at 4.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 348 "Net-(U4-PadK14)"))
-    (pad J14 smd circle (at 4.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 352 "Net-(U4-PadJ14)"))
-    (pad H14 smd circle (at 4.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 357 "Net-(U4-PadH14)"))
-    (pad G14 smd circle (at 4.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 80 /EEM0_IIC_SDA))
-    (pad F14 smd circle (at 4.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 82 /EEM1_IIC_SDA))
-    (pad E14 smd circle (at 4.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 370 "Net-(U4-PadE14)"))
-    (pad D14 smd circle (at 4.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 378 "Net-(U4-PadD14)"))
-    (pad C14 smd circle (at 4.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 152 /FSMC_NL))
-    (pad B14 smd circle (at 4.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 161 /FSMC_NOE))
-    (pad A14 smd circle (at 4.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad T13 smd circle (at 3.6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 35 /FPGA_IO13))
-    (pad R13 smd circle (at 3.6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad P13 smd circle (at 3.6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 181 /CSBSEL1))
-    (pad N13 smd circle (at 3.6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad M13 smd circle (at 3.6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 333 "Net-(U4-PadM13)"))
-    (pad L13 smd circle (at 3.6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 342 "Net-(U4-PadL13)"))
-    (pad K13 smd circle (at 3.6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 349 "Net-(U4-PadK13)"))
-    (pad J13 smd circle (at 3.6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 353 "Net-(U4-PadJ13)"))
-    (pad H13 smd circle (at 3.6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 358 "Net-(U4-PadH13)"))
-    (pad G13 smd circle (at 3.6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 362 "Net-(U4-PadG13)"))
-    (pad F13 smd circle (at 3.6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 81 /EEM1_IIC_SCL))
-    (pad E13 smd circle (at 3.6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 371 "Net-(U4-PadE13)"))
-    (pad D13 smd circle (at 3.6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 379 "Net-(U4-PadD13)"))
-    (pad C13 smd circle (at 3.6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 153 /FSMC_NBL0))
-    (pad B13 smd circle (at 3.6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 445 "Net-(U4-PadB13)"))
-    (pad A13 smd circle (at 3.6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad T12 smd circle (at 2.8 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad R12 smd circle (at 2.8 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 135 /SPI_CS))
-    (pad P12 smd circle (at 2.8 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 180 /SPI_MISO))
-    (pad N12 smd circle (at 2.8 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 325 "Net-(U4-PadN12)"))
-    (pad M12 smd circle (at 2.8 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 334 "Net-(U4-PadM12)"))
-    (pad L12 smd circle (at 2.8 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 343 "Net-(U4-PadL12)"))
-    (pad K12 smd circle (at 2.8 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 350 "Net-(U4-PadK12)"))
-    (pad J12 smd circle (at 2.8 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 354 "Net-(U4-PadJ12)"))
-    (pad H12 smd circle (at 2.8 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 359 "Net-(U4-PadH12)"))
-    (pad G12 smd circle (at 2.8 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 363 "Net-(U4-PadG12)"))
-    (pad F12 smd circle (at 2.8 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 367 "Net-(U4-PadF12)"))
-    (pad E12 smd circle (at 2.8 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
-    (pad D12 smd circle (at 2.8 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 380 "Net-(U4-PadD12)"))
-    (pad C12 smd circle (at 2.8 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 168 /FSMC_NBL1))
-    (pad B12 smd circle (at 2.8 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 164 /FSMC_D3))
-    (pad A12 smd circle (at 2.8 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad T11 smd circle (at 2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 34 /FPGA_IO11))
-    (pad R11 smd circle (at 2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 182 /SPI_SCK))
-    (pad P11 smd circle (at 2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 179 /SPI_MOSI))
-    (pad N11 smd circle (at 2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 134 /CRESET))
-    (pad M11 smd circle (at 2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 335 "Net-(U4-PadM11)"))
-    (pad L11 smd circle (at 2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 344 "Net-(U4-PadL11)"))
-    (pad K11 smd circle (at 2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 178 /CSBSEL0))
-    (pad J11 smd circle (at 2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 355 "Net-(U4-PadJ11)"))
-    (pad H11 smd circle (at 2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 360 "Net-(U4-PadH11)"))
-    (pad G11 smd circle (at 2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 364 "Net-(U4-PadG11)"))
-    (pad F11 smd circle (at 2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 79 /EEM0_IIC_SCL))
-    (pad E11 smd circle (at 2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 372 "Net-(U4-PadE11)"))
-    (pad D11 smd circle (at 2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 381 "Net-(U4-PadD11)"))
-    (pad C11 smd circle (at 2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 151 /FSMC_A7))
-    (pad B11 smd circle (at 2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 174 /FSMC_D2))
-    (pad A11 smd circle (at 2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 157 /FSMC_D1))
-    (pad T10 smd circle (at 1.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 33 /FPGA_IO9))
-    (pad R10 smd circle (at 1.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 32 /FPGA_IO7))
-    (pad P10 smd circle (at 1.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 318 "Net-(U4-PadP10)"))
-    (pad N10 smd circle (at 1.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 326 "Net-(U4-PadN10)"))
-    (pad M10 smd circle (at 1.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 133 /CDONE))
-    (pad L10 smd circle (at 1.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 345 "Net-(U4-PadL10)"))
-    (pad K10 smd circle (at 1.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad J10 smd circle (at 1.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 356 "Net-(U4-PadJ10)"))
-    (pad H10 smd circle (at 1.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad G10 smd circle (at 1.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 365 "Net-(U4-PadG10)"))
-    (pad F10 smd circle (at 1.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad E10 smd circle (at 1.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 373 "Net-(U4-PadE10)"))
-    (pad D10 smd circle (at 1.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 382 "Net-(U4-PadD10)"))
-    (pad C10 smd circle (at 1.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 158 /FSMC_A3))
-    (pad B10 smd circle (at 1.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 150 /FSMC_D0))
-    (pad A10 smd circle (at 1.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 172 /FSMC_A2))
-    (pad T9 smd circle (at 0.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 31 /FPGA_IO5))
-    (pad R9 smd circle (at 0.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 30 /FPGA_IO3))
-    (pad P9 smd circle (at 0.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 319 "Net-(U4-PadP9)"))
-    (pad N9 smd circle (at 0.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 327 "Net-(U4-PadN9)"))
-    (pad M9 smd circle (at 0.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 336 "Net-(U4-PadM9)"))
-    (pad L9 smd circle (at 0.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 346 "Net-(U4-PadL9)"))
-    (pad K9 smd circle (at 0.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 443 /FPGA/FPGA_Clock))
-    (pad J9 smd circle (at 0.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad H9 smd circle (at 0.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad G9 smd circle (at 0.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad F9 smd circle (at 0.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 368 "Net-(U4-PadF9)"))
-    (pad E9 smd circle (at 0.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 374 "Net-(U4-PadE9)"))
-    (pad D9 smd circle (at 0.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 383 "Net-(U4-PadD9)"))
-    (pad C9 smd circle (at 0.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 165 /FSMC_A4))
-    (pad B9 smd circle (at 0.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 159 /FSMC_A1))
-    (pad A9 smd circle (at 0.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 167 /FSMC_A0))
-    (pad T8 smd circle (at -0.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 29 /FPGA_IO1))
-    (pad R8 smd circle (at -0.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad P8 smd circle (at -0.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 320 "Net-(U4-PadP8)"))
-    (pad N8 smd circle (at -0.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 4 /FPGA/GNDPLL0))
-    (pad M8 smd circle (at -0.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 337 "Net-(U4-PadM8)"))
-    (pad L8 smd circle (at -0.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 5 /FPGA/VCCPLL0))
-    (pad K8 smd circle (at -0.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad J8 smd circle (at -0.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad H8 smd circle (at -0.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad G8 smd circle (at -0.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad F8 smd circle (at -0.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad E8 smd circle (at -0.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 7 /FPGA/VCCPLL1))
-    (pad D8 smd circle (at -0.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 384 "Net-(U4-PadD8)"))
-    (pad C8 smd circle (at -0.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 175 /FSMC_A5))
-    (pad B8 smd circle (at -0.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 147 /FSMC_D15))
-    (pad A8 smd circle (at -0.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad T7 smd circle (at -1.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 311 "Net-(U4-PadT7)"))
-    (pad R7 smd circle (at -1.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad P7 smd circle (at -1.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 321 "Net-(U4-PadP7)"))
-    (pad N7 smd circle (at -1.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 328 "Net-(U4-PadN7)"))
-    (pad M7 smd circle (at -1.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 338 "Net-(U4-PadM7)"))
-    (pad L7 smd circle (at -1.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 206 /FPGA/LVDS0_1_P))
-    (pad K7 smd circle (at -1.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad J7 smd circle (at -1.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad H7 smd circle (at -1.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad G7 smd circle (at -1.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad F7 smd circle (at -1.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 146 /FSMC_CLK))
-    (pad E7 smd circle (at -1.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 6 /FPGA/GNDPLL1))
-    (pad D7 smd circle (at -1.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 385 "Net-(U4-PadD7)"))
-    (pad C7 smd circle (at -1.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 166 /FSMC_A6))
-    (pad B7 smd circle (at -1.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 169 /FSMC_D14))
-    (pad A7 smd circle (at -1.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 173 /FSMC_D13))
-    (pad T6 smd circle (at -2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 312 "Net-(U4-PadT6)"))
-    (pad R6 smd circle (at -2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 44 /FPGA_IO0))
-    (pad P6 smd circle (at -2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 322 "Net-(U4-PadP6)"))
-    (pad N6 smd circle (at -2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 329 "Net-(U4-PadN6)"))
-    (pad M6 smd circle (at -2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 339 "Net-(U4-PadM6)"))
-    (pad L6 smd circle (at -2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 210 /FPGA/LVDS0_3_P))
-    (pad K6 smd circle (at -2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad J6 smd circle (at -2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
-    (pad H6 smd circle (at -2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 236 /FPGA/LVDS2_0_P))
-    (pad G6 smd circle (at -2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
-    (pad F6 smd circle (at -2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad E6 smd circle (at -2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 375 "Net-(U4-PadE6)"))
-    (pad D6 smd circle (at -2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 386 "Net-(U4-PadD6)"))
-    (pad C6 smd circle (at -2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 390 "Net-(U4-PadC6)"))
-    (pad B6 smd circle (at -2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 162 /FSMC_D12))
-    (pad A6 smd circle (at -2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 170 /FSMC_D11))
-    (pad T5 smd circle (at -2.8 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 43 /FPGA_IO2))
-    (pad R5 smd circle (at -2.8 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 42 /FPGA_IO4))
-    (pad P5 smd circle (at -2.8 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 323 "Net-(U4-PadP5)"))
-    (pad N5 smd circle (at -2.8 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 330 "Net-(U4-PadN5)"))
-    (pad M5 smd circle (at -2.8 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 221 /FPGA/LVDS1_0_N))
-    (pad L5 smd circle (at -2.8 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 347 "Net-(U4-PadL5)"))
-    (pad K5 smd circle (at -2.8 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 224 /FPGA/LVDS1_2_P))
-    (pad J5 smd circle (at -2.8 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 234 /FPGA/LVDS1_7_P))
-    (pad H5 smd circle (at -2.8 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 238 /FPGA/LVDS2_1_P))
-    (pad G5 smd circle (at -2.8 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 242 /FPGA/LVDS2_3_P))
-    (pad F5 smd circle (at -2.8 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 246 /FPGA/LVDS2_5_P))
-    (pad E5 smd circle (at -2.8 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 376 "Net-(U4-PadE5)"))
-    (pad D5 smd circle (at -2.8 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 387 "Net-(U4-PadD5)"))
-    (pad C5 smd circle (at -2.8 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 391 "Net-(U4-PadC5)"))
-    (pad B5 smd circle (at -2.8 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 149 /FSMC_D10))
-    (pad A5 smd circle (at -2.8 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 148 /FSMC_D9))
-    (pad T4 smd circle (at -3.6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad R4 smd circle (at -3.6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 316 "Net-(U4-PadR4)"))
-    (pad P4 smd circle (at -3.6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 324 "Net-(U4-PadP4)"))
-    (pad N4 smd circle (at -3.6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 205 /FPGA/LVDS0_0_N))
-    (pad M4 smd circle (at -3.6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 223 /FPGA/LVDS1_1_N))
-    (pad L4 smd circle (at -3.6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 214 /FPGA/LVDS0_5_P))
-    (pad K4 smd circle (at -3.6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 226 /FPGA/LVDS1_3_P))
-    (pad J4 smd circle (at -3.6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 218 /FPGA/LVDS0_7_P))
-    (pad H4 smd circle (at -3.6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 208 /FPGA/LVDS0_2_P))
-    (pad G4 smd circle (at -3.6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 216 /FPGA/LVDS0_6_P))
-    (pad F4 smd circle (at -3.6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 240 /FPGA/LVDS2_2_P))
-    (pad E4 smd circle (at -3.6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 250 /FPGA/LVDS2_7_P))
-    (pad D4 smd circle (at -3.6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 388 "Net-(U4-PadD4)"))
-    (pad C4 smd circle (at -3.6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 392 "Net-(U4-PadC4)"))
-    (pad B4 smd circle (at -3.6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 163 /FSMC_D8))
-    (pad A4 smd circle (at -3.6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad T3 smd circle (at -4.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 41 /FPGA_IO6))
-    (pad R3 smd circle (at -4.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 40 /FPGA_IO8))
-    (pad P3 smd circle (at -4.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad N3 smd circle (at -4.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 331 "Net-(U4-PadN3)"))
-    (pad M3 smd circle (at -4.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 340 "Net-(U4-PadM3)"))
-    (pad L3 smd circle (at -4.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 211 /FPGA/LVDS0_3_N))
-    (pad K3 smd circle (at -4.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 229 /FPGA/LVDS1_4_N))
-    (pad J3 smd circle (at -4.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 232 /FPGA/LVDS1_6_P))
-    (pad H3 smd circle (at -4.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 212 /FPGA/LVDS0_4_P))
-    (pad G3 smd circle (at -4.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 248 /FPGA/LVDS2_6_P))
-    (pad F3 smd circle (at -4.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 249 /FPGA/LVDS2_6_N))
-    (pad E3 smd circle (at -4.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 217 /FPGA/LVDS0_6_N))
-    (pad D3 smd circle (at -4.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 389 "Net-(U4-PadD3)"))
-    (pad C3 smd circle (at -4.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 154 /FSMC_D6))
-    (pad B3 smd circle (at -4.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 155 /FSMC_D7))
-    (pad A3 smd circle (at -4.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (pad T2 smd circle (at -5.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 39 /FPGA_IO10))
-    (pad R2 smd circle (at -5.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 38 /FPGA_IO12))
-    (pad P2 smd circle (at -5.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 220 /FPGA/LVDS1_0_P))
-    (pad N2 smd circle (at -5.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 207 /FPGA/LVDS0_1_N))
-    (pad M2 smd circle (at -5.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 225 /FPGA/LVDS1_2_N))
-    (pad L2 smd circle (at -5.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
-    (pad K2 smd circle (at -5.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 1 GND))
-    (pad J2 smd circle (at -5.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 230 /FPGA/LVDS1_5_P))
-    (pad H2 smd circle (at -5.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 219 /FPGA/LVDS0_7_N))
-    (pad G2 smd circle (at -5.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 209 /FPGA/LVDS0_2_N))
-    (pad F2 smd circle (at -5.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 213 /FPGA/LVDS0_4_N))
-    (pad E2 smd circle (at -5.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 239 /FPGA/LVDS2_1_N))
-    (pad D2 smd circle (at -5.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 241 /FPGA/LVDS2_2_N))
-    (pad C2 smd circle (at -5.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 245 /FPGA/LVDS2_4_N))
-    (pad B2 smd circle (at -5.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 251 /FPGA/LVDS2_7_N))
-    (pad A2 smd circle (at -5.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 156 /FSMC_D5))
-    (pad T1 smd circle (at -6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 37 /FPGA_IO14))
-    (pad R1 smd circle (at -6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 204 /FPGA/LVDS0_0_P))
-    (pad P1 smd circle (at -6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 222 /FPGA/LVDS1_1_P))
-    (pad N1 smd circle (at -6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
-    (pad M1 smd circle (at -6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 227 /FPGA/LVDS1_3_N))
-    (pad L1 smd circle (at -6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 215 /FPGA/LVDS0_5_N))
-    (pad K1 smd circle (at -6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 228 /FPGA/LVDS1_4_P))
-    (pad J1 smd circle (at -6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 231 /FPGA/LVDS1_5_N))
-    (pad H1 smd circle (at -6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 233 /FPGA/LVDS1_6_N))
-    (pad G1 smd circle (at -6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 235 /FPGA/LVDS1_7_N))
-    (pad F1 smd circle (at -6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 237 /FPGA/LVDS2_0_N))
-    (pad E1 smd circle (at -6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
-    (pad D1 smd circle (at -6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 243 /FPGA/LVDS2_3_N))
-    (pad C1 smd circle (at -6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 244 /FPGA/LVDS2_4_P))
-    (pad B1 smd circle (at -6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 247 /FPGA/LVDS2_5_N))
-    (pad A1 smd circle (at -6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
-      (net 171 /FSMC_D4))
-    (model ${KISYS3DMOD}/Package_BGA.3dshapes/BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
   (module TestAutomation:logo (layer B.Cu) (tedit 0) (tstamp 60EDE59C)
     (at 113.73 89.42 180)
     (attr smd)
@@ -2910,6 +2036,1142 @@
       (xy -4.14434 12.236711)) (layer B.SilkS) (width 0.01))
   )
 
+  (module Connector_PinHeader_1.27mm:PinHeader_2x17_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 62005B8B)
+    (at 183.052 65.55 180)
+    (descr "surface-mounted straight pin header, 2x17, 1.27mm pitch, double rows")
+    (tags "Surface mounted pin header SMD 2x17 1.27mm double row")
+    (path /60CB9D41/6214914E)
+    (attr smd)
+    (fp_text reference J5 (at -0.02 11.51) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value FPGA_IO (at -0.02 -12.27) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.3 -11.3) (end -4.3 -11.3) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.3 11.3) (end 4.3 -11.3) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.3 11.3) (end 4.3 11.3) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.3 -11.3) (end -4.3 11.3) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.765 10.79) (end 1.765 10.855) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 10.79) (end -1.765 10.855) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.765 -10.855) (end 1.765 -10.79) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 -10.855) (end -1.765 -10.79) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.09 -10.79) (end -1.765 -10.79) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 10.855) (end 1.765 10.855) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 -10.855) (end 1.765 -10.855) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.75 10.36) (end 1.705 10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 9.96) (end 2.75 10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 9.96) (end 2.75 9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 10.36) (end -1.705 10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 9.96) (end -2.75 10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 9.96) (end -2.75 9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 9.09) (end 1.705 9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 8.69) (end 2.75 9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 8.69) (end 2.75 8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 9.09) (end -1.705 9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 8.69) (end -2.75 9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 8.69) (end -2.75 8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 7.82) (end 1.705 7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 7.42) (end 2.75 7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 7.42) (end 2.75 7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 7.82) (end -1.705 7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 7.42) (end -2.75 7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 7.42) (end -2.75 7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 6.55) (end 1.705 6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 6.15) (end 2.75 6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 6.15) (end 2.75 6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 6.55) (end -1.705 6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 6.15) (end -2.75 6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 6.15) (end -2.75 6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 5.28) (end 1.705 5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 4.88) (end 2.75 5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 4.88) (end 2.75 4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 5.28) (end -1.705 5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 4.88) (end -2.75 5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 4.88) (end -2.75 4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 4.01) (end 1.705 4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 3.61) (end 2.75 4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 3.61) (end 2.75 3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 4.01) (end -1.705 4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 3.61) (end -2.75 4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 3.61) (end -2.75 3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -3.61) (end 1.705 -3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -4.01) (end 2.75 -3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -4.01) (end 2.75 -4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -3.61) (end -1.705 -3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -4.01) (end -2.75 -3.61) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -4.01) (end -2.75 -4.01) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -4.88) (end 1.705 -4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -5.28) (end 2.75 -4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -5.28) (end 2.75 -5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -4.88) (end -1.705 -4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -5.28) (end -2.75 -4.88) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -5.28) (end -2.75 -5.28) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -6.15) (end 1.705 -6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -6.55) (end 2.75 -6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -6.55) (end 2.75 -6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -6.15) (end -1.705 -6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -6.55) (end -2.75 -6.15) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -6.55) (end -2.75 -6.55) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -7.42) (end 1.705 -7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -7.82) (end 2.75 -7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -7.82) (end 2.75 -7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -7.42) (end -1.705 -7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -7.82) (end -2.75 -7.42) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -7.82) (end -2.75 -7.82) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -8.69) (end 1.705 -8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -9.09) (end 2.75 -8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -9.09) (end 2.75 -9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -8.69) (end -1.705 -8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -9.09) (end -2.75 -8.69) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -9.09) (end -2.75 -9.09) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -9.96) (end 1.705 -9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -10.36) (end 2.75 -9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -10.36) (end 2.75 -10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -9.96) (end -1.705 -9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -10.36) (end -2.75 -9.96) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -10.36) (end -2.75 -10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -10.795) (end 1.705 10.795) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -10.36) (end -1.27 -10.795) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 10.795) (end -1.705 -10.36) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 -10.795) (end 1.705 -10.795) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 10.795) (end -1.705 10.795) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 34 smd rect (at 1.95 10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 13 +5V))
+    (pad 33 smd rect (at -1.95 10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 13 +5V))
+    (pad 32 smd rect (at 1.95 8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 35 /FPGA_IO15))
+    (pad 31 smd rect (at -1.95 8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 30 smd rect (at 1.95 7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 29 smd rect (at -1.95 7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 36 /FPGA_IO14))
+    (pad 28 smd rect (at 1.95 6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 34 /FPGA_IO13))
+    (pad 27 smd rect (at -1.95 6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 26 smd rect (at 1.95 5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 25 smd rect (at -1.95 5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 37 /FPGA_IO12))
+    (pad 24 smd rect (at 1.95 3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 33 /FPGA_IO11))
+    (pad 23 smd rect (at -1.95 3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 22 smd rect (at 1.95 2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 21 smd rect (at -1.95 2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 38 /FPGA_IO10))
+    (pad 20 smd rect (at 1.95 1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 32 /FPGA_IO9))
+    (pad 19 smd rect (at -1.95 1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 18 smd rect (at 1.95 0 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 17 smd rect (at -1.95 0 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 39 /FPGA_IO8))
+    (pad 16 smd rect (at 1.95 -1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 31 /FPGA_IO7))
+    (pad 15 smd rect (at -1.95 -1.27 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 14 smd rect (at 1.95 -2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 13 smd rect (at -1.95 -2.54 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 40 /FPGA_IO6))
+    (pad 12 smd rect (at 1.95 -3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 30 /FPGA_IO5))
+    (pad 11 smd rect (at -1.95 -3.81 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 10 smd rect (at 1.95 -5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 9 smd rect (at -1.95 -5.08 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 41 /FPGA_IO4))
+    (pad 8 smd rect (at 1.95 -6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 29 /FPGA_IO3))
+    (pad 7 smd rect (at -1.95 -6.35 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 6 smd rect (at 1.95 -7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 5 smd rect (at -1.95 -7.62 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 42 /FPGA_IO2))
+    (pad 4 smd rect (at 1.95 -8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 28 /FPGA_IO1))
+    (pad 3 smd rect (at -1.95 -8.89 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 2 smd rect (at 1.95 -10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 1 smd rect (at -1.95 -10.16 180) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 43 /FPGA_IO0))
+    (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x17_P1.27mm_Vertical_SMD.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Connector_PinHeader_1.27mm:PinHeader_2x12_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 62005D66)
+    (at 183.052 127.44)
+    (descr "surface-mounted straight pin header, 2x12, 1.27mm pitch, double rows")
+    (tags "Surface mounted pin header SMD 2x12 1.27mm double row")
+    (path /60C2FDBB/62043672)
+    (attr smd)
+    (fp_text reference J9 (at 0 -8.68) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Analog (at 0 8.68) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 4.3 -8.15) (end -4.3 -8.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.3 8.15) (end 4.3 -8.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.3 8.15) (end 4.3 8.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.3 -8.15) (end -4.3 8.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.765 7.615) (end 1.765 7.68) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 7.615) (end -1.765 7.68) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.765 -7.68) (end 1.765 -7.615) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 -7.68) (end -1.765 -7.615) (layer F.SilkS) (width 0.12))
+    (fp_line (start -3.09 -7.615) (end -1.765 -7.615) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 7.68) (end 1.765 7.68) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.765 -7.68) (end 1.765 -7.68) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.75 7.185) (end 1.705 7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 6.785) (end 2.75 7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 6.785) (end 2.75 6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 7.185) (end -1.705 7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 6.785) (end -2.75 7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 6.785) (end -2.75 6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 5.915) (end 1.705 5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 5.515) (end 2.75 5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 5.515) (end 2.75 5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 5.915) (end -1.705 5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 5.515) (end -2.75 5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 5.515) (end -2.75 5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 4.645) (end 1.705 4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 4.245) (end 2.75 4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 4.245) (end 2.75 4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 4.645) (end -1.705 4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 4.245) (end -2.75 4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 4.245) (end -2.75 4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 3.375) (end 1.705 3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 2.975) (end 2.75 3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 2.975) (end 2.75 2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 3.375) (end -1.705 3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 2.975) (end -2.75 3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 2.975) (end -2.75 2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 2.105) (end 1.705 2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 1.705) (end 2.75 2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 1.705) (end 2.75 1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 2.105) (end -1.705 2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 1.705) (end -2.75 2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 1.705) (end -2.75 1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 0.835) (end 1.705 0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 0.435) (end 2.75 0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 0.435) (end 2.75 0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 0.835) (end -1.705 0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 0.435) (end -2.75 0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 0.435) (end -2.75 0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -0.435) (end 1.705 -0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -0.835) (end 2.75 -0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -0.835) (end 2.75 -0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -0.435) (end -1.705 -0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -0.835) (end -2.75 -0.435) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -0.835) (end -2.75 -0.835) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -1.705) (end 1.705 -1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -2.105) (end 2.75 -1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -2.105) (end 2.75 -2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -1.705) (end -1.705 -1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -2.105) (end -2.75 -1.705) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -2.105) (end -2.75 -2.105) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -2.975) (end 1.705 -2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -3.375) (end 2.75 -2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -3.375) (end 2.75 -3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -2.975) (end -1.705 -2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -3.375) (end -2.75 -2.975) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -3.375) (end -2.75 -3.375) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -4.245) (end 1.705 -4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -4.645) (end 2.75 -4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -4.645) (end 2.75 -4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -4.245) (end -1.705 -4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -4.645) (end -2.75 -4.245) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -4.645) (end -2.75 -4.645) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -5.515) (end 1.705 -5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -5.915) (end 2.75 -5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -5.915) (end 2.75 -5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -5.515) (end -1.705 -5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -5.915) (end -2.75 -5.515) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -5.915) (end -2.75 -5.915) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -6.785) (end 1.705 -6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start 2.75 -7.185) (end 2.75 -6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -7.185) (end 2.75 -7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -6.785) (end -1.705 -6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start -2.75 -7.185) (end -2.75 -6.785) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -7.185) (end -2.75 -7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 -7.62) (end 1.705 7.62) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 -7.185) (end -1.27 -7.62) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.705 7.62) (end -1.705 -7.185) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.27 -7.62) (end 1.705 -7.62) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.705 7.62) (end -1.705 7.62) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad 24 smd rect (at 1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 23 smd rect (at -1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 60 /MCU/CPU_DAC1))
+    (pad 22 smd rect (at 1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 21 smd rect (at -1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 61 /MCU/CPU_DAC0))
+    (pad 20 smd rect (at 1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 19 smd rect (at -1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 67 /MCU/CPU_ADC0))
+    (pad 18 smd rect (at 1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 17 smd rect (at -1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 66 /MCU/CPU_ADC1))
+    (pad 16 smd rect (at 1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 15 smd rect (at -1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 65 /MCU/CPU_ADC2))
+    (pad 14 smd rect (at 1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 13 smd rect (at -1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 64 /MCU/CPU_ADC3))
+    (pad 12 smd rect (at 1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 11 smd rect (at -1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 63 /MCU/CPU_ADC4))
+    (pad 10 smd rect (at 1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 9 smd rect (at -1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 62 /MCU/CPU_ADC5))
+    (pad 8 smd rect (at 1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 7 smd rect (at -1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 298 /MCU/CPU_ADC6))
+    (pad 6 smd rect (at 1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 5 smd rect (at -1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 297 /MCU/CPU_ADC7))
+    (pad 4 smd rect (at 1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 3 smd rect (at -1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 2 smd rect (at 1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 193 HSADC_IN))
+    (pad 1 smd rect (at -1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x12_P1.27mm_Vertical_SMD.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm (layer F.Cu) (tedit 5A0FD1B2) (tstamp 6114F25E)
+    (at 165.78 87.14 180)
+    (descr "SMD Crystal SERIES SMD3225/4 http://www.txccrystal.com/images/pdf/7m-accuracy.pdf, 3.2x2.5mm^2 package")
+    (tags "SMD SMT crystal")
+    (path /60C0E996/611ED7C3)
+    (attr smd)
+    (fp_text reference X1 (at 0 -2.45) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value SG-8002CE (at 0 2.45) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.1 -1.7) (end -2.1 -1.7) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.1 1.7) (end 2.1 -1.7) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.1 1.7) (end 2.1 1.7) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.1 -1.7) (end -2.1 1.7) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 1.65) (end 2 1.65) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2 -1.65) (end -2 1.65) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.6 0.25) (end -0.6 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -1.25) (end -1.6 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 1.25) (end 1.6 -1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 1.25) (end 1.6 1.25) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -1.25) (end -1.6 1.25) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab)
+      (effects (font (size 0.7 0.7) (thickness 0.105)))
+    )
+    (pad 4 smd rect (at -1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad 3 smd rect (at 1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
+      (net 434 "Net-(R88-Pad2)"))
+    (pad 2 smd rect (at 1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad 1 smd rect (at -1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 6114E320)
+    (at 169.07 87.09 270)
+    (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags resistor)
+    (path /60C0E996/611F4FD3)
+    (attr smd)
+    (fp_text reference R88 (at 0 -1.17 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 22 (at 0 1.17 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.26 0.26) (thickness 0.04)))
+    )
+    (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 434 "Net-(R88-Pad2)"))
+    (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 435 /FPGA/FPGA_Clock))
+    (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13CA6)
+    (at 99.34 93.99 90)
+    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /60C2FE2A/6101658E)
+    (attr smd)
+    (fp_text reference C45 (at -0.02 -1.75 90) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 4.7nF/2kV (at 0 1.85 90) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+    )
+    (pad 2 smd roundrect (at 1.475 0 90) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 260 "Net-(C45-Pad2)"))
+    (pad 1 smd roundrect (at -1.475 0 90) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 261 "Net-(C45-Pad1)"))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60FF406B)
+    (at 108.46 100.57)
+    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /60E4702B/611CD3A8)
+    (attr smd)
+    (fp_text reference C99 (at -0.01 -1.95) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value "1nF 2kV" (at 0 1.85) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+    )
+    (pad 2 smd roundrect (at 1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 432 "Net-(C99-Pad2)"))
+    (pad 1 smd roundrect (at -1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 433 "Net-(C99-Pad1)"))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13D0C)
+    (at 83.03 93.64 180)
+    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /60C2FE2A/610484DB)
+    (attr smd)
+    (fp_text reference C51 (at 1.15 -1.86 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 4.7nF/2kV (at 0 1.85) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+    )
+    (pad 2 smd roundrect (at 1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 1 GND))
+    (pad 1 smd roundrect (at -1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 264 "Net-(C51-Pad1)"))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Capacitor_SMD:C_1206_3216Metric (layer F.Cu) (tedit 5F68FEEE) (tstamp 60D13CFB)
+    (at 83.03 97.22)
+    (descr "Capacitor SMD 1206 (3216 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 76, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator")
+    (tags capacitor)
+    (path /60C2FE2A/6104520B)
+    (attr smd)
+    (fp_text reference C50 (at -1.07 1.86 180) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 4.7nF/2kV (at 0 1.85) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 2.3 1.15) (end -2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.3 -1.15) (end 2.3 1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 -1.15) (end 2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.3 1.15) (end -2.3 -1.15) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.711252 0.91) (end 0.711252 0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.711252 -0.91) (end 0.711252 -0.91) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.6 0.8) (end -1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start 1.6 -0.8) (end 1.6 0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 -0.8) (end 1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.6 0.8) (end -1.6 -0.8) (layer F.Fab) (width 0.1))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 0.8 0.8) (thickness 0.12)))
+    )
+    (pad 2 smd roundrect (at 1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 263 "Net-(C50-Pad2)"))
+    (pad 1 smd roundrect (at -1.475 0) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.217391)
+      (net 1 GND))
+    (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module Package_BGA:BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD (layer F.Cu) (tedit 5B6330C4) (tstamp 60D2846B)
+    (at 179.592 87.249 180)
+    (descr "BGA-256, dimensions: https://www.xilinx.com/support/documentation/package_specs/ft256.pdf, design rules: https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf")
+    (tags BGA-256)
+    (path /60C0E996/623CB106)
+    (solder_mask_margin 0.075)
+    (attr smd)
+    (fp_text reference U4 (at 0 -8.2) (layer F.SilkS)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value ICE40HX8K-CT256 (at 0 8.2) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start -6.6 -7.3) (end -7.3 -7.3) (layer F.SilkS) (width 0.12))
+    (fp_line (start -7.3 -7.3) (end -7.3 -6.6) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.1 -7.1) (end -7.1 -7.1) (layer F.SilkS) (width 0.12))
+    (fp_line (start -7.1 -7.1) (end -7.1 7.1) (layer F.SilkS) (width 0.12))
+    (fp_line (start -7.1 7.1) (end 7.1 7.1) (layer F.SilkS) (width 0.12))
+    (fp_line (start 7.1 7.1) (end 7.1 -7.1) (layer F.SilkS) (width 0.12))
+    (fp_line (start -7 7) (end 7 7) (layer F.Fab) (width 0.1))
+    (fp_line (start 7 7) (end 7 -7) (layer F.Fab) (width 0.1))
+    (fp_line (start 7 -7) (end -6 -7) (layer F.Fab) (width 0.1))
+    (fp_line (start -6 -7) (end -7 -6) (layer F.Fab) (width 0.1))
+    (fp_line (start -7 -6) (end -7 7) (layer F.Fab) (width 0.1))
+    (fp_line (start -8 -8) (end 8 -8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8 -8) (end -8 8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 8 8) (end 8 -8) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 8 8) (end -8 8) (layer F.CrtYd) (width 0.05))
+    (fp_text user %R (at 0 0) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (pad A1 smd circle (at -6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 168 /FSMC_D4))
+    (pad B1 smd circle (at -6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 244 /FPGA/LVDS2_5_N))
+    (pad C1 smd circle (at -6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 241 /FPGA/LVDS2_4_P))
+    (pad D1 smd circle (at -6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 240 /FPGA/LVDS2_3_N))
+    (pad E1 smd circle (at -6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 11 +2V5))
+    (pad F1 smd circle (at -6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 234 /FPGA/LVDS2_0_N))
+    (pad G1 smd circle (at -6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 232 /FPGA/LVDS1_7_N))
+    (pad H1 smd circle (at -6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 230 /FPGA/LVDS1_6_N))
+    (pad J1 smd circle (at -6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 228 /FPGA/LVDS1_5_N))
+    (pad K1 smd circle (at -6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 225 /FPGA/LVDS1_4_P))
+    (pad L1 smd circle (at -6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 212 /FPGA/LVDS0_5_N))
+    (pad M1 smd circle (at -6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 224 /FPGA/LVDS1_3_N))
+    (pad N1 smd circle (at -6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 11 +2V5))
+    (pad P1 smd circle (at -6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 219 /FPGA/LVDS1_1_P))
+    (pad R1 smd circle (at -6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 201 /FPGA/LVDS0_0_P))
+    (pad T1 smd circle (at -6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 36 /FPGA_IO14))
+    (pad A2 smd circle (at -5.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 153 /FSMC_D5))
+    (pad B2 smd circle (at -5.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 248 /FPGA/LVDS2_7_N))
+    (pad C2 smd circle (at -5.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 242 /FPGA/LVDS2_4_N))
+    (pad D2 smd circle (at -5.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 238 /FPGA/LVDS2_2_N))
+    (pad E2 smd circle (at -5.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 236 /FPGA/LVDS2_1_N))
+    (pad F2 smd circle (at -5.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 210 /FPGA/LVDS0_4_N))
+    (pad G2 smd circle (at -5.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 206 /FPGA/LVDS0_2_N))
+    (pad H2 smd circle (at -5.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 216 /FPGA/LVDS0_7_N))
+    (pad J2 smd circle (at -5.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 227 /FPGA/LVDS1_5_P))
+    (pad K2 smd circle (at -5.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad L2 smd circle (at -5.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad M2 smd circle (at -5.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 222 /FPGA/LVDS1_2_N))
+    (pad N2 smd circle (at -5.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 204 /FPGA/LVDS0_1_N))
+    (pad P2 smd circle (at -5.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 217 /FPGA/LVDS1_0_P))
+    (pad R2 smd circle (at -5.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 37 /FPGA_IO12))
+    (pad T2 smd circle (at -5.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 38 /FPGA_IO10))
+    (pad A3 smd circle (at -4.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad B3 smd circle (at -4.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 152 /FSMC_D7))
+    (pad C3 smd circle (at -4.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 151 /FSMC_D6))
+    (pad D3 smd circle (at -4.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 383 "Net-(U4-PadD3)"))
+    (pad E3 smd circle (at -4.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 214 /FPGA/LVDS0_6_N))
+    (pad F3 smd circle (at -4.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 246 /FPGA/LVDS2_6_N))
+    (pad G3 smd circle (at -4.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 245 /FPGA/LVDS2_6_P))
+    (pad H3 smd circle (at -4.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 209 /FPGA/LVDS0_4_P))
+    (pad J3 smd circle (at -4.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 229 /FPGA/LVDS1_6_P))
+    (pad K3 smd circle (at -4.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 226 /FPGA/LVDS1_4_N))
+    (pad L3 smd circle (at -4.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 208 /FPGA/LVDS0_3_N))
+    (pad M3 smd circle (at -4.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 334 "Net-(U4-PadM3)"))
+    (pad N3 smd circle (at -4.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 325 "Net-(U4-PadN3)"))
+    (pad P3 smd circle (at -4.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad R3 smd circle (at -4.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 39 /FPGA_IO8))
+    (pad T3 smd circle (at -4.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 40 /FPGA_IO6))
+    (pad A4 smd circle (at -3.6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad B4 smd circle (at -3.6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 160 /FSMC_D8))
+    (pad C4 smd circle (at -3.6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 386 "Net-(U4-PadC4)"))
+    (pad D4 smd circle (at -3.6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 382 "Net-(U4-PadD4)"))
+    (pad E4 smd circle (at -3.6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 247 /FPGA/LVDS2_7_P))
+    (pad F4 smd circle (at -3.6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 237 /FPGA/LVDS2_2_P))
+    (pad G4 smd circle (at -3.6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 213 /FPGA/LVDS0_6_P))
+    (pad H4 smd circle (at -3.6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 205 /FPGA/LVDS0_2_P))
+    (pad J4 smd circle (at -3.6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 215 /FPGA/LVDS0_7_P))
+    (pad K4 smd circle (at -3.6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 223 /FPGA/LVDS1_3_P))
+    (pad L4 smd circle (at -3.6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 211 /FPGA/LVDS0_5_P))
+    (pad M4 smd circle (at -3.6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 220 /FPGA/LVDS1_1_N))
+    (pad N4 smd circle (at -3.6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 202 /FPGA/LVDS0_0_N))
+    (pad P4 smd circle (at -3.6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 318 "Net-(U4-PadP4)"))
+    (pad R4 smd circle (at -3.6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 310 "Net-(U4-PadR4)"))
+    (pad T4 smd circle (at -3.6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad A5 smd circle (at -2.8 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 145 /FSMC_D9))
+    (pad B5 smd circle (at -2.8 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 146 /FSMC_D10))
+    (pad C5 smd circle (at -2.8 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 385 "Net-(U4-PadC5)"))
+    (pad D5 smd circle (at -2.8 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 381 "Net-(U4-PadD5)"))
+    (pad E5 smd circle (at -2.8 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 370 "Net-(U4-PadE5)"))
+    (pad F5 smd circle (at -2.8 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 243 /FPGA/LVDS2_5_P))
+    (pad G5 smd circle (at -2.8 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 239 /FPGA/LVDS2_3_P))
+    (pad H5 smd circle (at -2.8 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 235 /FPGA/LVDS2_1_P))
+    (pad J5 smd circle (at -2.8 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 231 /FPGA/LVDS1_7_P))
+    (pad K5 smd circle (at -2.8 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 221 /FPGA/LVDS1_2_P))
+    (pad L5 smd circle (at -2.8 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 341 "Net-(U4-PadL5)"))
+    (pad M5 smd circle (at -2.8 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 218 /FPGA/LVDS1_0_N))
+    (pad N5 smd circle (at -2.8 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 324 "Net-(U4-PadN5)"))
+    (pad P5 smd circle (at -2.8 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 317 "Net-(U4-PadP5)"))
+    (pad R5 smd circle (at -2.8 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 41 /FPGA_IO4))
+    (pad T5 smd circle (at -2.8 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 42 /FPGA_IO2))
+    (pad A6 smd circle (at -2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 167 /FSMC_D11))
+    (pad B6 smd circle (at -2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 159 /FSMC_D12))
+    (pad C6 smd circle (at -2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 384 "Net-(U4-PadC6)"))
+    (pad D6 smd circle (at -2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 380 "Net-(U4-PadD6)"))
+    (pad E6 smd circle (at -2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 369 "Net-(U4-PadE6)"))
+    (pad F6 smd circle (at -2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad G6 smd circle (at -2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 11 +2V5))
+    (pad H6 smd circle (at -2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 233 /FPGA/LVDS2_0_P))
+    (pad J6 smd circle (at -2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 11 +2V5))
+    (pad K6 smd circle (at -2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad L6 smd circle (at -2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 207 /FPGA/LVDS0_3_P))
+    (pad M6 smd circle (at -2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 333 "Net-(U4-PadM6)"))
+    (pad N6 smd circle (at -2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 323 "Net-(U4-PadN6)"))
+    (pad P6 smd circle (at -2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 316 "Net-(U4-PadP6)"))
+    (pad R6 smd circle (at -2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 43 /FPGA_IO0))
+    (pad T6 smd circle (at -2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 306 "Net-(U4-PadT6)"))
+    (pad A7 smd circle (at -1.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 170 /FSMC_D13))
+    (pad B7 smd circle (at -1.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 166 /FSMC_D14))
+    (pad C7 smd circle (at -1.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 163 /FSMC_A6))
+    (pad D7 smd circle (at -1.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 379 "Net-(U4-PadD7)"))
+    (pad E7 smd circle (at -1.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 6 /FPGA/GNDPLL1))
+    (pad F7 smd circle (at -1.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 143 /FSMC_CLK))
+    (pad G7 smd circle (at -1.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad H7 smd circle (at -1.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad J7 smd circle (at -1.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad K7 smd circle (at -1.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad L7 smd circle (at -1.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 203 /FPGA/LVDS0_1_P))
+    (pad M7 smd circle (at -1.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 332 "Net-(U4-PadM7)"))
+    (pad N7 smd circle (at -1.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 322 "Net-(U4-PadN7)"))
+    (pad P7 smd circle (at -1.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 315 "Net-(U4-PadP7)"))
+    (pad R7 smd circle (at -1.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad T7 smd circle (at -1.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 305 "Net-(U4-PadT7)"))
+    (pad A8 smd circle (at -0.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad B8 smd circle (at -0.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 144 /FSMC_D15))
+    (pad C8 smd circle (at -0.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 172 /FSMC_A5))
+    (pad D8 smd circle (at -0.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 378 "Net-(U4-PadD8)"))
+    (pad E8 smd circle (at -0.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 7 /FPGA/VCCPLL1))
+    (pad F8 smd circle (at -0.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad G8 smd circle (at -0.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad H8 smd circle (at -0.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad J8 smd circle (at -0.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad K8 smd circle (at -0.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad L8 smd circle (at -0.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 5 /FPGA/VCCPLL0))
+    (pad M8 smd circle (at -0.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 331 "Net-(U4-PadM8)"))
+    (pad N8 smd circle (at -0.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 4 /FPGA/GNDPLL0))
+    (pad P8 smd circle (at -0.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 314 "Net-(U4-PadP8)"))
+    (pad R8 smd circle (at -0.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad T8 smd circle (at -0.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 28 /FPGA_IO1))
+    (pad A9 smd circle (at 0.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 164 /FSMC_A0))
+    (pad B9 smd circle (at 0.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 156 /FSMC_A1))
+    (pad C9 smd circle (at 0.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 162 /FSMC_A4))
+    (pad D9 smd circle (at 0.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 377 "Net-(U4-PadD9)"))
+    (pad E9 smd circle (at 0.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 368 "Net-(U4-PadE9)"))
+    (pad F9 smd circle (at 0.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 362 "Net-(U4-PadF9)"))
+    (pad G9 smd circle (at 0.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad H9 smd circle (at 0.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad J9 smd circle (at 0.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad K9 smd circle (at 0.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 435 /FPGA/FPGA_Clock))
+    (pad L9 smd circle (at 0.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 340 "Net-(U4-PadL9)"))
+    (pad M9 smd circle (at 0.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 330 "Net-(U4-PadM9)"))
+    (pad N9 smd circle (at 0.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 321 "Net-(U4-PadN9)"))
+    (pad P9 smd circle (at 0.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 313 "Net-(U4-PadP9)"))
+    (pad R9 smd circle (at 0.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 29 /FPGA_IO3))
+    (pad T9 smd circle (at 0.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 30 /FPGA_IO5))
+    (pad A10 smd circle (at 1.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 169 /FSMC_A2))
+    (pad B10 smd circle (at 1.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 147 /FSMC_D0))
+    (pad C10 smd circle (at 1.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 155 /FSMC_A3))
+    (pad D10 smd circle (at 1.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 376 "Net-(U4-PadD10)"))
+    (pad E10 smd circle (at 1.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 367 "Net-(U4-PadE10)"))
+    (pad F10 smd circle (at 1.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad G10 smd circle (at 1.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 359 "Net-(U4-PadG10)"))
+    (pad H10 smd circle (at 1.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad J10 smd circle (at 1.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 350 "Net-(U4-PadJ10)"))
+    (pad K10 smd circle (at 1.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad L10 smd circle (at 1.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 339 "Net-(U4-PadL10)"))
+    (pad M10 smd circle (at 1.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 130 /CDONE))
+    (pad N10 smd circle (at 1.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 320 "Net-(U4-PadN10)"))
+    (pad P10 smd circle (at 1.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 312 "Net-(U4-PadP10)"))
+    (pad R10 smd circle (at 1.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 31 /FPGA_IO7))
+    (pad T10 smd circle (at 1.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 32 /FPGA_IO9))
+    (pad A11 smd circle (at 2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 154 /FSMC_D1))
+    (pad B11 smd circle (at 2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 171 /FSMC_D2))
+    (pad C11 smd circle (at 2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 148 /FSMC_A7))
+    (pad D11 smd circle (at 2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 375 "Net-(U4-PadD11)"))
+    (pad E11 smd circle (at 2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 366 "Net-(U4-PadE11)"))
+    (pad F11 smd circle (at 2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 76 /EEM0_IIC_SCL))
+    (pad G11 smd circle (at 2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 358 "Net-(U4-PadG11)"))
+    (pad H11 smd circle (at 2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 354 "Net-(U4-PadH11)"))
+    (pad J11 smd circle (at 2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 349 "Net-(U4-PadJ11)"))
+    (pad K11 smd circle (at 2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 175 /CSBSEL0))
+    (pad L11 smd circle (at 2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 338 "Net-(U4-PadL11)"))
+    (pad M11 smd circle (at 2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 329 "Net-(U4-PadM11)"))
+    (pad N11 smd circle (at 2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 131 /CRESET))
+    (pad P11 smd circle (at 2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 176 /SPI_MOSI))
+    (pad R11 smd circle (at 2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 179 /SPI_SCK))
+    (pad T11 smd circle (at 2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 33 /FPGA_IO11))
+    (pad A12 smd circle (at 2.8 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad B12 smd circle (at 2.8 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 161 /FSMC_D3))
+    (pad C12 smd circle (at 2.8 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 165 /FSMC_NBL1))
+    (pad D12 smd circle (at 2.8 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 374 "Net-(U4-PadD12)"))
+    (pad E12 smd circle (at 2.8 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 11 +2V5))
+    (pad F12 smd circle (at 2.8 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 361 "Net-(U4-PadF12)"))
+    (pad G12 smd circle (at 2.8 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 357 "Net-(U4-PadG12)"))
+    (pad H12 smd circle (at 2.8 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 353 "Net-(U4-PadH12)"))
+    (pad J12 smd circle (at 2.8 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 348 "Net-(U4-PadJ12)"))
+    (pad K12 smd circle (at 2.8 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 344 "Net-(U4-PadK12)"))
+    (pad L12 smd circle (at 2.8 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 337 "Net-(U4-PadL12)"))
+    (pad M12 smd circle (at 2.8 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 328 "Net-(U4-PadM12)"))
+    (pad N12 smd circle (at 2.8 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 319 "Net-(U4-PadN12)"))
+    (pad P12 smd circle (at 2.8 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 177 /SPI_MISO))
+    (pad R12 smd circle (at 2.8 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 132 /SPI_CS))
+    (pad T12 smd circle (at 2.8 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad A13 smd circle (at 3.6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad B13 smd circle (at 3.6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 437 "Net-(U4-PadB13)"))
+    (pad C13 smd circle (at 3.6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 150 /FSMC_NBL0))
+    (pad D13 smd circle (at 3.6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 373 "Net-(U4-PadD13)"))
+    (pad E13 smd circle (at 3.6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 365 "Net-(U4-PadE13)"))
+    (pad F13 smd circle (at 3.6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 78 /EEM1_IIC_SCL))
+    (pad G13 smd circle (at 3.6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 356 "Net-(U4-PadG13)"))
+    (pad H13 smd circle (at 3.6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 352 "Net-(U4-PadH13)"))
+    (pad J13 smd circle (at 3.6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 347 "Net-(U4-PadJ13)"))
+    (pad K13 smd circle (at 3.6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 343 "Net-(U4-PadK13)"))
+    (pad L13 smd circle (at 3.6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 336 "Net-(U4-PadL13)"))
+    (pad M13 smd circle (at 3.6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 327 "Net-(U4-PadM13)"))
+    (pad N13 smd circle (at 3.6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad P13 smd circle (at 3.6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 178 /CSBSEL1))
+    (pad R13 smd circle (at 3.6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad T13 smd circle (at 3.6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 34 /FPGA_IO13))
+    (pad A14 smd circle (at 4.4 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 12 +1V2))
+    (pad B14 smd circle (at 4.4 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 158 /FSMC_NOE))
+    (pad C14 smd circle (at 4.4 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 149 /FSMC_NL))
+    (pad D14 smd circle (at 4.4 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 372 "Net-(U4-PadD14)"))
+    (pad E14 smd circle (at 4.4 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 364 "Net-(U4-PadE14)"))
+    (pad F14 smd circle (at 4.4 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 79 /EEM1_IIC_SDA))
+    (pad G14 smd circle (at 4.4 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 77 /EEM0_IIC_SDA))
+    (pad H14 smd circle (at 4.4 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 351 "Net-(U4-PadH14)"))
+    (pad J14 smd circle (at 4.4 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 346 "Net-(U4-PadJ14)"))
+    (pad K14 smd circle (at 4.4 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 342 "Net-(U4-PadK14)"))
+    (pad L14 smd circle (at 4.4 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 335 "Net-(U4-PadL14)"))
+    (pad M14 smd circle (at 4.4 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 326 "Net-(U4-PadM14)"))
+    (pad N14 smd circle (at 4.4 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask))
+    (pad P14 smd circle (at 4.4 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 311 "Net-(U4-PadP14)"))
+    (pad R14 smd circle (at 4.4 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 309 "Net-(U4-PadR14)"))
+    (pad T14 smd circle (at 4.4 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 35 /FPGA_IO15))
+    (pad A15 smd circle (at 5.2 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 174 /FSMC_NWE))
+    (pad B15 smd circle (at 5.2 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 157 /FSMC_NWAIT))
+    (pad C15 smd circle (at 5.2 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad D15 smd circle (at 5.2 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 251 /IIC_SCL))
+    (pad E15 smd circle (at 5.2 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad F15 smd circle (at 5.2 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 360 "Net-(U4-PadF15)"))
+    (pad G15 smd circle (at 5.2 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 355 "Net-(U4-PadG15)"))
+    (pad H15 smd circle (at 5.2 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad J15 smd circle (at 5.2 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 134 /ADC_D0))
+    (pad K15 smd circle (at 5.2 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 136 /ADC_D2))
+    (pad L15 smd circle (at 5.2 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 1 GND))
+    (pad M15 smd circle (at 5.2 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 139 /ADC_D5))
+    (pad N15 smd circle (at 5.2 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 10 +3V3))
+    (pad P15 smd circle (at 5.2 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 436 "Net-(U4-PadP15)"))
+    (pad R15 smd circle (at 5.2 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 308 "Net-(U4-PadR15)"))
+    (pad T15 smd circle (at 5.2 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 249 /FPGA/FPGA_LED))
+    (pad A16 smd circle (at 6 -6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 173 /FSMC_NE1))
+    (pad B16 smd circle (at 6 -5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 387 "Net-(U4-PadB16)"))
+    (pad C16 smd circle (at 6 -4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 252 /IIC_SDA))
+    (pad D16 smd circle (at 6 -3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 371 "Net-(U4-PadD16)"))
+    (pad E16 smd circle (at 6 -2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 363 "Net-(U4-PadE16)"))
+    (pad F16 smd circle (at 6 -2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 80 /EEM2_IIC_SCL))
+    (pad G16 smd circle (at 6 -1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 81 /EEM2_IIC_SDA))
+    (pad H16 smd circle (at 6 -0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 142 /ADC_CLK))
+    (pad J16 smd circle (at 6 0.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 345 "Net-(U4-PadJ16)"))
+    (pad K16 smd circle (at 6 1.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 135 /ADC_D1))
+    (pad L16 smd circle (at 6 2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 137 /ADC_D3))
+    (pad M16 smd circle (at 6 2.8 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 138 /ADC_D4))
+    (pad N16 smd circle (at 6 3.6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 140 /ADC_D6))
+    (pad P16 smd circle (at 6 4.4 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 141 /ADC_D7))
+    (pad R16 smd circle (at 6 5.2 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 307 "Net-(U4-PadR16)"))
+    (pad T16 smd circle (at 6 6 180) (size 0.32 0.32) (layers F.Cu F.Paste F.Mask)
+      (net 250 /FPGA/FPGA_KEY))
+    (model ${KISYS3DMOD}/Package_BGA.3dshapes/BGA-256_14.0x14.0mm_Layout16x16_P0.8mm_Ball0.45mm_Pad0.32mm_NSMD.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
   (module TestAutomation:Silvertel-AG5300-0-0-MFG (layer F.Cu) (tedit 60ED3B40) (tstamp 610158A1)
     (at 109.458 88.646)
     (path /60C2FE2A/625A214B)
@@ -2944,25 +3206,25 @@
     (fp_line (start 28.65 0.6) (end 28.65 -9) (layer F.SilkS) (width 0.15))
     (fp_line (start -28.65 -9) (end 28.65 -9) (layer F.CrtYd) (width 0.15))
     (pad 6 thru_hole circle (at -10.84 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 399 "Net-(U12-Pad6)"))
+      (net 393 "Net-(U12-Pad6)"))
     (pad 10 thru_hole circle (at 27.26 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
       (net 1 GND))
     (pad 9 thru_hole circle (at 24.72 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 398 "Net-(U12-Pad9)"))
+      (net 392 "Net-(U12-Pad9)"))
     (pad 8 thru_hole circle (at 22.18 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 7 thru_hole circle (at 19.64 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
       (net 1 GND))
     (pad 5 thru_hole circle (at -13.38 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 397 "Net-(U12-Pad5)"))
+      (net 391 "Net-(U12-Pad5)"))
     (pad 4 thru_hole circle (at -15.92 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 396 "Net-(U12-Pad4)"))
+      (net 390 "Net-(U12-Pad4)"))
     (pad 3 thru_hole circle (at -18.46 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 300 "Net-(U10-Pad2)"))
+      (net 296 "Net-(U10-Pad2)"))
     (pad 2 thru_hole circle (at -21 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 268 "Net-(C51-Pad1)"))
+      (net 264 "Net-(C51-Pad1)"))
     (pad 1 thru_hole rect (at -23.54 -1.7) (size 1.7 1.7) (drill 1.1) (layers *.Cu *.Mask)
-      (net 293 "Net-(R98-Pad2)"))
+      (net 289 "Net-(R98-Pad2)"))
     (model eec.models/Silvertel_-_AG5300.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -2997,11 +3259,11 @@
       (effects (font (size 0.7 0.7) (thickness 0.105)))
     )
     (pad 1 smd rect (at -1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 280 "Net-(C75-Pad1)"))
+      (net 276 "Net-(C75-Pad1)"))
     (pad 2 smd rect (at 1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at 1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 281 "Net-(C76-Pad1)"))
+      (net 277 "Net-(C76-Pad1)"))
     (pad 4 smd rect (at -1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl
@@ -3038,11 +3300,11 @@
       (effects (font (size 0.7 0.7) (thickness 0.105)))
     )
     (pad 1 smd rect (at -1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 271 "Net-(C60-Pad1)"))
+      (net 267 "Net-(C60-Pad1)"))
     (pad 2 smd rect (at 1.1 0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at 1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 270 "Net-(C59-Pad1)"))
+      (net 266 "Net-(C59-Pad1)"))
     (pad 4 smd rect (at -1.1 -0.85 180) (size 1.4 1.2) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (model ${KISYS3DMOD}/Crystal.3dshapes/Crystal_SMD_3225-4Pin_3.2x2.5mm.wrl
@@ -3078,9 +3340,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.8 0 90) (size 1.5 4.2) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 1.8 0 90) (size 1.5 4.2) (layers F.Cu F.Paste F.Mask)
-      (net 265 "Net-(C45-Pad1)"))
+      (net 261 "Net-(C45-Pad1)"))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_Taiyo-Yuden_MD-5050.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3088,42 +3350,6 @@
     )
   )
 
-  (module Fuse:Fuse_0805_2012Metric (layer F.Cu) (tedit 5F68FEF1) (tstamp 610E50B5)
-    (at 199.44 130.71)
-    (descr "Fuse SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
-    (tags fuse)
-    (path /60C2FE2A/63235C00)
-    (attr smd)
-    (fp_text reference F2 (at 0 -1.65) (layer F.SilkS)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value JK-SMD0805-050/6V (at 0 1.65) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
-    (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
-    (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
-    (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
-    (fp_text user %R (at 0 0) (layer F.Fab) hide
-      (effects (font (size 0.5 0.5) (thickness 0.08)))
-    )
-    (pad 1 smd roundrect (at -0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 304 "Net-(D5-Pad1)"))
-    (pad 2 smd roundrect (at 0.9375 0) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 18 +3V3MP))
-    (model ${KISYS3DMOD}/Fuse.3dshapes/Fuse_0805_2012Metric.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
   (module Inductor_SMD:L_Taiyo-Yuden_MD-5050 (layer F.Cu) (tedit 5990349C) (tstamp 60D14314)
     (at 135.78 70.44 90)
     (descr "Inductor, Taiyo Yuden, MD series, Taiyo-Yuden_MD-5050, 5.0mmx5.0mm")
@@ -3150,9 +3376,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.8 0 90) (size 1.5 4.2) (layers F.Cu F.Paste F.Mask)
-      (net 263 "Net-(C44-Pad1)"))
+      (net 259 "Net-(C44-Pad1)"))
     (pad 2 smd rect (at 1.8 0 90) (size 1.5 4.2) (layers F.Cu F.Paste F.Mask)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_Taiyo-Yuden_MD-5050.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3189,7 +3415,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.075)))
     )
     (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 305 "Net-(D23-Pad1)"))
+      (net 299 "Net-(D23-Pad1)"))
     (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
       (net 3 /HighSpeedADC/+5VA))
     (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
@@ -3227,7 +3453,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3299,7 +3525,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3335,7 +3561,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3371,7 +3597,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3408,13 +3634,13 @@
       (effects (font (size 0.5 0.5) (thickness 0.075)))
     )
     (pad 1 smd rect (at -1.31 -0.95 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 289 "Net-(R5-Pad2)"))
+      (net 285 "Net-(R5-Pad2)"))
     (pad 2 smd rect (at -1.31 0 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at -1.31 0.95 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 287 "Net-(R2-Pad1)"))
+      (net 283 "Net-(R2-Pad1)"))
     (pad 4 smd rect (at 1.31 0.95 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 305 "Net-(D23-Pad1)"))
+      (net 299 "Net-(D23-Pad1)"))
     (pad 5 smd rect (at 1.31 0 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
       (net 3 /HighSpeedADC/+5VA))
     (pad 6 smd rect (at 1.31 -0.95 90) (size 1.22 0.65) (layers F.Cu F.Paste F.Mask)
@@ -3457,9 +3683,9 @@
     (pad 2 smd rect (at -1.1 0 270) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at -1.1 0.95 270) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 288 "Net-(R3-Pad1)"))
+      (net 284 "Net-(R3-Pad1)"))
     (pad 4 smd rect (at 1.1 0.95 270) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 288 "Net-(R3-Pad1)"))
+      (net 284 "Net-(R3-Pad1)"))
     (pad 5 smd rect (at 1.1 -0.95 270) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 3 /HighSpeedADC/+5VA))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
@@ -3531,9 +3757,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 69 /CurrentSenser/12V_SW))
+      (net 445 /PowerOutputs/12V_SW))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3567,9 +3793,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 259 /CurrentSenser/12V_OUT_FAULT))
+      (net 444 /MCU/12V_OUT_FAULT))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3577,7 +3803,7 @@
     )
   )
 
-  (module Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm (layer F.Cu) (tedit 61FF4503) (tstamp 6102DBB6)
+  (module Package_DFN_QFN:QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm (layer F.Cu) (tedit 62078120) (tstamp 6102DBB6)
     (at 121.255 64.7925)
     (descr "QFN, 16 Pin (https://www.allegromicro.com/~/media/Files/Datasheets/A4403-Datasheet.ashx), generated with kicad-footprint-generator ipc_noLead_generator.py")
     (tags "QFN NoLead")
@@ -3589,63 +3815,63 @@
     (fp_text value TPS2590 (at 0 3.32) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start 1.385 -2.11) (end 2.11 -2.11) (layer F.SilkS) (width 0.12))
-    (fp_line (start 2.11 -2.11) (end 2.11 -1.385) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.385 2.11) (end -2.11 2.11) (layer F.SilkS) (width 0.12))
-    (fp_line (start -2.11 2.11) (end -2.11 1.385) (layer F.SilkS) (width 0.12))
-    (fp_line (start 1.385 2.11) (end 2.11 2.11) (layer F.SilkS) (width 0.12))
-    (fp_line (start 2.11 2.11) (end 2.11 1.385) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1.385 -2.11) (end -2.11 -2.11) (layer F.SilkS) (width 0.12))
-    (fp_line (start -1 -2) (end 2 -2) (layer F.Fab) (width 0.1))
-    (fp_line (start 2 -2) (end 2 2) (layer F.Fab) (width 0.1))
-    (fp_line (start 2 2) (end -2 2) (layer F.Fab) (width 0.1))
-    (fp_line (start -2 2) (end -2 -1) (layer F.Fab) (width 0.1))
-    (fp_line (start -2 -1) (end -1 -2) (layer F.Fab) (width 0.1))
-    (fp_line (start -2.62 -2.62) (end -2.62 2.62) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -2.62 2.62) (end 2.62 2.62) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.62 2.62) (end 2.62 -2.62) (layer F.CrtYd) (width 0.05))
     (fp_line (start 2.62 -2.62) (end -2.62 -2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 2.62 2.62) (end 2.62 -2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.62 2.62) (end 2.62 2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2.62 -2.62) (end -2.62 2.62) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -2 -1) (end -1 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start -2 2) (end -2 -1) (layer F.Fab) (width 0.1))
+    (fp_line (start 2 2) (end -2 2) (layer F.Fab) (width 0.1))
+    (fp_line (start 2 -2) (end 2 2) (layer F.Fab) (width 0.1))
+    (fp_line (start -1 -2) (end 2 -2) (layer F.Fab) (width 0.1))
+    (fp_line (start -1.385 -2.11) (end -2.11 -2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.11 2.11) (end 2.11 1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.385 2.11) (end 2.11 2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start -2.11 2.11) (end -2.11 1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start -1.385 2.11) (end -2.11 2.11) (layer F.SilkS) (width 0.12))
+    (fp_line (start 2.11 -2.11) (end 2.11 -1.385) (layer F.SilkS) (width 0.12))
+    (fp_line (start 1.385 -2.11) (end 2.11 -2.11) (layer F.SilkS) (width 0.12))
     (fp_text user %R (at 0 0) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 1 smd roundrect (at -1.9625 -0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
-    (pad 2 smd roundrect (at -1.9625 -0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
-    (pad 3 smd roundrect (at -1.9625 0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
-    (pad 4 smd roundrect (at -1.9625 0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
-    (pad 5 smd roundrect (at -0.975 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 1 GND))
-    (pad 6 smd roundrect (at -0.325 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 437 "Net-(U16-Pad6)"))
-    (pad 7 smd roundrect (at 0.325 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 258 "Net-(R126-Pad1)"))
-    (pad 8 smd roundrect (at 0.975 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 298 "Net-(R127-Pad1)"))
-    (pad 9 smd roundrect (at 1.9625 0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 283 "Net-(C89-Pad1)"))
-    (pad 10 smd roundrect (at 1.9625 0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 195 "Net-(D22-Pad2)"))
-    (pad 11 smd roundrect (at 1.9625 -0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 195 "Net-(D22-Pad2)"))
-    (pad 12 smd roundrect (at 1.9625 -0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 195 "Net-(D22-Pad2)"))
-    (pad 13 smd roundrect (at 0.975 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 1 GND))
-    (pad 14 smd roundrect (at 0.325 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 1 GND))
-    (pad 15 smd roundrect (at -0.325 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 259 /CurrentSenser/12V_OUT_FAULT))
-    (pad 16 smd roundrect (at -0.975 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 69 /CurrentSenser/12V_SW))
+    (pad "" smd roundrect (at 0.675 0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
+    (pad "" smd roundrect (at 0.675 -0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
+    (pad "" smd roundrect (at -0.675 0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
+    (pad "" smd roundrect (at -0.675 -0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
     (pad 17 smd rect (at 0 0) (size 2.7 2.7) (layers F.Cu F.Mask)
       (net 1 GND))
-    (pad "" smd roundrect (at -0.675 -0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
-    (pad "" smd roundrect (at -0.675 0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
-    (pad "" smd roundrect (at 0.675 -0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
-    (pad "" smd roundrect (at 0.675 0.675) (size 1.09 1.09) (layers F.Paste) (roundrect_rratio 0.2293559633027523))
+    (pad 16 smd roundrect (at -0.975 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 445 /PowerOutputs/12V_SW))
+    (pad 15 smd roundrect (at -0.325 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 444 /MCU/12V_OUT_FAULT))
+    (pad 14 smd roundrect (at 0.325 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 13 smd roundrect (at 0.975 -1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 12 smd roundrect (at 1.9625 -0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 192 "Net-(D22-Pad2)"))
+    (pad 11 smd roundrect (at 1.9625 -0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 192 "Net-(D22-Pad2)"))
+    (pad 10 smd roundrect (at 1.9625 0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 192 "Net-(D22-Pad2)"))
+    (pad 9 smd roundrect (at 1.9625 0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 279 "Net-(C89-Pad1)"))
+    (pad 8 smd roundrect (at 0.975 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 294 "Net-(R127-Pad1)"))
+    (pad 7 smd roundrect (at 0.325 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 255 "Net-(R126-Pad1)"))
+    (pad 6 smd roundrect (at -0.325 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 429 "Net-(U16-Pad6)"))
+    (pad 5 smd roundrect (at -0.975 1.9625) (size 0.3 0.825) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 1 GND))
+    (pad 4 smd roundrect (at -1.9625 0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 9 +12V))
+    (pad 3 smd roundrect (at -1.9625 0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 9 +12V))
+    (pad 2 smd roundrect (at -1.9625 -0.325) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 9 +12V))
+    (pad 1 smd roundrect (at -1.9625 -0.975) (size 0.825 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 9 +12V))
     (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-16-1EP_4x4mm_P0.65mm_EP2.7x2.7mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3662,26 +3888,26 @@
     (fp_text reference R127 (at 2.75 0.04) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 120k/1% (at 0 1.17) (layer F.Fab) hide
+    (fp_text value 200k/1% (at 0 1.17) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
     (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
     (fp_text user %R (at 0 0) (layer F.Fab) hide
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
-    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 298 "Net-(R127-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
+    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 294 "Net-(R127-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3698,26 +3924,26 @@
     (fp_text reference R126 (at 2.75 0.04) (layer F.SilkS)
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_text value 100k/1% (at 0 1.17) (layer F.Fab) hide
+    (fp_text value 200k/1% (at 0 1.17) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
-    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
-    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
     (fp_line (start 0.93 0.47) (end -0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.93 -0.47) (end 0.93 0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 -0.47) (end 0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.93 0.47) (end -0.93 -0.47) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.153641 0.38) (end 0.153641 0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start -0.153641 -0.38) (end 0.153641 -0.38) (layer F.SilkS) (width 0.12))
+    (fp_line (start 0.525 0.27) (end -0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start 0.525 -0.27) (end 0.525 0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 -0.27) (end 0.525 -0.27) (layer F.Fab) (width 0.1))
+    (fp_line (start -0.525 0.27) (end -0.525 -0.27) (layer F.Fab) (width 0.1))
     (fp_text user %R (at 0 0) (layer F.Fab) hide
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
-    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 258 "Net-(R126-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
+    (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+      (net 255 "Net-(R126-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -3751,7 +3977,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 283 "Net-(C89-Pad1)"))
+      (net 279 "Net-(C89-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3787,7 +4013,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3823,7 +4049,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3859,7 +4085,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3895,7 +4121,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3931,7 +4157,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -3967,7 +4193,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -4003,7 +4229,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -4040,15 +4266,15 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 5 smd rect (at 1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 4 smd rect (at 1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 394 "Net-(U6-Pad4)"))
+      (net 388 "Net-(U6-Pad4)"))
     (pad 3 smd rect (at -1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd rect (at -1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 1 smd rect (at -1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -4082,7 +4308,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -4146,205 +4372,205 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 100 smd roundrect (at -6 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 99 smd roundrect (at -5.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 98 smd roundrect (at -5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 168 /FSMC_NBL1))
+      (net 165 /FSMC_NBL1))
     (pad 97 smd roundrect (at -4.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 153 /FSMC_NBL0))
+      (net 150 /FSMC_NBL0))
     (pad 96 smd roundrect (at -4 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 254 /IIC_SCL))
+      (net 251 /IIC_SCL))
     (pad 95 smd roundrect (at -3.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 255 /IIC_SDA))
+      (net 252 /IIC_SDA))
     (pad 94 smd roundrect (at -3 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 297 "Net-(R124-Pad1)"))
+      (net 293 "Net-(R124-Pad1)"))
     (pad 93 smd roundrect (at -2.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 152 /FSMC_NL))
+      (net 149 /FSMC_NL))
     (pad 92 smd roundrect (at -2 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 69 /CurrentSenser/12V_SW))
+      (net 445 /PowerOutputs/12V_SW))
     (pad 91 smd roundrect (at -1.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 179 /SPI_MOSI))
+      (net 176 /SPI_MOSI))
     (pad 90 smd roundrect (at -1 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 180 /SPI_MISO))
+      (net 177 /SPI_MISO))
     (pad 89 smd roundrect (at -0.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 182 /SPI_SCK))
+      (net 179 /SPI_SCK))
     (pad 88 smd roundrect (at 0 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 176 /FSMC_NE1))
+      (net 173 /FSMC_NE1))
     (pad 87 smd roundrect (at 0.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 160 /FSMC_NWAIT))
+      (net 157 /FSMC_NWAIT))
     (pad 86 smd roundrect (at 1 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 177 /FSMC_NWE))
+      (net 174 /FSMC_NWE))
     (pad 85 smd roundrect (at 1.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 161 /FSMC_NOE))
+      (net 158 /FSMC_NOE))
     (pad 84 smd roundrect (at 2 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 146 /FSMC_CLK))
+      (net 143 /FSMC_CLK))
     (pad 83 smd roundrect (at 2.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 436 "Net-(U15-Pad83)"))
+      (net 446 /MCU/3V3MP_OUT_FAULT))
     (pad 82 smd roundrect (at 3 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 164 /FSMC_D3))
+      (net 161 /FSMC_D3))
     (pad 81 smd roundrect (at 3.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 174 /FSMC_D2))
+      (net 171 /FSMC_D2))
     (pad 80 smd roundrect (at 4 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 178 /CSBSEL0))
+      (net 175 /CSBSEL0))
     (pad 79 smd roundrect (at 4.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 48 /MCU/CPU_UART4_RX))
+      (net 47 /MCU/CPU_UART4_RX))
     (pad 78 smd roundrect (at 5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 47 /MCU/CPU_UART4_TX))
+      (net 46 /MCU/CPU_UART4_TX))
     (pad 77 smd roundrect (at 5.5 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 135 /SPI_CS))
+      (net 132 /SPI_CS))
     (pad 76 smd roundrect (at 6 -7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 45 /MCU/CPU_SWCLK))
+      (net 44 /MCU/CPU_SWCLK))
     (pad 75 smd roundrect (at 7.675 -6 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 74 smd roundrect (at 7.675 -5.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 73 smd roundrect (at 7.675 -5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 435 "Net-(U15-Pad73)"))
+      (net 428 "Net-(U15-Pad73)"))
     (pad 72 smd roundrect (at 7.675 -4.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 46 /MCU/CPU_SWDIO))
+      (net 45 /MCU/CPU_SWDIO))
     (pad 71 smd roundrect (at 7.675 -4 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 134 /CRESET))
+      (net 131 /CRESET))
     (pad 70 smd roundrect (at 7.675 -3.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 133 /CDONE))
+      (net 130 /CDONE))
     (pad 69 smd roundrect (at 7.675 -3 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 55 /MCU/CPU_UART1_RX))
+      (net 54 /MCU/CPU_UART1_RX))
     (pad 68 smd roundrect (at 7.675 -2.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 56 /MCU/CPU_UART1_TX))
+      (net 55 /MCU/CPU_UART1_TX))
     (pad 67 smd roundrect (at 7.675 -2 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 181 /CSBSEL1))
+      (net 178 /CSBSEL1))
     (pad 66 smd roundrect (at 7.675 -1.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 52 /MCU/CPU_PWM_CH4))
+      (net 51 /MCU/CPU_PWM_CH4))
     (pad 65 smd roundrect (at 7.675 -1 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 51 /MCU/CPU_PWM_CH3))
+      (net 50 /MCU/CPU_PWM_CH3))
     (pad 64 smd roundrect (at 7.675 -0.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 50 /MCU/CPU_PWM_CH2))
+      (net 49 /MCU/CPU_PWM_CH2))
     (pad 63 smd roundrect (at 7.675 0 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 49 /MCU/CPU_PWM_CH1))
+      (net 48 /MCU/CPU_PWM_CH1))
     (pad 62 smd roundrect (at 7.675 0.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 157 /FSMC_D1))
+      (net 154 /FSMC_D1))
     (pad 61 smd roundrect (at 7.675 1 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 150 /FSMC_D0))
+      (net 147 /FSMC_D0))
     (pad 60 smd roundrect (at 7.675 1.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 172 /FSMC_A2))
+      (net 169 /FSMC_A2))
     (pad 59 smd roundrect (at 7.675 2 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 159 /FSMC_A1))
+      (net 156 /FSMC_A1))
     (pad 58 smd roundrect (at 7.675 2.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 167 /FSMC_A0))
+      (net 164 /FSMC_A0))
     (pad 57 smd roundrect (at 7.675 3 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 147 /FSMC_D15))
+      (net 144 /FSMC_D15))
     (pad 56 smd roundrect (at 7.675 3.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 169 /FSMC_D14))
+      (net 166 /FSMC_D14))
     (pad 55 smd roundrect (at 7.675 4 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 173 /FSMC_D13))
+      (net 170 /FSMC_D13))
     (pad 54 smd roundrect (at 7.675 4.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 57 /MCU/CPU_SPI2_MOSI))
+      (net 56 /MCU/CPU_SPI2_MOSI))
     (pad 53 smd roundrect (at 7.675 5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 58 /MCU/CPU_SPI2_MISO))
+      (net 57 /MCU/CPU_SPI2_MISO))
     (pad 52 smd roundrect (at 7.675 5.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 59 /MCU/CPU_SPI2_SCK))
+      (net 58 /MCU/CPU_SPI2_SCK))
     (pad 51 smd roundrect (at 7.675 6 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 60 /MCU/CPU_SPI2_CS))
+      (net 59 /MCU/CPU_SPI2_CS))
     (pad 50 smd roundrect (at 6 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 49 smd roundrect (at 5.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 48 smd roundrect (at 5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 53 /MCU/CPU_IIC2_SDA))
+      (net 52 /MCU/CPU_IIC2_SDA))
     (pad 47 smd roundrect (at 4.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 54 /MCU/CPU_IIC2_SCL))
+      (net 53 /MCU/CPU_IIC2_SCL))
     (pad 46 smd roundrect (at 4 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 162 /FSMC_D12))
+      (net 159 /FSMC_D12))
     (pad 45 smd roundrect (at 3.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 170 /FSMC_D11))
+      (net 167 /FSMC_D11))
     (pad 44 smd roundrect (at 3 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 149 /FSMC_D10))
+      (net 146 /FSMC_D10))
     (pad 43 smd roundrect (at 2.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 148 /FSMC_D9))
+      (net 145 /FSMC_D9))
     (pad 42 smd roundrect (at 2 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 163 /FSMC_D8))
+      (net 160 /FSMC_D8))
     (pad 41 smd roundrect (at 1.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 155 /FSMC_D7))
+      (net 152 /FSMC_D7))
     (pad 40 smd roundrect (at 1 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 154 /FSMC_D6))
+      (net 151 /FSMC_D6))
     (pad 39 smd roundrect (at 0.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 156 /FSMC_D5))
+      (net 153 /FSMC_D5))
     (pad 38 smd roundrect (at 0 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 171 /FSMC_D4))
+      (net 168 /FSMC_D4))
     (pad 37 smd roundrect (at -0.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 259 /CurrentSenser/12V_OUT_FAULT))
+      (net 444 /MCU/12V_OUT_FAULT))
     (pad 36 smd roundrect (at -1 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 9 /CurrentSenser/12V_CURRENT))
+      (net 443 /PowerOutputs/12V_CURRENT))
     (pad 35 smd roundrect (at -1.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 303 /CurrentSenser/12V_CURRENT_REF))
+      (net 448 /PowerOutputs/12V_CURRENT_REF))
     (pad 34 smd roundrect (at -2 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 301 /MCU/CPU_ADC7))
+      (net 297 /MCU/CPU_ADC7))
     (pad 33 smd roundrect (at -2.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 302 /MCU/CPU_ADC6))
+      (net 298 /MCU/CPU_ADC6))
     (pad 32 smd roundrect (at -3 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 63 /MCU/CPU_ADC5))
+      (net 62 /MCU/CPU_ADC5))
     (pad 31 smd roundrect (at -3.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 64 /MCU/CPU_ADC4))
+      (net 63 /MCU/CPU_ADC4))
     (pad 30 smd roundrect (at -4 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 61 /MCU/CPU_DAC1))
+      (net 60 /MCU/CPU_DAC1))
     (pad 29 smd roundrect (at -4.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 62 /MCU/CPU_DAC0))
+      (net 61 /MCU/CPU_DAC0))
     (pad 28 smd roundrect (at -5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 27 smd roundrect (at -5.5 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 26 smd roundrect (at -6 7.675 90) (size 0.3 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 65 /MCU/CPU_ADC3))
+      (net 64 /MCU/CPU_ADC3))
     (pad 25 smd roundrect (at -7.675 6 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 66 /MCU/CPU_ADC2))
+      (net 65 /MCU/CPU_ADC2))
     (pad 24 smd roundrect (at -7.675 5.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 67 /MCU/CPU_ADC1))
+      (net 66 /MCU/CPU_ADC1))
     (pad 23 smd roundrect (at -7.675 5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 68 /MCU/CPU_ADC0))
+      (net 67 /MCU/CPU_ADC0))
     (pad 22 smd roundrect (at -7.675 4.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 21 smd roundrect (at -7.675 4 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 20 smd roundrect (at -7.675 3.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 19 smd roundrect (at -7.675 3 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 18 smd roundrect (at -7.675 2.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 434 "Net-(U15-Pad18)"))
+      (net 447 /PowerOutputs/3V3MP_SW))
     (pad 17 smd roundrect (at -7.675 2 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 75 /MCU/CPU_POE_SRC_STATUS))
+      (net 73 /MCU/CPU_POE_SRC_STATUS))
     (pad 16 smd roundrect (at -7.675 1.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 203 "Net-(SW3-Pad2)"))
+      (net 200 "Net-(SW3-Pad2)"))
     (pad 15 smd roundrect (at -7.675 1 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 28 "Net-(D21-Pad2)"))
+      (net 27 "Net-(D21-Pad2)"))
     (pad 14 smd roundrect (at -7.675 0.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (pad 13 smd roundrect (at -7.675 0 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 281 "Net-(C76-Pad1)"))
+      (net 277 "Net-(C76-Pad1)"))
     (pad 12 smd roundrect (at -7.675 -0.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 280 "Net-(C75-Pad1)"))
+      (net 276 "Net-(C75-Pad1)"))
     (pad 11 smd roundrect (at -7.675 -1 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 10 smd roundrect (at -7.675 -1.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 9 smd roundrect (at -7.675 -2 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 74 /MCU/CPU_POE_AT_EVENT))
+      (net 72 /MCU/CPU_POE_AT_EVENT))
     (pad 8 smd roundrect (at -7.675 -2.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 136 /ENC_INT))
+      (net 133 /ENC_INT))
     (pad 7 smd roundrect (at -7.675 -3 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 183 /SPI_ENC_CS))
+      (net 180 /SPI_ENC_CS))
     (pad 6 smd roundrect (at -7.675 -3.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 5 smd roundrect (at -7.675 -4 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 166 /FSMC_A6))
+      (net 163 /FSMC_A6))
     (pad 4 smd roundrect (at -7.675 -4.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 175 /FSMC_A5))
+      (net 172 /FSMC_A5))
     (pad 3 smd roundrect (at -7.675 -5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 165 /FSMC_A4))
+      (net 162 /FSMC_A4))
     (pad 2 smd roundrect (at -7.675 -5.5 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 158 /FSMC_A3))
+      (net 155 /FSMC_A3))
     (pad 1 smd roundrect (at -7.675 -6 90) (size 1.6 0.3) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 151 /FSMC_A7))
+      (net 148 /FSMC_A7))
     (model ${KISYS3DMOD}/Package_QFP.3dshapes/LQFP-100_14x14mm_P0.5mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -4378,7 +4604,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -4414,7 +4640,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -4450,7 +4676,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (pad 2 smd roundrect (at 0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4486,7 +4712,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (pad 2 smd roundrect (at 0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4522,7 +4748,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (pad 2 smd roundrect (at 0.95 0 270) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4558,7 +4784,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 2 smd roundrect (at 0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4594,7 +4820,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 2 smd roundrect (at 0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4630,7 +4856,7 @@
       (effects (font (size 0.5 0.5) (thickness 0.08)))
     )
     (pad 1 smd roundrect (at -0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 2 smd roundrect (at 0.95 0 90) (size 1 1.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0805_2012Metric.wrl
@@ -4666,9 +4892,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -3.3875 0 90) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1298696103896104)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd roundrect (at 3.3875 0 90) (size 1.925 5.45) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1298696103896104)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (model ${KISYS3DMOD}/Fuse.3dshapes/Fuse_2920_7451Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -4709,7 +4935,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2.15 0 90) (size 2.5 2.3) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd rect (at 2.15 0 90) (size 2.5 2.3) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMB.wrl
@@ -4747,7 +4973,7 @@
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 196 HSADC_IN))
+      (net 193 HSADC_IN))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -4879,63 +5105,63 @@
     (pad 1 smd rect (at -1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at 1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 92 /EEM0_0_P))
+      (net 89 /EEM0_0_P))
     (pad 3 smd rect (at -1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 100 /EEM0_0_N))
+      (net 97 /EEM0_0_N))
     (pad 4 smd rect (at 1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 5 smd rect (at -1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 99 /EEM0_1_P))
+      (net 96 /EEM0_1_P))
     (pad 6 smd rect (at 1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 91 /EEM0_1_N))
+      (net 88 /EEM0_1_N))
     (pad 7 smd rect (at -1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 8 smd rect (at 1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 90 /EEM0_2_P))
+      (net 87 /EEM0_2_P))
     (pad 9 smd rect (at -1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 98 /EEM0_2_N))
+      (net 95 /EEM0_2_N))
     (pad 10 smd rect (at 1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 11 smd rect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 97 /EEM0_3_P))
+      (net 94 /EEM0_3_P))
     (pad 12 smd rect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 89 /EEM0_3_N))
+      (net 86 /EEM0_3_N))
     (pad 13 smd rect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 14 smd rect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 88 /EEM0_4_P))
+      (net 85 /EEM0_4_P))
     (pad 15 smd rect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 96 /EEM0_4_N))
+      (net 93 /EEM0_4_N))
     (pad 16 smd rect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 17 smd rect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 95 /EEM0_5_P))
+      (net 92 /EEM0_5_P))
     (pad 18 smd rect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 87 /EEM0_5_N))
+      (net 84 /EEM0_5_N))
     (pad 19 smd rect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 20 smd rect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 86 /EEM0_6_P))
+      (net 83 /EEM0_6_P))
     (pad 21 smd rect (at -1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 94 /EEM0_6_N))
+      (net 91 /EEM0_6_N))
     (pad 22 smd rect (at 1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 23 smd rect (at -1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 93 /EEM0_7_P))
+      (net 90 /EEM0_7_P))
     (pad 24 smd rect (at 1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 85 /EEM0_7_N))
+      (net 82 /EEM0_7_N))
     (pad 25 smd rect (at -1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 26 smd rect (at 1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 80 /EEM0_IIC_SDA))
+      (net 77 /EEM0_IIC_SDA))
     (pad 27 smd rect (at -1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 79 /EEM0_IIC_SCL))
+      (net 76 /EEM0_IIC_SCL))
     (pad 28 smd rect (at 1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 29 smd rect (at -1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 30 smd rect (at 1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 18 +3V3MP))
+      (net 17 +3V3MP))
     (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x15_P1.27mm_Vertical_SMD.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -4969,7 +5195,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5005,7 +5231,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5041,7 +5267,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5077,7 +5303,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5113,7 +5339,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5149,7 +5375,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5187,7 +5413,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5223,7 +5449,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5259,7 +5485,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5295,7 +5521,7 @@
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5329,7 +5555,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5365,7 +5591,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5401,7 +5627,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5437,7 +5663,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5473,7 +5699,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5509,7 +5735,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5547,7 +5773,7 @@
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5581,7 +5807,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5617,7 +5843,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5653,7 +5879,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5689,7 +5915,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5725,7 +5951,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5761,7 +5987,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5797,7 +6023,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5833,7 +6059,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5871,7 +6097,7 @@
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -5905,7 +6131,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5941,7 +6167,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)) (justify mirror))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -5979,7 +6205,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6015,7 +6241,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6051,7 +6277,7 @@
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6087,7 +6313,7 @@
     (pad 1 smd roundrect (at -0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0 270) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6121,9 +6347,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 251 /FPGA/LVDS2_7_N))
+      (net 248 /FPGA/LVDS2_7_N))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 125 /EEM2_7_P))
+      (net 122 /EEM2_7_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6157,9 +6383,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 250 /FPGA/LVDS2_7_P))
+      (net 247 /FPGA/LVDS2_7_P))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 117 /EEM2_7_N))
+      (net 114 /EEM2_7_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6193,9 +6419,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 249 /FPGA/LVDS2_6_N))
+      (net 246 /FPGA/LVDS2_6_N))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 118 /EEM2_6_P))
+      (net 115 /EEM2_6_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6229,9 +6455,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 248 /FPGA/LVDS2_6_P))
+      (net 245 /FPGA/LVDS2_6_P))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 126 /EEM2_6_N))
+      (net 123 /EEM2_6_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6265,9 +6491,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 247 /FPGA/LVDS2_5_N))
+      (net 244 /FPGA/LVDS2_5_N))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 127 /EEM2_5_P))
+      (net 124 /EEM2_5_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6301,9 +6527,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 246 /FPGA/LVDS2_5_P))
+      (net 243 /FPGA/LVDS2_5_P))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 119 /EEM2_5_N))
+      (net 116 /EEM2_5_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6337,9 +6563,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 245 /FPGA/LVDS2_4_N))
+      (net 242 /FPGA/LVDS2_4_N))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 120 /EEM2_4_P))
+      (net 117 /EEM2_4_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -6373,9 +6599,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 244 /FPGA/LVDS2_4_P))
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+      (net 84 /EEM0_5_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 214 /FPGA/LVDS0_5_P))
+      (net 211 /FPGA/LVDS0_5_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7489,9 +7715,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 88 /EEM0_4_P))
+      (net 85 /EEM0_4_P))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 213 /FPGA/LVDS0_4_N))
+      (net 210 /FPGA/LVDS0_4_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7525,9 +7751,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 96 /EEM0_4_N))
+      (net 93 /EEM0_4_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 212 /FPGA/LVDS0_4_P))
+      (net 209 /FPGA/LVDS0_4_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7561,9 +7787,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 97 /EEM0_3_P))
+      (net 94 /EEM0_3_P))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 211 /FPGA/LVDS0_3_N))
+      (net 208 /FPGA/LVDS0_3_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7597,9 +7823,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 89 /EEM0_3_N))
+      (net 86 /EEM0_3_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 210 /FPGA/LVDS0_3_P))
+      (net 207 /FPGA/LVDS0_3_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7633,9 +7859,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 90 /EEM0_2_P))
+      (net 87 /EEM0_2_P))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 209 /FPGA/LVDS0_2_N))
+      (net 206 /FPGA/LVDS0_2_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7669,9 +7895,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 98 /EEM0_2_N))
+      (net 95 /EEM0_2_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 208 /FPGA/LVDS0_2_P))
+      (net 205 /FPGA/LVDS0_2_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7705,9 +7931,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 99 /EEM0_1_P))
+      (net 96 /EEM0_1_P))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 207 /FPGA/LVDS0_1_N))
+      (net 204 /FPGA/LVDS0_1_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7741,9 +7967,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 91 /EEM0_1_N))
+      (net 88 /EEM0_1_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 206 /FPGA/LVDS0_1_P))
+      (net 203 /FPGA/LVDS0_1_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7777,9 +8003,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 92 /EEM0_0_P))
+      (net 89 /EEM0_0_P))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 205 /FPGA/LVDS0_0_N))
+      (net 202 /FPGA/LVDS0_0_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7813,9 +8039,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 100 /EEM0_0_N))
+      (net 97 /EEM0_0_N))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 204 /FPGA/LVDS0_0_P))
+      (net 201 /FPGA/LVDS0_0_P))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7849,9 +8075,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 288 "Net-(R3-Pad1)"))
+      (net 284 "Net-(R3-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 287 "Net-(R2-Pad1)"))
+      (net 283 "Net-(R2-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -7885,7 +8111,7 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 287 "Net-(R2-Pad1)"))
+      (net 283 "Net-(R2-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -7921,7 +8147,7 @@
       (effects (font (size 0.25 0.25) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 261 "Net-(C5-Pad1)"))
+      (net 257 "Net-(C5-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -8055,63 +8281,63 @@
     (pad 1 smd rect (at -1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at 1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 124 /EEM2_0_P))
+      (net 121 /EEM2_0_P))
     (pad 3 smd rect (at -1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 132 /EEM2_0_N))
+      (net 129 /EEM2_0_N))
     (pad 4 smd rect (at 1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 5 smd rect (at -1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 131 /EEM2_1_P))
+      (net 128 /EEM2_1_P))
     (pad 6 smd rect (at 1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 123 /EEM2_1_N))
+      (net 120 /EEM2_1_N))
     (pad 7 smd rect (at -1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 8 smd rect (at 1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 122 /EEM2_2_P))
+      (net 119 /EEM2_2_P))
     (pad 9 smd rect (at -1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 130 /EEM2_2_N))
+      (net 127 /EEM2_2_N))
     (pad 10 smd rect (at 1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 11 smd rect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 129 /EEM2_3_P))
+      (net 126 /EEM2_3_P))
     (pad 12 smd rect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 121 /EEM2_3_N))
+      (net 118 /EEM2_3_N))
     (pad 13 smd rect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 14 smd rect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 120 /EEM2_4_P))
+      (net 117 /EEM2_4_P))
     (pad 15 smd rect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 128 /EEM2_4_N))
+      (net 125 /EEM2_4_N))
     (pad 16 smd rect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 17 smd rect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 127 /EEM2_5_P))
+      (net 124 /EEM2_5_P))
     (pad 18 smd rect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 119 /EEM2_5_N))
+      (net 116 /EEM2_5_N))
     (pad 19 smd rect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 20 smd rect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 118 /EEM2_6_P))
+      (net 115 /EEM2_6_P))
     (pad 21 smd rect (at -1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 126 /EEM2_6_N))
+      (net 123 /EEM2_6_N))
     (pad 22 smd rect (at 1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 23 smd rect (at -1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 125 /EEM2_7_P))
+      (net 122 /EEM2_7_P))
     (pad 24 smd rect (at 1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 117 /EEM2_7_N))
+      (net 114 /EEM2_7_N))
     (pad 25 smd rect (at -1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 26 smd rect (at 1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 84 /EEM2_IIC_SDA))
+      (net 81 /EEM2_IIC_SDA))
     (pad 27 smd rect (at -1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 83 /EEM2_IIC_SCL))
+      (net 80 /EEM2_IIC_SCL))
     (pad 28 smd rect (at 1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 29 smd rect (at -1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 30 smd rect (at 1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 18 +3V3MP))
+      (net 17 +3V3MP))
     (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x15_P1.27mm_Vertical_SMD.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8145,9 +8371,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 90 /EEM0_2_P))
+      (net 87 /EEM0_2_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 98 /EEM0_2_N))
+      (net 95 /EEM0_2_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8181,9 +8407,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 125 /EEM2_7_P))
+      (net 122 /EEM2_7_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 117 /EEM2_7_N))
+      (net 114 /EEM2_7_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8217,9 +8443,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 118 /EEM2_6_P))
+      (net 115 /EEM2_6_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 126 /EEM2_6_N))
+      (net 123 /EEM2_6_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8253,9 +8479,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 127 /EEM2_5_P))
+      (net 124 /EEM2_5_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 119 /EEM2_5_N))
+      (net 116 /EEM2_5_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8289,9 +8515,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 120 /EEM2_4_P))
+      (net 117 /EEM2_4_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 128 /EEM2_4_N))
+      (net 125 /EEM2_4_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8325,9 +8551,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 129 /EEM2_3_P))
+      (net 126 /EEM2_3_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 121 /EEM2_3_N))
+      (net 118 /EEM2_3_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8361,9 +8587,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 122 /EEM2_2_P))
+      (net 119 /EEM2_2_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 130 /EEM2_2_N))
+      (net 127 /EEM2_2_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8397,9 +8623,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 131 /EEM2_1_P))
+      (net 128 /EEM2_1_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 123 /EEM2_1_N))
+      (net 120 /EEM2_1_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8433,9 +8659,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 124 /EEM2_0_P))
+      (net 121 /EEM2_0_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 132 /EEM2_0_N))
+      (net 129 /EEM2_0_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8469,9 +8695,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 109 /EEM1_7_P))
+      (net 106 /EEM1_7_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 101 /EEM1_7_N))
+      (net 98 /EEM1_7_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8505,9 +8731,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 102 /EEM1_6_P))
+      (net 99 /EEM1_6_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 110 /EEM1_6_N))
+      (net 107 /EEM1_6_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8541,9 +8767,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 111 /EEM1_5_P))
+      (net 108 /EEM1_5_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 103 /EEM1_5_N))
+      (net 100 /EEM1_5_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8577,9 +8803,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 104 /EEM1_4_P))
+      (net 101 /EEM1_4_P))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 112 /EEM1_4_N))
+      (net 109 /EEM1_4_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8613,9 +8839,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 113 /EEM1_3_P))
+      (net 110 /EEM1_3_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 105 /EEM1_3_N))
+      (net 102 /EEM1_3_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8649,9 +8875,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 106 /EEM1_2_P))
+      (net 103 /EEM1_2_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 114 /EEM1_2_N))
+      (net 111 /EEM1_2_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8685,9 +8911,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 115 /EEM1_1_P))
+      (net 112 /EEM1_1_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 107 /EEM1_1_N))
+      (net 104 /EEM1_1_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8721,9 +8947,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 108 /EEM1_0_P))
+      (net 105 /EEM1_0_P))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 116 /EEM1_0_N))
+      (net 113 /EEM1_0_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8757,9 +8983,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 93 /EEM0_7_P))
+      (net 90 /EEM0_7_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 85 /EEM0_7_N))
+      (net 82 /EEM0_7_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8793,9 +9019,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 86 /EEM0_6_P))
+      (net 83 /EEM0_6_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 94 /EEM0_6_N))
+      (net 91 /EEM0_6_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8829,9 +9055,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 95 /EEM0_5_P))
+      (net 92 /EEM0_5_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 87 /EEM0_5_N))
+      (net 84 /EEM0_5_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8865,9 +9091,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 88 /EEM0_4_P))
+      (net 85 /EEM0_4_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 96 /EEM0_4_N))
+      (net 93 /EEM0_4_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8901,9 +9127,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 97 /EEM0_3_P))
+      (net 94 /EEM0_3_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 89 /EEM0_3_N))
+      (net 86 /EEM0_3_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8937,9 +9163,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 99 /EEM0_1_P))
+      (net 96 /EEM0_1_P))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 91 /EEM0_1_N))
+      (net 88 /EEM0_1_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -8973,9 +9199,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 92 /EEM0_0_P))
+      (net 89 /EEM0_0_P))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 100 /EEM0_0_N))
+      (net 97 /EEM0_0_N))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9009,7 +9235,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 280 "Net-(C75-Pad1)"))
+      (net 276 "Net-(C75-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -9045,9 +9271,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 289 "Net-(R5-Pad2)"))
+      (net 285 "Net-(R5-Pad2)"))
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 305 "Net-(D23-Pad1)"))
+      (net 299 "Net-(D23-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9081,9 +9307,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 305 "Net-(D23-Pad1)"))
+      (net 299 "Net-(D23-Pad1)"))
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 196 HSADC_IN))
+      (net 193 HSADC_IN))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9191,7 +9417,7 @@
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 3 /HighSpeedADC/+5VA))
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 14 +5V))
+      (net 13 +5V))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9297,25 +9523,25 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 135 /SPI_CS))
+      (net 132 /SPI_CS))
     (pad 2 smd rect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 180 /SPI_MISO))
+      (net 177 /SPI_MISO))
     (pad 3 smd rect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 179 /SPI_MOSI))
+      (net 176 /SPI_MOSI))
     (pad 4 smd rect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 182 /SPI_SCK))
+      (net 179 /SPI_SCK))
     (pad 5 smd rect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 6 smd rect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 7 smd rect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 178 /CSBSEL0))
+      (net 175 /CSBSEL0))
     (pad 8 smd rect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 181 /CSBSEL1))
+      (net 178 /CSBSEL1))
     (pad 9 smd rect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 134 /CRESET))
+      (net 131 /CRESET))
     (pad 10 smd rect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 133 /CDONE))
+      (net 130 /CDONE))
     (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x05_P1.27mm_Vertical_SMD.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9427,53 +9653,53 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd rect (at 1.95 -6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at -1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 60 /MCU/CPU_SPI2_CS))
+      (net 59 /MCU/CPU_SPI2_CS))
     (pad 4 smd rect (at 1.95 -5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 5 smd rect (at -1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 59 /MCU/CPU_SPI2_SCK))
+      (net 58 /MCU/CPU_SPI2_SCK))
     (pad 6 smd rect (at 1.95 -4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 49 /MCU/CPU_PWM_CH1))
+      (net 48 /MCU/CPU_PWM_CH1))
     (pad 7 smd rect (at -1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 58 /MCU/CPU_SPI2_MISO))
+      (net 57 /MCU/CPU_SPI2_MISO))
     (pad 8 smd rect (at 1.95 -3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 50 /MCU/CPU_PWM_CH2))
+      (net 49 /MCU/CPU_PWM_CH2))
     (pad 9 smd rect (at -1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 57 /MCU/CPU_SPI2_MOSI))
+      (net 56 /MCU/CPU_SPI2_MOSI))
     (pad 10 smd rect (at 1.95 -1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 51 /MCU/CPU_PWM_CH3))
+      (net 50 /MCU/CPU_PWM_CH3))
     (pad 11 smd rect (at -1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 12 smd rect (at 1.95 -0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 52 /MCU/CPU_PWM_CH4))
+      (net 51 /MCU/CPU_PWM_CH4))
     (pad 13 smd rect (at -1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 56 /MCU/CPU_UART1_TX))
+      (net 55 /MCU/CPU_UART1_TX))
     (pad 14 smd rect (at 1.95 0.635) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 15 smd rect (at -1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 55 /MCU/CPU_UART1_RX))
+      (net 54 /MCU/CPU_UART1_RX))
     (pad 16 smd rect (at 1.95 1.905) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 47 /MCU/CPU_UART4_TX))
+      (net 46 /MCU/CPU_UART4_TX))
     (pad 17 smd rect (at -1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 18 smd rect (at 1.95 3.175) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 48 /MCU/CPU_UART4_RX))
+      (net 47 /MCU/CPU_UART4_RX))
     (pad 19 smd rect (at -1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 54 /MCU/CPU_IIC2_SCL))
+      (net 53 /MCU/CPU_IIC2_SCL))
     (pad 20 smd rect (at 1.95 4.445) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 21 smd rect (at -1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 53 /MCU/CPU_IIC2_SDA))
+      (net 52 /MCU/CPU_IIC2_SDA))
     (pad 22 smd rect (at 1.95 5.715) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 14 +5V))
+      (net 13 +5V))
     (pad 23 smd rect (at -1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 24 smd rect (at 1.95 6.985) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 14 +5V))
+      (net 13 +5V))
     (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x12_P1.27mm_Vertical_SMD.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9605,63 +9831,63 @@
     (pad 1 smd rect (at -1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at 1.95 -8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 108 /EEM1_0_P))
+      (net 105 /EEM1_0_P))
     (pad 3 smd rect (at -1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 116 /EEM1_0_N))
+      (net 113 /EEM1_0_N))
     (pad 4 smd rect (at 1.95 -7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 5 smd rect (at -1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 115 /EEM1_1_P))
+      (net 112 /EEM1_1_P))
     (pad 6 smd rect (at 1.95 -6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 107 /EEM1_1_N))
+      (net 104 /EEM1_1_N))
     (pad 7 smd rect (at -1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 8 smd rect (at 1.95 -5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 106 /EEM1_2_P))
+      (net 103 /EEM1_2_P))
     (pad 9 smd rect (at -1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 114 /EEM1_2_N))
+      (net 111 /EEM1_2_N))
     (pad 10 smd rect (at 1.95 -3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 11 smd rect (at -1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 113 /EEM1_3_P))
+      (net 110 /EEM1_3_P))
     (pad 12 smd rect (at 1.95 -2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 105 /EEM1_3_N))
+      (net 102 /EEM1_3_N))
     (pad 13 smd rect (at -1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 14 smd rect (at 1.95 -1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 104 /EEM1_4_P))
+      (net 101 /EEM1_4_P))
     (pad 15 smd rect (at -1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 112 /EEM1_4_N))
+      (net 109 /EEM1_4_N))
     (pad 16 smd rect (at 1.95 0) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 17 smd rect (at -1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 111 /EEM1_5_P))
+      (net 108 /EEM1_5_P))
     (pad 18 smd rect (at 1.95 1.27) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 103 /EEM1_5_N))
+      (net 100 /EEM1_5_N))
     (pad 19 smd rect (at -1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 20 smd rect (at 1.95 2.54) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 102 /EEM1_6_P))
+      (net 99 /EEM1_6_P))
     (pad 21 smd rect (at -1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 110 /EEM1_6_N))
+      (net 107 /EEM1_6_N))
     (pad 22 smd rect (at 1.95 3.81) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 23 smd rect (at -1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 109 /EEM1_7_P))
+      (net 106 /EEM1_7_P))
     (pad 24 smd rect (at 1.95 5.08) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 101 /EEM1_7_N))
+      (net 98 /EEM1_7_N))
     (pad 25 smd rect (at -1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 26 smd rect (at 1.95 6.35) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 82 /EEM1_IIC_SDA))
+      (net 79 /EEM1_IIC_SDA))
     (pad 27 smd rect (at -1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 81 /EEM1_IIC_SCL))
+      (net 78 /EEM1_IIC_SCL))
     (pad 28 smd rect (at 1.95 7.62) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 29 smd rect (at -1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
       (net 8 +12V_OUT))
     (pad 30 smd rect (at 1.95 8.89) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask)
-      (net 18 +3V3MP))
+      (net 17 +3V3MP))
     (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x15_P1.27mm_Vertical_SMD.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9695,9 +9921,9 @@
       (effects (font (size 0.4 0.4) (thickness 0.06)))
     )
     (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9731,9 +9957,9 @@
       (effects (font (size 0.4 0.4) (thickness 0.06)))
     )
     (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9767,9 +9993,9 @@
       (effects (font (size 0.4 0.4) (thickness 0.06)))
     )
     (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9803,9 +10029,9 @@
       (effects (font (size 0.4 0.4) (thickness 0.06)))
     )
     (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 262 "Net-(C8-Pad2)"))
+      (net 258 "Net-(C8-Pad2)"))
     (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Inductor_SMD.3dshapes/L_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9839,9 +10065,9 @@
       (effects (font (size 0.8 0.8) (thickness 0.12)))
     )
     (pad 1 smd roundrect (at -1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2173904347826087)
-      (net 279 "Net-(C74-Pad1)"))
+      (net 275 "Net-(C74-Pad1)"))
     (pad 2 smd roundrect (at 1.475 0 180) (size 1.15 1.8) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2173904347826087)
-      (net 439 "Net-(C74-Pad2)"))
+      (net 431 "Net-(C74-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_1206_3216Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -9898,7 +10124,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -2.7 0 270) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 2 smd roundrect (at 2.7 0 270) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_6.3x7.7.wrl
@@ -9957,7 +10183,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -2.7 0 270) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 2 smd roundrect (at 2.7 0 270) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_6.3x7.7.wrl
@@ -10038,9 +10264,9 @@
     (pad 1 smd rect (at 3.1 -1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -3.1 1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 253 /FPGA/FPGA_KEY))
+      (net 250 /FPGA/FPGA_KEY))
     (pad 2 smd rect (at 3.1 1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 253 /FPGA/FPGA_KEY))
+      (net 250 /FPGA/FPGA_KEY))
     (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_SPST_SKQG_WithoutStem.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10074,9 +10300,9 @@
       (effects (font (size 0.26 0.26) (thickness 0.04)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 253 /FPGA/FPGA_KEY))
+      (net 250 /FPGA/FPGA_KEY))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10111,15 +10337,15 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 256 "Net-(R135-Pad2)"))
+      (net 253 "Net-(R135-Pad2)"))
     (pad 2 smd rect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 303 /CurrentSenser/12V_CURRENT_REF))
+      (net 448 /PowerOutputs/12V_CURRENT_REF))
     (pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 303 /CurrentSenser/12V_CURRENT_REF))
+      (net 448 /PowerOutputs/12V_CURRENT_REF))
     (pad 5 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10156,131 +10382,131 @@
     (pad 1 smd roundrect (at -5.599999 -3.750003 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 2 smd roundrect (at -5.599999 -3.250001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 270 "Net-(C59-Pad1)"))
+      (net 266 "Net-(C59-Pad1)"))
     (pad 3 smd roundrect (at -5.599999 -2.750002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 271 "Net-(C60-Pad1)"))
+      (net 267 "Net-(C60-Pad1)"))
     (pad 4 smd roundrect (at -5.599999 -2.250001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 5 smd roundrect (at -5.599999 -1.750002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 433 "Net-(U14-Pad5)"))
+      (net 427 "Net-(U14-Pad5)"))
     (pad 6 smd roundrect (at -5.599999 -1.250003 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 432 "Net-(U14-Pad6)"))
+      (net 426 "Net-(U14-Pad6)"))
     (pad 7 smd roundrect (at -5.599999 -0.750001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 431 "Net-(U14-Pad7)"))
+      (net 425 "Net-(U14-Pad7)"))
     (pad 8 smd roundrect (at -5.599999 -0.250002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 430 "Net-(U14-Pad8)"))
+      (net 424 "Net-(U14-Pad8)"))
     (pad 9 smd roundrect (at -5.599999 0.249999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 429 "Net-(U14-Pad9)"))
+      (net 423 "Net-(U14-Pad9)"))
     (pad 10 smd roundrect (at -5.599999 0.749999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 428 "Net-(U14-Pad10)"))
+      (net 422 "Net-(U14-Pad10)"))
     (pad 11 smd roundrect (at -5.599999 1.249998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 427 "Net-(U14-Pad11)"))
+      (net 421 "Net-(U14-Pad11)"))
     (pad 12 smd roundrect (at -5.599999 1.749999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 426 "Net-(U14-Pad12)"))
+      (net 420 "Net-(U14-Pad12)"))
     (pad 13 smd roundrect (at -5.599999 2.249998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 425 "Net-(U14-Pad13)"))
+      (net 419 "Net-(U14-Pad13)"))
     (pad 14 smd roundrect (at -5.599999 2.75 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 77 /Ethernet/RJ45_LED_Y))
+      (net 75 /Ethernet/RJ45_LED_Y))
     (pad 15 smd roundrect (at -5.599999 3.249999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 76 /Ethernet/RJ45_LED_G))
+      (net 74 /Ethernet/RJ45_LED_G))
     (pad 16 smd roundrect (at -5.599999 3.749998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 294 "Net-(R111-Pad1)"))
+      (net 290 "Net-(R111-Pad1)"))
     (pad 17 smd roundrect (at -3.75 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 18 smd roundrect (at -3.249999 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 19 smd roundrect (at -2.75 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 424 "Net-(U14-Pad19)"))
+      (net 418 "Net-(U14-Pad19)"))
     (pad 20 smd roundrect (at -2.249998 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 423 "Net-(U14-Pad20)"))
+      (net 417 "Net-(U14-Pad20)"))
     (pad 21 smd roundrect (at -1.749999 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 22 smd roundrect (at -1.25 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 23 smd roundrect (at -0.749999 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 24 smd roundrect (at -0.249999 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 25 smd roundrect (at 0.250002 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 26 smd roundrect (at 0.750001 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 274 "Net-(C70-Pad1)"))
+      (net 270 "Net-(C70-Pad1)"))
     (pad 27 smd roundrect (at 1.25 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 275 "Net-(C71-Pad2)"))
+      (net 271 "Net-(C71-Pad2)"))
     (pad 28 smd roundrect (at 1.750002 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 29 smd roundrect (at 2.250001 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 30 smd roundrect (at 2.750002 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 295 "Net-(R113-Pad1)"))
+      (net 291 "Net-(R113-Pad1)"))
     (pad 31 smd roundrect (at 3.250001 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 296 "Net-(R114-Pad2)"))
+      (net 292 "Net-(R114-Pad2)"))
     (pad 32 smd roundrect (at 3.75 5.599999 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 33 smd roundrect (at 5.600002 3.749998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 422 "Net-(U14-Pad33)"))
+      (net 416 "Net-(U14-Pad33)"))
     (pad 34 smd roundrect (at 5.600002 3.249999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 136 /ENC_INT))
+      (net 133 /ENC_INT))
     (pad 35 smd roundrect (at 5.600002 2.75 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 421 "Net-(U14-Pad35)"))
+      (net 415 "Net-(U14-Pad35)"))
     (pad 36 smd roundrect (at 5.600002 2.249998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 420 "Net-(U14-Pad36)"))
+      (net 414 "Net-(U14-Pad36)"))
     (pad 37 smd roundrect (at 5.600002 1.749999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 419 "Net-(U14-Pad37)"))
+      (net 413 "Net-(U14-Pad37)"))
     (pad 38 smd roundrect (at 5.600002 1.249998 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 418 "Net-(U14-Pad38)"))
+      (net 412 "Net-(U14-Pad38)"))
     (pad 39 smd roundrect (at 5.600002 0.749999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 417 "Net-(U14-Pad39)"))
+      (net 411 "Net-(U14-Pad39)"))
     (pad 40 smd roundrect (at 5.600002 0.249999 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 416 "Net-(U14-Pad40)"))
+      (net 410 "Net-(U14-Pad40)"))
     (pad 41 smd roundrect (at 5.600002 -0.250002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 415 "Net-(U14-Pad41)"))
+      (net 409 "Net-(U14-Pad41)"))
     (pad 42 smd roundrect (at 5.600002 -0.750001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 414 "Net-(U14-Pad42)"))
+      (net 408 "Net-(U14-Pad42)"))
     (pad 43 smd roundrect (at 5.600002 -1.250003 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 413 "Net-(U14-Pad43)"))
+      (net 407 "Net-(U14-Pad43)"))
     (pad 44 smd roundrect (at 5.600002 -1.750002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 412 "Net-(U14-Pad44)"))
+      (net 406 "Net-(U14-Pad44)"))
     (pad 45 smd roundrect (at 5.600002 -2.250001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 411 "Net-(U14-Pad45)"))
+      (net 405 "Net-(U14-Pad45)"))
     (pad 46 smd roundrect (at 5.600002 -2.750002 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 47 smd roundrect (at 5.600002 -3.250001 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 48 smd roundrect (at 5.600002 -3.750003 180) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 410 "Net-(U14-Pad48)"))
+      (net 404 "Net-(U14-Pad48)"))
     (pad 49 smd roundrect (at 3.75 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 183 /SPI_ENC_CS))
+      (net 180 /SPI_ENC_CS))
     (pad 50 smd roundrect (at 3.250001 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 180 /SPI_MISO))
+      (net 177 /SPI_MISO))
     (pad 51 smd roundrect (at 2.750002 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 179 /SPI_MOSI))
+      (net 176 /SPI_MOSI))
     (pad 52 smd roundrect (at 2.250001 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 182 /SPI_SCK))
+      (net 179 /SPI_SCK))
     (pad 53 smd roundrect (at 1.750002 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 409 "Net-(U14-Pad53)"))
+      (net 403 "Net-(U14-Pad53)"))
     (pad 54 smd roundrect (at 1.25 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 408 "Net-(U14-Pad54)"))
+      (net 402 "Net-(U14-Pad54)"))
     (pad 55 smd roundrect (at 0.750001 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 407 "Net-(U14-Pad55)"))
+      (net 401 "Net-(U14-Pad55)"))
     (pad 56 smd roundrect (at 0.250002 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 406 "Net-(U14-Pad56)"))
+      (net 400 "Net-(U14-Pad56)"))
     (pad 57 smd roundrect (at -0.249999 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 405 "Net-(U14-Pad57)"))
+      (net 399 "Net-(U14-Pad57)"))
     (pad 58 smd roundrect (at -0.749999 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 404 "Net-(U14-Pad58)"))
+      (net 398 "Net-(U14-Pad58)"))
     (pad 59 smd roundrect (at -1.25 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 403 "Net-(U14-Pad59)"))
+      (net 397 "Net-(U14-Pad59)"))
     (pad 60 smd roundrect (at -1.749999 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 402 "Net-(U14-Pad60)"))
+      (net 396 "Net-(U14-Pad60)"))
     (pad 61 smd roundrect (at -2.249998 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 401 "Net-(U14-Pad61)"))
+      (net 395 "Net-(U14-Pad61)"))
     (pad 62 smd roundrect (at -2.75 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
       (net 1 GND))
     (pad 63 smd roundrect (at -3.249999 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 272 "Net-(C67-Pad2)"))
+      (net 268 "Net-(C67-Pad2)"))
     (pad 64 smd roundrect (at -3.75 -5.600002 270) (size 0.299999 2.100001) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.4999983333277778)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model eec.models/Microchip_-_ENC624J600-I/PT.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10317,15 +10543,15 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -3.05 -2.25 90) (size 2.2 1) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 3 smd rect (at -3.05 0.75 90) (size 2.2 1) (layers F.Cu F.Paste F.Mask)
-      (net 14 +5V))
+      (net 13 +5V))
     (pad 5 smd rect (at 3.25 0 90) (size 1.8 3.4) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -3.05 -0.75 90) (size 2.2 1) (layers F.Cu F.Paste F.Mask)
-      (net 400 "Net-(U13-Pad2)"))
+      (net 394 "Net-(U13-Pad2)"))
     (pad 4 smd rect (at -3.05 2.25 90) (size 2.2 1) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-223-5.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10359,13 +10585,13 @@
     (fp_line (start -2.3 -1.45) (end 2.3 -1.45) (layer F.Fab) (width 0.15))
     (fp_line (start -2.3 1.45) (end -2.3 -1.45) (layer F.Fab) (width 0.15))
     (pad 1 smd rect (at -3.000142 -0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask)
-      (net 267 "Net-(C50-Pad2)"))
+      (net 263 "Net-(C50-Pad2)"))
     (pad 2 smd roundrect (at -3.000142 0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
-      (net 300 "Net-(U10-Pad2)"))
+      (net 296 "Net-(U10-Pad2)"))
     (pad 3 smd roundrect (at 3.000143 0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
       (net 1 GND))
     (pad 4 smd roundrect (at 3.000143 -0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
-      (net 74 /MCU/CPU_POE_AT_EVENT))
+      (net 72 /MCU/CPU_POE_AT_EVENT))
     (model eec.models/Broadcom_-_ACPL-217-500E.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10399,13 +10625,13 @@
     (fp_line (start -2.3 -1.45) (end 2.3 -1.45) (layer F.Fab) (width 0.15))
     (fp_line (start -2.3 1.45) (end -2.3 -1.45) (layer F.Fab) (width 0.15))
     (pad 1 smd rect (at -3.000142 -0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask)
-      (net 290 "Net-(R87-Pad2)"))
+      (net 286 "Net-(R87-Pad2)"))
     (pad 2 smd roundrect (at -3.000142 0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
-      (net 71 "Net-(Q2-Pad3)"))
+      (net 69 "Net-(Q2-Pad3)"))
     (pad 3 smd roundrect (at 3.000143 0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
-      (net 190 "Net-(Q3-Pad1)"))
+      (net 187 "Net-(Q3-Pad1)"))
     (pad 4 smd roundrect (at 3.000143 -0.635 270) (size 1.702833 0.532132) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.5)
-      (net 291 "Net-(R89-Pad1)"))
+      (net 287 "Net-(R89-Pad1)"))
     (model eec.models/Broadcom_-_ACPL-217-500E.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10440,21 +10666,21 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 8 smd rect (at 1.31 -0.97) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 284 "Net-(C90-Pad2)"))
+      (net 280 "Net-(C90-Pad2)"))
     (pad 7 smd rect (at 1.31 -0.33) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 285 "Net-(C90-Pad1)"))
+      (net 281 "Net-(C90-Pad1)"))
     (pad 6 smd rect (at 1.31 0.33) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 438 "Net-(U17-Pad6)"))
+      (net 430 "Net-(U17-Pad6)"))
     (pad 5 smd rect (at 1.31 0.97) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 299 "Net-(R134-Pad2)"))
+      (net 295 "Net-(R134-Pad2)"))
     (pad 4 smd rect (at -1.31 0.97) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at -1.31 0.33) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 303 /CurrentSenser/12V_CURRENT_REF))
+      (net 448 /PowerOutputs/12V_CURRENT_REF))
     (pad 2 smd rect (at -1.31 -0.33) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (pad 1 smd rect (at -1.31 -0.97) (size 1.22 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TSOT-23-8.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10605,19 +10831,19 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 20 smd rect (at 2.721348 -2.8575 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 262 "Net-(C8-Pad2)"))
+      (net 258 "Net-(C8-Pad2)"))
     (pad 19 smd rect (at 2.721348 -2.2225 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
       (net 3 /HighSpeedADC/+5VA))
     (pad 18 smd rect (at 2.721348 -1.5875 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 17 smd rect (at 2.721348 -0.9525 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 260 "Net-(C4-Pad1)"))
+      (net 256 "Net-(C4-Pad1)"))
     (pad 16 smd rect (at 2.721348 -0.3175 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 184 "Net-(C7-Pad2)"))
+      (net 181 "Net-(C7-Pad2)"))
     (pad 15 smd rect (at 2.721348 0.3175 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 184 "Net-(C7-Pad2)"))
+      (net 181 "Net-(C7-Pad2)"))
     (pad 14 smd rect (at 2.721348 0.9525 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 261 "Net-(C5-Pad1)"))
+      (net 257 "Net-(C5-Pad1)"))
     (pad 13 smd rect (at 2.721348 1.5875 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
       (net 2 "Net-(C2-Pad1)"))
     (pad 12 smd rect (at 2.721348 2.2225 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
@@ -10625,23 +10851,23 @@
     (pad 11 smd rect (at 2.721348 2.8575 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
       (net 3 /HighSpeedADC/+5VA))
     (pad 10 smd rect (at -2.721348 2.8575 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 145 /ADC_CLK))
+      (net 142 /ADC_CLK))
     (pad 9 smd rect (at -2.721348 2.2225 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 144 /ADC_D7))
+      (net 141 /ADC_D7))
     (pad 8 smd rect (at -2.721348 1.5875 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 143 /ADC_D6))
+      (net 140 /ADC_D6))
     (pad 7 smd rect (at -2.721348 0.9525 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 142 /ADC_D5))
+      (net 139 /ADC_D5))
     (pad 6 smd rect (at -2.721348 0.3175 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 141 /ADC_D4))
+      (net 138 /ADC_D4))
     (pad 5 smd rect (at -2.721348 -0.3175 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 140 /ADC_D3))
+      (net 137 /ADC_D3))
     (pad 4 smd rect (at -2.721348 -0.9525 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 139 /ADC_D2))
+      (net 136 /ADC_D2))
     (pad 3 smd rect (at -2.721348 -1.5875 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 138 /ADC_D1))
+      (net 135 /ADC_D1))
     (pad 2 smd rect (at -2.721348 -2.2225 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
-      (net 137 /ADC_D0))
+      (net 134 /ADC_D0))
     (pad 1 smd rect (at -2.721348 -2.8575 180) (size 1.454899 0.3548) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
   )
@@ -10672,7 +10898,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 256 "Net-(R135-Pad2)"))
+      (net 253 "Net-(R135-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -10708,9 +10934,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 256 "Net-(R135-Pad2)"))
+      (net 253 "Net-(R135-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10744,9 +10970,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 9 /CurrentSenser/12V_CURRENT))
+      (net 443 /PowerOutputs/12V_CURRENT))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 299 "Net-(R134-Pad2)"))
+      (net 295 "Net-(R134-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10780,7 +11006,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 284 "Net-(C90-Pad2)"))
+      (net 280 "Net-(C90-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 8 +12V_OUT))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -10816,9 +11042,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 285 "Net-(C90-Pad1)"))
+      (net 281 "Net-(C90-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 195 "Net-(D22-Pad2)"))
+      (net 192 "Net-(D22-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10852,21 +11078,21 @@
     (fp_line (start -2 -2.5) (end 2 -2.5) (layer F.Fab) (width 0.15))
     (fp_line (start -2 2.5) (end -2 -2.5) (layer F.Fab) (width 0.15))
     (pad 1 smd rect (at -2.5273 -1.905 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 2 smd rect (at -2.5273 -0.635 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 3 smd rect (at -2.5273 0.635 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 4 smd rect (at -2.5273 1.905 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 192 "Net-(Q5-Pad6)"))
+      (net 189 "Net-(Q5-Pad6)"))
     (pad 5 smd rect (at 2.5273 1.905 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 6 smd rect (at 2.5273 0.635 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 7 smd rect (at 2.5273 -0.635 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 8 smd rect (at 2.5273 -1.905 180) (size 1.1938 0.5588) (layers F.Cu F.Paste F.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (model eec.models/Vishay_-_SI4425DDY-T1-GE3.step
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10898,23 +11124,23 @@
     (fp_circle (center -3.79 2.035) (end -3.69 2.035) (layer F.SilkS) (width 0.1524))
     (fp_circle (center -3.79 2.035) (end -3.69 2.035) (layer F.Fab) (width 0.15))
     (pad 04 smd rect (at -1.27 -2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 45 /MCU/CPU_SWCLK))
+      (net 44 /MCU/CPU_SWCLK))
     (pad 03 smd rect (at -1.27 2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 02 smd rect (at -2.54 -2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 46 /MCU/CPU_SWDIO))
+      (net 45 /MCU/CPU_SWDIO))
     (pad 01 smd rect (at -2.54 2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 10 smd rect (at 2.54 -2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 310 "Net-(J7-Pad10)"))
+      (net 304 "Net-(J7-Pad10)"))
     (pad 09 smd rect (at 2.54 2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 309 "Net-(J7-Pad09)"))
+      (net 303 "Net-(J7-Pad09)"))
     (pad 08 smd rect (at 1.27 -2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 308 "Net-(J7-Pad08)"))
+      (net 302 "Net-(J7-Pad08)"))
     (pad 07 smd rect (at 1.27 2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 307 "Net-(J7-Pad07)"))
+      (net 301 "Net-(J7-Pad07)"))
     (pad 06 smd rect (at 0 -2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
-      (net 306 "Net-(J7-Pad06)"))
+      (net 300 "Net-(J7-Pad06)"))
     (pad 05 smd rect (at 0 2.035) (size 0.74 2.79) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (model ${KIPRJMOD}/libs/FTSH_Connector/FTSH-105-XX-X-DV.step
@@ -10952,7 +11178,7 @@
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -10986,7 +11212,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 9 /CurrentSenser/12V_CURRENT))
+      (net 443 /PowerOutputs/12V_CURRENT))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -11022,7 +11248,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 78 /CurrentSenser/+3V3A))
+      (net 442 /PowerOutputs/+3V3A))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -11058,9 +11284,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 285 "Net-(C90-Pad1)"))
+      (net 281 "Net-(C90-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 284 "Net-(C90-Pad2)"))
+      (net 280 "Net-(C90-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11095,15 +11321,15 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 5 smd rect (at 1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 4 smd rect (at 1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 395 "Net-(U11-Pad4)"))
+      (net 389 "Net-(U11-Pad4)"))
     (pad 3 smd rect (at -1.1 0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd rect (at -1.1 0 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 1 smd rect (at -1.1 -0.95 90) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-5.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11140,11 +11366,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd rect (at 3.15 0 90) (size 2 3.8) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 2 smd rect (at -3.15 0 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 3 smd rect (at -3.15 2.3 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 1 smd rect (at -3.15 -2.3 90) (size 2 1.5) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-223.wrl
@@ -11183,15 +11409,15 @@
     (pad 1 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 263 "Net-(C44-Pad1)"))
+      (net 259 "Net-(C44-Pad1)"))
     (pad 3 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 4 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 292 "Net-(R94-Pad1)"))
+      (net 288 "Net-(R94-Pad1)"))
     (pad 6 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 16 "Net-(C44-Pad2)"))
+      (net 15 "Net-(C44-Pad2)"))
     (pad 5 smd rect (at 1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23-6.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11228,21 +11454,21 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -2.475 -1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 135 /SPI_CS))
+      (net 132 /SPI_CS))
     (pad 2 smd roundrect (at -2.475 -0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 179 /SPI_MOSI))
+      (net 176 /SPI_MOSI))
     (pad 3 smd roundrect (at -2.475 0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 4 smd roundrect (at -2.475 1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 5 smd roundrect (at 2.475 1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 180 /SPI_MISO))
+      (net 177 /SPI_MISO))
     (pad 6 smd roundrect (at 2.475 0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 182 /SPI_SCK))
+      (net 179 /SPI_SCK))
     (pad 7 smd roundrect (at 2.475 -0.635 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 8 smd roundrect (at 2.475 -1.905 180) (size 1.95 0.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Package_SO.3dshapes/SOIC-8_3.9x4.9mm_P1.27mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11262,61 +11488,61 @@
     (fp_text value SM13126PEL (at 0 1.5) (layer F.SilkS) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -3.45 -5.4) (end -3.45 6.4) (layer F.Fab) (width 0.15))
-    (fp_line (start -3.45 6.4) (end 3.45 6.4) (layer F.Fab) (width 0.15))
-    (fp_line (start 3.45 6.4) (end 3.45 -6.4) (layer F.Fab) (width 0.15))
-    (fp_line (start 3.45 -6.4) (end -2.45 -6.4) (layer F.Fab) (width 0.15))
-    (fp_line (start -2.45 -6.4) (end -3.45 -5.4) (layer F.Fab) (width 0.15))
-    (fp_line (start -5.2 -5.025) (end -3.6 -5.025) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -3.6 -5.025) (end -3.6 -6.55) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -3.6 -6.55) (end 3.6 -6.55) (layer F.SilkS) (width 0.1524))
-    (fp_line (start 3.6 -6.55) (end 3.6 -5.025) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -3.6 5.025) (end -3.6 6.55) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -3.6 6.55) (end 3.6 6.55) (layer F.SilkS) (width 0.1524))
-    (fp_line (start 3.6 6.55) (end 3.6 5.025) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -5.5 -5.1) (end -5.5 5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.7 -5.1) (end -5.5 -5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.7 -5.1) (end -3.7 -6.65) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.7 -6.65) (end 3.7 -6.65) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -5.5 5.1) (end -3.7 5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.7 5.1) (end -3.7 6.65) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.7 6.65) (end 3.7 6.65) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.7 6.65) (end 3.7 5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.7 5.1) (end 5.5 5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 5.5 5.1) (end 5.5 -5.1) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 5.5 -5.1) (end 3.7 -5.1) (layer F.CrtYd) (width 0.05))
     (fp_line (start 3.7 -5.1) (end 3.7 -6.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 5.5 -5.1) (end 3.7 -5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 5.5 5.1) (end 5.5 -5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.7 5.1) (end 5.5 5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.7 6.65) (end 3.7 5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.7 6.65) (end 3.7 6.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.7 5.1) (end -3.7 6.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.5 5.1) (end -3.7 5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.7 -6.65) (end 3.7 -6.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.7 -5.1) (end -3.7 -6.65) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -3.7 -5.1) (end -5.5 -5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.5 -5.1) (end -5.5 5.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 3.6 6.55) (end 3.6 5.025) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -3.6 6.55) (end 3.6 6.55) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -3.6 5.025) (end -3.6 6.55) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 3.6 -6.55) (end 3.6 -5.025) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -3.6 -6.55) (end 3.6 -6.55) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -3.6 -5.025) (end -3.6 -6.55) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -5.2 -5.025) (end -3.6 -5.025) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -2.45 -6.4) (end -3.45 -5.4) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.45 -6.4) (end -2.45 -6.4) (layer F.Fab) (width 0.15))
+    (fp_line (start 3.45 6.4) (end 3.45 -6.4) (layer F.Fab) (width 0.15))
+    (fp_line (start -3.45 6.4) (end 3.45 6.4) (layer F.Fab) (width 0.15))
+    (fp_line (start -3.45 -5.4) (end -3.45 6.4) (layer F.Fab) (width 0.15))
     (fp_text user %R (at 0 0) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 12 smd rect (at 4.4 0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
-    (pad 16 smd rect (at 4.4 -4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 295 "Net-(R113-Pad1)"))
-    (pad 13 smd rect (at 4.4 -0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
-    (pad 10 smd rect (at 4.4 3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 278 "Net-(C73-Pad1)"))
-    (pad 15 smd rect (at 4.4 -3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 277 "Net-(C72-Pad1)"))
-    (pad 9 smd rect (at 4.4 4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 276 "Net-(C71-Pad1)"))
-    (pad 11 smd rect (at 4.4 1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 273 "Net-(C70-Pad2)"))
-    (pad 14 smd rect (at 4.4 -1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 296 "Net-(R114-Pad2)"))
-    (pad 8 smd rect (at -4.4 4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 199 "Net-(J6-Pad6)"))
-    (pad 6 smd rect (at -4.4 1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 201 "Net-(J6-Pad3)"))
-    (pad 5 smd rect (at -4.4 0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
-    (pad 7 smd rect (at -4.4 3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 279 "Net-(C74-Pad1)"))
-    (pad 4 smd rect (at -4.4 -0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
-    (pad 3 smd rect (at -4.4 -1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 200 "Net-(J6-Pad2)"))
-    (pad 2 smd rect (at -4.4 -3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 441 "Net-(C99-Pad1)"))
     (pad 1 smd rect (at -4.4 -4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
-      (net 202 "Net-(J6-Pad1)"))
+      (net 199 "Net-(J6-Pad1)"))
+    (pad 2 smd rect (at -4.4 -3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 433 "Net-(C99-Pad1)"))
+    (pad 3 smd rect (at -4.4 -1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 197 "Net-(J6-Pad2)"))
+    (pad 4 smd rect (at -4.4 -0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
+    (pad 7 smd rect (at -4.4 3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 275 "Net-(C74-Pad1)"))
+    (pad 5 smd rect (at -4.4 0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
+    (pad 6 smd rect (at -4.4 1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 198 "Net-(J6-Pad3)"))
+    (pad 8 smd rect (at -4.4 4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 196 "Net-(J6-Pad6)"))
+    (pad 14 smd rect (at 4.4 -1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 292 "Net-(R114-Pad2)"))
+    (pad 11 smd rect (at 4.4 1.905) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 269 "Net-(C70-Pad2)"))
+    (pad 9 smd rect (at 4.4 4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 272 "Net-(C71-Pad1)"))
+    (pad 15 smd rect (at 4.4 -3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 273 "Net-(C72-Pad1)"))
+    (pad 10 smd rect (at 4.4 3.175) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 274 "Net-(C73-Pad1)"))
+    (pad 13 smd rect (at 4.4 -0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
+    (pad 16 smd rect (at 4.4 -4.445) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask)
+      (net 291 "Net-(R113-Pad1)"))
+    (pad 12 smd rect (at 4.4 0.635) (size 1.7 0.76) (layers F.Cu F.Paste F.Mask))
     (model ${KISYS3DMOD}/Transformer_SMD.3dshapes/Transformer_Ethernet_Bourns_PT61017PEL.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11395,9 +11621,9 @@
     (pad 1 smd rect (at 3.1 -1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -3.1 1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 203 "Net-(SW3-Pad2)"))
+      (net 200 "Net-(SW3-Pad2)"))
     (pad 2 smd rect (at 3.1 1.85 90) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 203 "Net-(SW3-Pad2)"))
+      (net 200 "Net-(SW3-Pad2)"))
     (model ${KISYS3DMOD}/Button_Switch_SMD.3dshapes/SW_SPST_SKQG_WithoutStem.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11472,9 +11698,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (pad 1 smd rect (at 3.1 -1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (pad 2 smd rect (at -3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at 3.1 1.85) (size 1.8 1.1) (layers F.Cu F.Paste F.Mask)
@@ -11514,7 +11740,7 @@
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 188 "Net-(D21-Pad1)"))
+      (net 185 "Net-(D21-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11548,7 +11774,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 297 "Net-(R124-Pad1)"))
+      (net 293 "Net-(R124-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -11584,9 +11810,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 72 /MCU/CPU_RESET))
+      (net 70 /MCU/CPU_RESET))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11620,9 +11846,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11656,9 +11882,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 77 /Ethernet/RJ45_LED_Y))
+      (net 75 /Ethernet/RJ45_LED_Y))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 198 "Net-(J6-Pad10)"))
+      (net 195 "Net-(J6-Pad10)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11692,9 +11918,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 76 /Ethernet/RJ45_LED_G))
+      (net 74 /Ethernet/RJ45_LED_G))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 197 "Net-(J6-Pad12)"))
+      (net 194 "Net-(J6-Pad12)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11730,7 +11956,7 @@
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 440 "Net-(C99-Pad2)"))
+      (net 432 "Net-(C99-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11766,7 +11992,7 @@
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 439 "Net-(C74-Pad2)"))
+      (net 431 "Net-(C74-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11800,9 +12026,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 277 "Net-(C72-Pad1)"))
+      (net 273 "Net-(C72-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11836,9 +12062,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 278 "Net-(C73-Pad1)"))
+      (net 274 "Net-(C73-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 275 "Net-(C71-Pad2)"))
+      (net 271 "Net-(C71-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11872,9 +12098,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 274 "Net-(C70-Pad1)"))
+      (net 270 "Net-(C70-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 278 "Net-(C73-Pad1)"))
+      (net 274 "Net-(C73-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11908,9 +12134,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 296 "Net-(R114-Pad2)"))
+      (net 292 "Net-(R114-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11944,9 +12170,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 295 "Net-(R113-Pad1)"))
+      (net 291 "Net-(R113-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -11980,9 +12206,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 136 /ENC_INT))
+      (net 133 /ENC_INT))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12016,7 +12242,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 294 "Net-(R111-Pad1)"))
+      (net 290 "Net-(R111-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -12052,7 +12278,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 192 "Net-(Q5-Pad6)"))
+      (net 189 "Net-(Q5-Pad6)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -12088,9 +12314,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 73 "Net-(Q7-Pad1)"))
+      (net 71 "Net-(Q7-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12124,9 +12350,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 193 "Net-(Q5-Pad2)"))
+      (net 190 "Net-(Q5-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 194 "Net-(Q5-Pad3)"))
+      (net 191 "Net-(Q5-Pad3)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12160,9 +12386,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 23 "Net-(D11-Pad2)"))
+      (net 22 "Net-(D11-Pad2)"))
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12196,9 +12422,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 191 "Net-(Q4-Pad1)"))
+      (net 188 "Net-(Q4-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12232,9 +12458,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 22 "Net-(D10-Pad2)"))
+      (net 21 "Net-(D10-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12268,7 +12494,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 194 "Net-(Q5-Pad3)"))
+      (net 191 "Net-(Q5-Pad3)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -12304,9 +12530,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 21 "Net-(D9-Pad2)"))
+      (net 20 "Net-(D9-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12340,9 +12566,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 185 "Net-(D8-Pad2)"))
+      (net 182 "Net-(D8-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 14 +5V))
+      (net 13 +5V))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12376,7 +12602,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 75 /MCU/CPU_POE_SRC_STATUS))
+      (net 73 /MCU/CPU_POE_SRC_STATUS))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
@@ -12412,9 +12638,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 75 /MCU/CPU_POE_SRC_STATUS))
+      (net 73 /MCU/CPU_POE_SRC_STATUS))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12448,9 +12674,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 286 "Net-(D7-Pad2)"))
+      (net 282 "Net-(D7-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 10 +12V))
+      (net 9 +12V))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12484,9 +12710,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 267 "Net-(C50-Pad2)"))
+      (net 263 "Net-(C50-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 293 "Net-(R98-Pad2)"))
+      (net 289 "Net-(R98-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12522,7 +12748,7 @@
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 292 "Net-(R94-Pad1)"))
+      (net 288 "Net-(R94-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12556,9 +12782,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 292 "Net-(R94-Pad1)"))
+      (net 288 "Net-(R94-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 266 "Net-(C47-Pad1)"))
+      (net 262 "Net-(C47-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12592,9 +12818,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 264 "Net-(C45-Pad2)"))
+      (net 260 "Net-(C45-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12628,9 +12854,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 264 "Net-(C45-Pad2)"))
+      (net 260 "Net-(C45-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12664,9 +12890,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 264 "Net-(C45-Pad2)"))
+      (net 260 "Net-(C45-Pad2)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12700,9 +12926,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 190 "Net-(Q3-Pad1)"))
+      (net 187 "Net-(Q3-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12736,9 +12962,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 291 "Net-(R89-Pad1)"))
+      (net 287 "Net-(R89-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12772,9 +12998,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 74 /MCU/CPU_POE_AT_EVENT))
+      (net 72 /MCU/CPU_POE_AT_EVENT))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12808,9 +13034,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 291 "Net-(R89-Pad1)"))
+      (net 287 "Net-(R89-Pad1)"))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12844,9 +13070,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 290 "Net-(R87-Pad2)"))
+      (net 286 "Net-(R87-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12882,7 +13108,7 @@
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 189 "Net-(D22-Pad1)"))
+      (net 186 "Net-(D22-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12918,7 +13144,7 @@
     (pad 1 smd roundrect (at -2.3125 0 180) (size 1.225 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2040808163265306)
       (net 8 +12V_OUT))
     (pad 2 smd roundrect (at 2.3125 0 180) (size 1.225 2.65) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.2040808163265306)
-      (net 195 "Net-(D22-Pad2)"))
+      (net 192 "Net-(D22-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_2010_5025Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12952,9 +13178,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 135 /SPI_CS))
+      (net 132 /SPI_CS))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -12988,9 +13214,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 134 /CRESET))
+      (net 131 /CRESET))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13024,9 +13250,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0 90) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 133 /CDONE))
+      (net 130 /CDONE))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13062,7 +13288,7 @@
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 7 /FPGA/VCCPLL1))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13098,7 +13324,7 @@
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 5 /FPGA/VCCPLL0))
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13132,9 +13358,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.51 0) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 19 "Net-(D4-Pad2)"))
+      (net 18 "Net-(D4-Pad2)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13168,9 +13394,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 252 /FPGA/FPGA_LED))
+      (net 249 /FPGA/FPGA_LED))
     (pad 2 smd roundrect (at 0.51 0 270) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 70 "Net-(Q1-Pad1)"))
+      (net 68 "Net-(Q1-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13204,9 +13430,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 289 "Net-(R5-Pad2)"))
+      (net 285 "Net-(R5-Pad2)"))
     (pad 1 smd roundrect (at -0.51 0 180) (size 0.54 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 260 "Net-(C4-Pad1)"))
+      (net 256 "Net-(C4-Pad1)"))
     (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13243,11 +13469,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 187 "Net-(D11-Pad1)"))
+      (net 184 "Net-(D11-Pad1)"))
     (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 73 "Net-(Q7-Pad1)"))
+      (net 71 "Net-(Q7-Pad1)"))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13284,11 +13510,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 186 "Net-(D10-Pad1)"))
+      (net 183 "Net-(D10-Pad1)"))
     (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 191 "Net-(Q4-Pad1)"))
+      (net 188 "Net-(Q4-Pad1)"))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13323,17 +13549,17 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -0.95 -0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 10 +12V))
+      (net 9 +12V))
     (pad 3 smd rect (at -0.95 0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 194 "Net-(Q5-Pad3)"))
+      (net 191 "Net-(Q5-Pad3)"))
     (pad 5 smd rect (at 0.95 0 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 194 "Net-(Q5-Pad3)"))
+      (net 191 "Net-(Q5-Pad3)"))
     (pad 2 smd rect (at -0.95 0 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 193 "Net-(Q5-Pad2)"))
+      (net 190 "Net-(Q5-Pad2)"))
     (pad 4 smd rect (at 0.95 0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 269 "Net-(C57-Pad1)"))
+      (net 265 "Net-(C57-Pad1)"))
     (pad 6 smd rect (at 0.95 -0.65 90) (size 0.65 0.4) (layers F.Cu F.Paste F.Mask)
-      (net 192 "Net-(Q5-Pad6)"))
+      (net 189 "Net-(Q5-Pad6)"))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-363_SC-70-6.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13369,11 +13595,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1.1 -0.95 90) (size 1.4 1) (layers F.Cu F.Paste F.Mask)
-      (net 190 "Net-(Q3-Pad1)"))
+      (net 187 "Net-(Q3-Pad1)"))
     (pad 2 smd rect (at -1.1 0.95 90) (size 1.4 1) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (pad 3 smd rect (at 1.1 0 90) (size 1.4 1) (layers F.Cu F.Paste F.Mask)
-      (net 264 "Net-(C45-Pad2)"))
+      (net 260 "Net-(C45-Pad2)"))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SuperSOT-3.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13410,11 +13636,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 3 smd rect (at 1 0 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 71 "Net-(Q2-Pad3)"))
+      (net 69 "Net-(Q2-Pad3)"))
     (pad 2 smd rect (at -1 0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 1 smd rect (at -1 -0.95 90) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 72 /MCU/CPU_RESET))
+      (net 70 /MCU/CPU_RESET))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13451,11 +13677,11 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -1 -0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 70 "Net-(Q1-Pad1)"))
+      (net 68 "Net-(Q1-Pad1)"))
     (pad 2 smd rect (at -1 0.95 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 3 smd rect (at 1 0 180) (size 0.9 0.8) (layers F.Cu F.Paste F.Mask)
-      (net 20 "Net-(D4-Pad1)"))
+      (net 19 "Net-(D4-Pad1)"))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-23.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13474,57 +13700,57 @@
     (fp_text value RJ45_LED_Shielded_RJHSE538A (at 3.56 9.5 90) (layer F.SilkS) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (fp_line (start -4.695 -7) (end -4.695 7.75) (layer F.Fab) (width 0.15))
-    (fp_line (start -4.695 7.75) (end 11.815 7.75) (layer F.Fab) (width 0.15))
-    (fp_line (start -3.695 -8) (end 11.815 -8) (layer F.Fab) (width 0.15))
-    (fp_line (start 11.815 -8) (end 11.815 7.75) (layer F.Fab) (width 0.15))
-    (fp_line (start -4.805 -8.11) (end 11.925 -8.11) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -4.805 -8.11) (end -4.805 -0.5) (layer F.SilkS) (width 0.1524))
-    (fp_line (start 11.925 -8.11) (end 11.925 -0.5) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -4.805 7.86) (end 11.925 7.86) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -4.805 7.86) (end -4.805 2.3) (layer F.SilkS) (width 0.1524))
-    (fp_line (start 11.925 7.86) (end 11.925 2.3) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -4.695 -7) (end -3.695 -8) (layer F.Fab) (width 0.15))
-    (fp_line (start -6.22 -8.5) (end 13.34 -8.5) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -6.22 -8.5) (end -6.22 8.25) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -6.22 8.25) (end 13.34 8.25) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 13.34 -8.5) (end 13.34 8.25) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -5 -0.7) (end -5.5 -0.2) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -5.5 -0.2) (end -5.5 -1.2) (layer F.SilkS) (width 0.1524))
     (fp_line (start -5.5 -1.2) (end -5 -0.7) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -5.5 -0.2) (end -5.5 -1.2) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -5 -0.7) (end -5.5 -0.2) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 13.34 -8.5) (end 13.34 8.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -6.22 8.25) (end 13.34 8.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -6.22 -8.5) (end -6.22 8.25) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -6.22 -8.5) (end 13.34 -8.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.695 -7) (end -3.695 -8) (layer F.Fab) (width 0.15))
+    (fp_line (start 11.925 7.86) (end 11.925 2.3) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -4.805 7.86) (end -4.805 2.3) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -4.805 7.86) (end 11.925 7.86) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 11.925 -8.11) (end 11.925 -0.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -4.805 -8.11) (end -4.805 -0.5) (layer F.SilkS) (width 0.1524))
+    (fp_line (start -4.805 -8.11) (end 11.925 -8.11) (layer F.SilkS) (width 0.1524))
+    (fp_line (start 11.815 -8) (end 11.815 7.75) (layer F.Fab) (width 0.15))
+    (fp_line (start -3.695 -8) (end 11.815 -8) (layer F.Fab) (width 0.15))
+    (fp_line (start -4.695 7.75) (end 11.815 7.75) (layer F.Fab) (width 0.15))
+    (fp_line (start -4.695 -7) (end -4.695 7.75) (layer F.Fab) (width 0.15))
     (fp_text user %R (at 3.56 -6 90) (layer F.Fab) hide
       (effects (font (size 1 1) (thickness 0.15)))
     )
-    (pad 12 thru_hole circle (at 10.42 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 197 "Net-(J6-Pad12)"))
-    (pad 11 thru_hole circle (at 8.13 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 1 GND))
-    (pad 10 thru_hole circle (at -1.01 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 198 "Net-(J6-Pad10)"))
-    (pad 9 thru_hole circle (at -3.3 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+    (pad 1 thru_hole rect (at 0 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 199 "Net-(J6-Pad1)"))
+    (pad 3 thru_hole circle (at 2.032 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 198 "Net-(J6-Pad3)"))
+    (pad 5 thru_hole circle (at 4.064 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 25 "Net-(D17-Pad2)"))
+    (pad 7 thru_hole circle (at 6.096 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 26 "Net-(D19-Pad2)"))
+    (pad 2 thru_hole circle (at 1.016 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 197 "Net-(J6-Pad2)"))
+    (pad 4 thru_hole circle (at 3.048 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 25 "Net-(D17-Pad2)"))
+    (pad 6 thru_hole circle (at 5.08 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 196 "Net-(J6-Pad6)"))
+    (pad 8 thru_hole circle (at 7.112 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 26 "Net-(D19-Pad2)"))
+    (pad "" np_thru_hole circle (at -2.79 -2.54 90) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask))
+    (pad "" np_thru_hole circle (at 9.91 -2.54 90) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask))
+    (pad SH thru_hole circle (at 11.69 0.89 90) (size 2.3 2.3) (drill 1.57) (layers *.Cu *.Mask)
       (net 1 GND))
     (pad SH thru_hole circle (at -4.57 0.89 90) (size 2.3 2.3) (drill 1.57) (layers *.Cu *.Mask)
       (net 1 GND))
-    (pad SH thru_hole circle (at 11.69 0.89 90) (size 2.3 2.3) (drill 1.57) (layers *.Cu *.Mask)
+    (pad 9 thru_hole circle (at -3.3 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
       (net 1 GND))
-    (pad "" np_thru_hole circle (at 9.91 -2.54 90) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask))
-    (pad "" np_thru_hole circle (at -2.79 -2.54 90) (size 3.25 3.25) (drill 3.25) (layers *.Cu *.Mask))
-    (pad 8 thru_hole circle (at 7.112 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 27 "Net-(D19-Pad2)"))
-    (pad 6 thru_hole circle (at 5.08 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 199 "Net-(J6-Pad6)"))
-    (pad 4 thru_hole circle (at 3.048 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 26 "Net-(D17-Pad2)"))
-    (pad 2 thru_hole circle (at 1.016 1.78 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 200 "Net-(J6-Pad2)"))
-    (pad 7 thru_hole circle (at 6.096 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 27 "Net-(D19-Pad2)"))
-    (pad 5 thru_hole circle (at 4.064 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 26 "Net-(D17-Pad2)"))
-    (pad 3 thru_hole circle (at 2.032 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 201 "Net-(J6-Pad3)"))
-    (pad 1 thru_hole rect (at 0 0 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
-      (net 202 "Net-(J6-Pad1)"))
+    (pad 10 thru_hole circle (at -1.01 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 195 "Net-(J6-Pad10)"))
+    (pad 11 thru_hole circle (at 8.13 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 1 GND))
+    (pad 12 thru_hole circle (at 10.42 6.6 90) (size 1.5 1.5) (drill 0.89) (layers *.Cu *.Mask)
+      (net 194 "Net-(J6-Pad12)"))
     (model ${KISYS3DMOD}/Connector_RJ.3dshapes/RJ45_Amphenol_RJHSE538X.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13564,13 +13790,13 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -3.75 -1.27 180) (size 2 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 265 "Net-(C45-Pad1)"))
+      (net 261 "Net-(C45-Pad1)"))
     (pad 2 smd rect (at -3.75 1.27 180) (size 2 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 264 "Net-(C45-Pad2)"))
+      (net 260 "Net-(C45-Pad2)"))
     (pad 3 smd rect (at 3.75 1.27 180) (size 2 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 268 "Net-(C51-Pad1)"))
+      (net 264 "Net-(C51-Pad1)"))
     (pad 4 smd rect (at 3.75 -1.27 180) (size 2 1.2) (layers F.Cu F.Paste F.Mask)
-      (net 267 "Net-(C50-Pad2)"))
+      (net 263 "Net-(C50-Pad2)"))
     (model ${KISYS3DMOD}/Filter.3dshapes/Filter_Bourns_SRF0905_6.0x9.2mm.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13606,9 +13832,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 188 "Net-(D21-Pad1)"))
+      (net 185 "Net-(D21-Pad1)"))
     (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 28 "Net-(D21-Pad2)"))
+      (net 27 "Net-(D21-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13649,9 +13875,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 27 "Net-(D19-Pad2)"))
+      (net 26 "Net-(D19-Pad2)"))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13692,9 +13918,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 27 "Net-(D19-Pad2)"))
+      (net 26 "Net-(D19-Pad2)"))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13735,9 +13961,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 26 "Net-(D17-Pad2)"))
+      (net 25 "Net-(D17-Pad2)"))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13778,9 +14004,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 26 "Net-(D17-Pad2)"))
+      (net 25 "Net-(D17-Pad2)"))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13821,9 +14047,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 279 "Net-(C74-Pad1)"))
+      (net 275 "Net-(C74-Pad1)"))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13864,9 +14090,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 279 "Net-(C74-Pad1)"))
+      (net 275 "Net-(C74-Pad1)"))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13907,9 +14133,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 441 "Net-(C99-Pad1)"))
+      (net 433 "Net-(C99-Pad1)"))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13950,9 +14176,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 2 0 270) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 441 "Net-(C99-Pad1)"))
+      (net 433 "Net-(C99-Pad1)"))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -13993,9 +14219,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd rect (at -2.15 0 270) (size 2.5 2.3) (layers F.Cu F.Paste F.Mask)
-      (net 25 /Ethernet/POE_VC+))
+      (net 24 /Ethernet/POE_VC+))
     (pad 2 smd rect (at 2.15 0 270) (size 2.5 2.3) (layers F.Cu F.Paste F.Mask)
-      (net 24 /Ethernet/POE_VC-))
+      (net 23 /Ethernet/POE_VC-))
     (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMB.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14031,9 +14257,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 187 "Net-(D11-Pad1)"))
+      (net 184 "Net-(D11-Pad1)"))
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 23 "Net-(D11-Pad2)"))
+      (net 22 "Net-(D11-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14069,9 +14295,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 186 "Net-(D10-Pad1)"))
+      (net 183 "Net-(D10-Pad1)"))
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 22 "Net-(D10-Pad2)"))
+      (net 21 "Net-(D10-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14109,7 +14335,7 @@
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 21 "Net-(D9-Pad2)"))
+      (net 20 "Net-(D9-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14147,7 +14373,7 @@
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 185 "Net-(D8-Pad2)"))
+      (net 182 "Net-(D8-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14185,7 +14411,7 @@
     (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 286 "Net-(D7-Pad2)"))
+      (net 282 "Net-(D7-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14193,49 +14419,6 @@
     )
   )
 
-  (module Diode_SMD:D_SMA (layer F.Cu) (tedit 586432E5) (tstamp 60D13F16)
-    (at 192.92 130.73 180)
-    (descr "Diode SMA (DO-214AC)")
-    (tags "Diode SMA (DO-214AC)")
-    (path /60C2FE2A/61905BD3)
-    (attr smd)
-    (fp_text reference D5 (at -0.04 -2.63) (layer F.SilkS)
-      (effects (font (size 1.016 1.016) (thickness 0.1524)))
-    )
-    (fp_text value SS16 (at 0 2.6) (layer F.SilkS) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_line (start -3.4 -1.65) (end 2 -1.65) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -3.4 1.65) (end 2 1.65) (layer F.SilkS) (width 0.1524))
-    (fp_line (start -0.64944 0.00102) (end 0.50118 -0.79908) (layer F.Fab) (width 0.15))
-    (fp_line (start -0.64944 0.00102) (end 0.50118 0.75032) (layer F.Fab) (width 0.15))
-    (fp_line (start 0.50118 0.75032) (end 0.50118 -0.79908) (layer F.Fab) (width 0.15))
-    (fp_line (start -0.64944 -0.79908) (end -0.64944 0.80112) (layer F.Fab) (width 0.15))
-    (fp_line (start 0.50118 0.00102) (end 1.4994 0.00102) (layer F.Fab) (width 0.15))
-    (fp_line (start -0.64944 0.00102) (end -1.55114 0.00102) (layer F.Fab) (width 0.15))
-    (fp_line (start -3.5 1.75) (end -3.5 -1.75) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.5 1.75) (end -3.5 1.75) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 3.5 -1.75) (end 3.5 1.75) (layer F.CrtYd) (width 0.05))
-    (fp_line (start -3.5 -1.75) (end 3.5 -1.75) (layer F.CrtYd) (width 0.05))
-    (fp_line (start 2.3 -1.5) (end -2.3 -1.5) (layer F.Fab) (width 0.15))
-    (fp_line (start 2.3 -1.5) (end 2.3 1.5) (layer F.Fab) (width 0.15))
-    (fp_line (start -2.3 1.5) (end -2.3 -1.5) (layer F.Fab) (width 0.15))
-    (fp_line (start 2.3 1.5) (end -2.3 1.5) (layer F.Fab) (width 0.15))
-    (fp_line (start -3.4 -1.65) (end -3.4 1.65) (layer F.SilkS) (width 0.1524))
-    (fp_text user %R (at 0 -2.5) (layer F.Fab) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad 1 smd rect (at -2 0 180) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 304 "Net-(D5-Pad1)"))
-    (pad 2 smd rect (at 2 0 180) (size 2.5 1.8) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
-    (model ${KISYS3DMOD}/Diode_SMD.3dshapes/D_SMA.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 1 1 1))
-      (rotate (xyz 0 0 0))
-    )
-  )
-
   (module LED_SMD:LED_0603_1608Metric (layer F.Cu) (tedit 5F68FEF1) (tstamp 60D13EFE)
     (at 135.2385 66.219 180)
     (descr "LED SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator")
@@ -14264,9 +14447,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 189 "Net-(D22-Pad1)"))
+      (net 186 "Net-(D22-Pad1)"))
     (pad 2 smd roundrect (at 0.7875 0 180) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 195 "Net-(D22-Pad2)"))
+      (net 192 "Net-(D22-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14302,9 +14485,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 20 "Net-(D4-Pad1)"))
+      (net 19 "Net-(D4-Pad1)"))
     (pad 2 smd roundrect (at 0.7875 0 90) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 19 "Net-(D4-Pad2)"))
+      (net 18 "Net-(D4-Pad2)"))
     (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14341,11 +14524,11 @@
     (pad 1 smd rect (at -1.1 -0.77) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 84 /EEM2_IIC_SDA))
+      (net 81 /EEM2_IIC_SDA))
     (pad 3 smd rect (at 1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 83 /EEM2_IIC_SCL))
+      (net 80 /EEM2_IIC_SCL))
     (pad 4 smd rect (at 1.1 -0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-143.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14382,11 +14565,11 @@
     (pad 1 smd rect (at -1.1 -0.77) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 82 /EEM1_IIC_SDA))
+      (net 79 /EEM1_IIC_SDA))
     (pad 3 smd rect (at 1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 81 /EEM1_IIC_SCL))
+      (net 78 /EEM1_IIC_SCL))
     (pad 4 smd rect (at 1.1 -0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-143.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14423,11 +14606,11 @@
     (pad 1 smd rect (at -1.1 -0.77) (size 1.2 1.4) (layers F.Cu F.Paste F.Mask)
       (net 1 GND))
     (pad 2 smd rect (at -1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 80 /EEM0_IIC_SDA))
+      (net 77 /EEM0_IIC_SDA))
     (pad 3 smd rect (at 1.1 0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 79 /EEM0_IIC_SCL))
+      (net 76 /EEM0_IIC_SCL))
     (pad 4 smd rect (at 1.1 -0.95) (size 1 1.4) (layers F.Cu F.Paste F.Mask)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/SOT-143.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14461,7 +14644,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 17 /MCU/+3V3A))
+      (net 16 /MCU/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14499,7 +14682,7 @@
     (pad 1 smd roundrect (at -0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0 90) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 282 "Net-(C77-Pad2)"))
+      (net 278 "Net-(C77-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14533,7 +14716,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 281 "Net-(C76-Pad1)"))
+      (net 277 "Net-(C76-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14569,7 +14752,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 278 "Net-(C73-Pad1)"))
+      (net 274 "Net-(C73-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14605,7 +14788,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 277 "Net-(C72-Pad1)"))
+      (net 273 "Net-(C72-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14641,9 +14824,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 276 "Net-(C71-Pad1)"))
+      (net 272 "Net-(C71-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 275 "Net-(C71-Pad2)"))
+      (net 271 "Net-(C71-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14677,9 +14860,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 274 "Net-(C70-Pad1)"))
+      (net 270 "Net-(C70-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 273 "Net-(C70-Pad2)"))
+      (net 269 "Net-(C70-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14715,7 +14898,7 @@
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 272 "Net-(C67-Pad2)"))
+      (net 268 "Net-(C67-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14749,7 +14932,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 15 /Ethernet/+3V3A))
+      (net 14 /Ethernet/+3V3A))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14787,7 +14970,7 @@
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 271 "Net-(C60-Pad1)"))
+      (net 267 "Net-(C60-Pad1)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14823,7 +15006,7 @@
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 270 "Net-(C59-Pad1)"))
+      (net 266 "Net-(C59-Pad1)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -14857,7 +15040,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 14 +5V))
+      (net 13 +5V))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14893,7 +15076,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 14 +5V))
+      (net 13 +5V))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14929,7 +15112,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -14965,7 +15148,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 13 +1V2))
+      (net 12 +1V2))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15001,7 +15184,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15037,7 +15220,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 12 +2V5))
+      (net 11 +2V5))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15073,9 +15256,9 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 263 "Net-(C44-Pad1)"))
+      (net 259 "Net-(C44-Pad1)"))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 16 "Net-(C44-Pad2)"))
+      (net 15 "Net-(C44-Pad2)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -15109,7 +15292,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15145,7 +15328,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 11 +3V3))
+      (net 10 +3V3))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15181,7 +15364,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 257 +6V))
+      (net 254 +6V))
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15361,7 +15544,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 262 "Net-(C8-Pad2)"))
+      (net 258 "Net-(C8-Pad2)"))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15397,7 +15580,7 @@
       (effects (font (size 1 1) (thickness 0.15)))
     )
     (pad 2 smd roundrect (at 0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 184 "Net-(C7-Pad2)"))
+      (net 181 "Net-(C7-Pad2)"))
     (pad 1 smd roundrect (at -0.48 0) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
@@ -15435,7 +15618,7 @@
     (pad 2 smd roundrect (at 0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
       (net 1 GND))
     (pad 1 smd roundrect (at -0.48 0 180) (size 0.56 0.62) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
-      (net 260 "Net-(C4-Pad1)"))
+      (net 256 "Net-(C4-Pad1)"))
     (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl
       (at (xyz 0 0 0))
       (scale (xyz 1 1 1))
@@ -15449,7 +15632,7 @@
   (gr_text "Syrostan V1.1" (at 113.6919 112.71) (layer B.SilkS) (tstamp 60EE34F3)
     (effects (font (size 4 3) (thickness 0.5)) (justify mirror))
   )
-  (gr_text "Syrostan V1.1" (at 164.09 94.86) (layer F.SilkS)
+  (gr_text "Syrostan V2.0" (at 164.09 94.86) (layer F.SilkS)
     (effects (font (size 1.27 1.27) (thickness 0.2032)))
   )
   (gr_line (start 214 134) (end 214 133) (layer Edge.Cuts) (width 0.05) (tstamp 60D44CEF))
@@ -15469,6 +15652,29 @@
   (gr_line (start 209 138) (end 84 138) (layer Edge.Cuts) (width 0.05))
   (gr_line (start 84 53) (end 209 53) (layer Edge.Cuts) (width 0.05))
 
+  (via (at 192.22 133.02) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 447) (tstamp 620A6901))
+  (via (at 191.31 129.26) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 446) (tstamp 620A6901))
+  (via (at 167.03 112.89) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 446) (tstamp 620A6901))
+  (via (at 192.34 129.49) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209C960))
+  (via (at 198.52 134.41) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209C960))
+  (via (at 194.595 131.5225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 62099376))
+  (via (at 195.495 131.5225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 62099377))
+  (via (at 195.495 130.6225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 62099378))
+  (via (at 196.395 130.6225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 62099379))
+  (via (at 194.595 130.6225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209937A))
+  (via (at 195.495 132.4225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209937B))
+  (via (at 196.395 132.4225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209937C))
+  (via (at 196.395 131.5225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209937D))
+  (via (at 194.595 132.4225) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 6209937E))
+  (via (at 120.355 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE2AC))
+  (via (at 121.255 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54B))
+  (via (at 122.155 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54D))
+  (via (at 120.355 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54F))
+  (via (at 121.255 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE551))
+  (via (at 122.155 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE553))
+  (via (at 120.355 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE555))
+  (via (at 121.255 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE557))
+  (via (at 122.155 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE559))
   (via (at 184.392 86.449) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 1) (tstamp 60DB51DD))
   (segment (start 210.3 71.2) (end 210.3 67.7) (width 0.508) (layer F.Cu) (net 1) (tstamp 60DAE7A2))
   (segment (start 207.944 75.187) (end 209.613 75.187) (width 0.508) (layer F.Cu) (net 1) (tstamp 60DAE7A6))
@@ -15973,7 +16179,7 @@
   (segment (start 165.14 66.96) (end 165.11 66.99) (width 0.254) (layer F.Cu) (net 1))
   (segment (start 165.11 66.99) (end 165.57 66.99) (width 0.254) (layer F.Cu) (net 1))
   (segment (start 161.72 66.99) (end 165.11 66.99) (width 0.254) (layer F.Cu) (net 1))
-  (via (at 197.38 127.95) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
+  (via (at 200.79 127.93) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
   (via (at 195.98 109.4) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
   (via (at 187.28 62.42) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
   (via (at 187.25 65.13) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
@@ -15993,15 +16199,6 @@
   (segment (start 178.78 84.85) (end 179.156401 85.226401) (width 0.127) (layer B.Cu) (net 1))
   (segment (start 177.85 80.84) (end 177.84 80.85) (width 0.254) (layer B.Cu) (net 1))
   (segment (start 179.08 80.84) (end 177.85 80.84) (width 0.254) (layer B.Cu) (net 1))
-  (via (at 120.355 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE2AC))
-  (via (at 121.255 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54B))
-  (via (at 122.155 63.8925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54D))
-  (via (at 120.355 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE54F))
-  (via (at 121.255 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE551))
-  (via (at 122.155 64.7925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE553))
-  (via (at 120.355 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE555))
-  (via (at 121.255 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE557))
-  (via (at 122.155 65.6925) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1) (tstamp 610DE559))
   (via (at 184.53 96.76) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
   (via (at 158.25 96.79) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
   (via (at 154.77 100.6) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 1))
@@ -16252,6 +16449,17 @@
   (segment (start 191.823 120.993) (end 191.823 119.883) (width 0.254) (layer F.Cu) (net 1))
   (segment (start 192.14 121.31) (end 191.823 120.993) (width 0.254) (layer F.Cu) (net 1))
   (segment (start 192.6 121.31) (end 192.14 121.31) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 197.4525 132.515) (end 197.4525 133.3425) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 197.4525 133.3425) (end 199.14 135.03) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 199.14 135.03) (end 200.86 135.03) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 201.1 134.79) (end 201.1 131.13) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 200.86 135.03) (end 201.1 134.79) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 193.5275 130.565) (end 192.775 130.565) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 192.34 130.13) (end 192.34 129.49) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 192.775 130.565) (end 192.34 130.13) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 193.5275 131.215) (end 192.595 131.215) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 192.34 130.96) (end 192.34 130.13) (width 0.254) (layer F.Cu) (net 1))
+  (segment (start 192.595 131.215) (end 192.34 130.96) (width 0.254) (layer F.Cu) (net 1))
   (segment (start 161.5335 70.5135) (end 162.694652 70.5135) (width 0.254) (layer F.Cu) (net 2))
   (segment (start 161.13 70.11) (end 161.5335 70.5135) (width 0.254) (layer F.Cu) (net 2))
   (segment (start 171.63 67.76) (end 162.04 67.76) (width 0.254) (layer F.Cu) (net 2))
@@ -16406,3535 +16614,3612 @@
   (segment (start 195.42 63.35) (end 197.99 60.78) (width 0.508) (layer B.Cu) (net 8))
   (segment (start 197.99 60.78) (end 205.4 60.78) (width 0.508) (layer B.Cu) (net 8))
   (segment (start 211.73 67.11) (end 211.59 66.97) (width 0.508) (layer F.Cu) (net 8))
-  (segment (start 131.157 61.353) (end 131.157 61.97) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 131.157 60.616) (end 131.157 61.353) (width 0.254) (layer F.Cu) (net 9))
-  (via (at 131.76 62.6) (size 0.5) (drill 0.3) (layers F.Cu B.Cu) (net 9))
-  (segment (start 131.16 62) (end 131.76 62.6) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 131.127 62) (end 131.16 62) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 167.026 113.944) (end 166.61 114.36) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 166.61 114.36) (end 160.04 114.36) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 172.273 113.944) (end 167.026 113.944) (width 0.254) (layer F.Cu) (net 9))
-  (segment (start 160.04 114.36) (end 159.45 113.77) (width 0.254) (layer F.Cu) (net 9))
-  (via (at 159.45 113.77) (size 0.45) (drill 0.25) (layers F.Cu B.Cu) (net 9))
-  (segment (start 158.67 113.77) (end 159.45 113.77) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 154.69 117.75) (end 158.67 113.77) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 146.48 117.75) (end 154.69 117.75) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 144.19 115.46) (end 146.48 117.75) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 144.19 75.03) (end 144.19 115.46) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 131.76 62.6) (end 144.19 75.03) (width 0.254) (layer B.Cu) (net 9))
-  (segment (start 87.181 58.674) (end 87.181 58.209) (width 0.508) (layer F.Cu) (net 10))
-  (segment (start 87.181 58.209) (end 87.98 57.41) (width 0.508) (layer F.Cu) (net 10))
-  (segment (start 87.98 57.41) (end 92.58 57.41) (width 0.508) (layer F.Cu) (net 10))
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+Wire Wire Line
+	5250 7700 4000 7700
+Wire Wire Line
+	4000 6550 4000 7700
+Wire Wire Line
+	5250 7800 3950 7800
+Wire Wire Line
+	3950 6450 3950 7800
+Wire Wire Line
+	3750 4300 4350 4300
 Wire Wire Line
 	3750 4200 4350 4200
 Wire Wire Line
-	3750 4300 4350 4300
+	3750 4100 4350 4100
+Wire Wire Line
+	6700 6250 7150 6250
+Wire Wire Line
+	6700 6150 7150 6150
+Wire Wire Line
+	6700 6050 7150 6050
+Wire Wire Line
+	6700 5950 7150 5950
+Wire Wire Line
+	6700 5850 7150 5850
+Wire Wire Line
+	6700 5750 7150 5750
+Wire Wire Line
+	6700 5650 7150 5650
 Wire Bus Line
 	4000 2150 4000 4400
 Wire Bus Line
diff --git a/update_log.txt b/update_log.txt
index f96d1db..14ad3cf 100644
--- a/update_log.txt
+++ b/update_log.txt
@@ -12,6 +12,9 @@ v1.1
  -add external oscillator for FPGA
  -fix CPU_IO headers interferes with Analog headers
  -fix MCU ADC7 and ADC6 label bug
- -change TPS2590 resistor to change current limit (TODO)
  -1.27mm headers use standard pin numbers (2x12, 2x15, 2x17)
  -Connect HSADC clock and FSMC clock to GB pins for better clock performance 
+
+v2.0
+ -Remove 3.3v_MP fuse and add TPS2590 load switch with current control for 3.3v_MP outputs
+ -change TPS2590 resistor to change current limit to 1A for 12v outputs