all: add gitignore; remove redundant files from repo; optimize file name style

This commit is contained in:
Jack-Zheng 2021-06-17 15:46:02 +08:00
parent 6cee2d0419
commit 4123caa996
59 changed files with 15 additions and 101622 deletions

7
.gitignore vendored Normal file
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docs/
*-bak
libs/*.zip
fp-info-cache
fp-lib-table
sym-lib-table
*-cache.lib

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F 3 "http://www.ti.com/lit/ds/symlink/opa847.pdf" H 4350 4050 50 0001 C CNN
1 4350 3850
1 0 0 -1
$EndComp
$Comp
L power:GND #PWR0104
U 1 1 614ABABB
P 5100 4450
F 0 "#PWR0104" H 5100 4200 50 0001 C CNN
F 1 "GND" V 5105 4322 50 0000 R CNN
F 2 "" H 5100 4450 50 0001 C CNN
F 3 "" H 5100 4450 50 0001 C CNN
1 5100 4450
-1 0 0 -1
$EndComp
$Comp
L power:+5VA #PWR0103
U 1 1 6148C30D
P 5850 3650
F 0 "#PWR0103" H 5850 3500 50 0001 C CNN
F 1 "+5VA" H 5865 3823 50 0000 C CNN
F 2 "" H 5850 3650 50 0001 C CNN
F 3 "" H 5850 3650 50 0001 C CNN
1 5850 3650
0 -1 1 0
$EndComp
Wire Wire Line
9100 3550 9050 3550
Wire Wire Line
9100 3450 9100 3550
$Comp
L power:GND #PWR0102
U 1 1 614887E8
P 5650 3750
F 0 "#PWR0102" H 5650 3500 50 0001 C CNN
F 1 "GND" H 5655 3577 50 0000 C CNN
F 2 "" H 5650 3750 50 0001 C CNN
F 3 "" H 5650 3750 50 0001 C CNN
1 5650 3750
0 1 -1 0
$EndComp
$Comp
L power:GND #PWR0101
U 1 1 61488143
P 9100 3450
F 0 "#PWR0101" H 9100 3200 50 0001 C CNN
F 1 "GND" H 9105 3277 50 0000 C CNN
F 2 "" H 9100 3450 50 0001 C CNN
F 3 "" H 9100 3450 50 0001 C CNN
1 9100 3450
1 0 0 1
$EndComp
Wire Wire Line
9300 4350 9050 4350
Wire Wire Line
9300 4250 9050 4250
Wire Wire Line
9300 4150 9050 4150
Wire Wire Line
9300 4050 9050 4050
Wire Wire Line
9300 3950 9050 3950
Wire Wire Line
9300 3850 9050 3850
Wire Wire Line
9300 3750 9050 3750
Wire Wire Line
9050 3650 9300 3650
$Comp
L ADS831:ADS831E_2K5 U7
U 1 1 60FB23DE
P 9050 3550
F 0 "U7" H 10450 3937 60 0000 C CNN
F 1 "ADS831E_2K5" H 10450 3831 60 0000 C CNN
F 2 "ADS831:ADS831E&slash_2K5" H 10450 3790 60 0001 C CNN
F 3 "" H 9050 3550 60 0000 C CNN
1 9050 3550
-1 0 0 -1
$EndComp
$Comp
L Device:L L?
U 1 1 610853E4
P 4400 2900
AR Path="/60C2FE2A/610853E4" Ref="L?" Part="1"
AR Path="/60FB17F2/610853E4" Ref="L3" Part="1"
F 0 "L3" V 4590 2900 50 0000 C CNN
F 1 "10uH" V 4499 2900 50 0000 C CNN
F 2 "Inductor_SMD:L_0603_1608Metric" H 4400 2900 50 0001 C CNN
F 3 "~" H 4400 2900 50 0001 C CNN
1 4400 2900
0 -1 -1 0
$EndComp
$Comp
L Device:C C?
U 1 1 610853EA
P 4750 3100
AR Path="/60C2FE2A/610853EA" Ref="C?" Part="1"
AR Path="/60FB17F2/610853EA" Ref="C13" Part="1"
F 0 "C13" H 4865 3146 50 0000 L CNN
F 1 "10uF" H 4865 3055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 4788 2950 50 0001 C CNN
F 3 "~" H 4750 3100 50 0001 C CNN
1 4750 3100
1 0 0 -1
$EndComp
Wire Wire Line
4250 2900 4050 2900
Wire Wire Line
4550 2900 4750 2900
Wire Wire Line
4750 2950 4750 2900
$Comp
L power:+3V3 #PWR025
U 1 1 6109D4DF
P 4050 2700
F 0 "#PWR025" H 4050 2550 50 0001 C CNN
F 1 "+3V3" H 4065 2873 50 0000 C CNN
F 2 "" H 4050 2700 50 0001 C CNN
F 3 "" H 4050 2700 50 0001 C CNN
1 4050 2700
1 0 0 -1
$EndComp
Wire Wire Line
4050 2700 4050 2900
$Comp
L power:GND #PWR058
U 1 1 6109F3FD
P 4750 3450
F 0 "#PWR058" H 4750 3200 50 0001 C CNN
F 1 "GND" H 4755 3277 50 0000 C CNN
F 2 "" H 4750 3450 50 0001 C CNN
F 3 "" H 4750 3450 50 0001 C CNN
1 4750 3450
1 0 0 -1
$EndComp
Wire Wire Line
4750 3250 4750 3450
Text Label 4900 2900 0 50 ~ 0
+3V3A
Wire Wire Line
4900 2900 4750 2900
Connection ~ 4750 2900
Text Label 6050 3550 2 50 ~ 0
+3V3A
$EndSCHEMATC

View File

@ -1,626 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 6 7
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L MCU_ST_STM32F1:STM32F103VCTx U3
U 1 1 60C30090
P 4000 4150
F 0 "U3" H 4000 1261 50 0000 C CNN
F 1 "STM32F103VCTx" H 4000 1170 50 0000 C CNN
F 2 "Package_QFP:LQFP-100_14x14mm_P0.5mm" H 3200 1550 50 0001 R CNN
F 3 "http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/CD00191185.pdf" H 4000 4150 50 0001 C CNN
1 4000 4150
1 0 0 -1
$EndComp
$Comp
L Device:Crystal_GND24 Y1
U 1 1 618C74FB
P 2350 2500
F 0 "Y1" V 2304 2744 50 0000 L CNN
F 1 "8MHz" V 2395 2744 50 0000 L CNN
F 2 "Crystal:Crystal_SMD_2520-4Pin_2.5x2.0mm" H 2350 2500 50 0001 C CNN
F 3 "~" H 2350 2500 50 0001 C CNN
1 2350 2500
0 1 1 0
$EndComp
$Comp
L Device:C C7
U 1 1 618C8494
P 1900 2300
F 0 "C7" V 1648 2300 50 0000 C CNN
F 1 "22pF" V 1739 2300 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 1938 2150 50 0001 C CNN
F 3 "~" H 1900 2300 50 0001 C CNN
1 1900 2300
0 1 1 0
$EndComp
$Comp
L Device:C C8
U 1 1 618C9804
P 1900 2700
F 0 "C8" V 1648 2700 50 0000 C CNN
F 1 "22pF" V 1739 2700 50 0000 C CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 1938 2550 50 0001 C CNN
F 3 "~" H 1900 2700 50 0001 C CNN
1 1900 2700
0 1 1 0
$EndComp
$Comp
L power:GND #PWR015
U 1 1 618CA8E9
P 2650 2500
F 0 "#PWR015" H 2650 2250 50 0001 C CNN
F 1 "GND" H 2655 2327 50 0000 C CNN
F 2 "" H 2650 2500 50 0001 C CNN
F 3 "" H 2650 2500 50 0001 C CNN
1 2650 2500
0 -1 -1 0
$EndComp
$Comp
L power:GND #PWR012
U 1 1 618CB041
P 1500 2500
F 0 "#PWR012" H 1500 2250 50 0001 C CNN
F 1 "GND" V 1505 2372 50 0000 R CNN
F 2 "" H 1500 2500 50 0001 C CNN
F 3 "" H 1500 2500 50 0001 C CNN
1 1500 2500
0 1 1 0
$EndComp
Wire Wire Line
2050 2300 2350 2300
Wire Wire Line
2350 2300 2350 2350
Wire Wire Line
2050 2700 2350 2700
Wire Wire Line
2350 2700 2350 2650
Wire Wire Line
1750 2300 1650 2300
Wire Wire Line
1650 2300 1650 2500
Wire Wire Line
1650 2700 1750 2700
Wire Wire Line
2150 2500 1650 2500
Connection ~ 1650 2500
Wire Wire Line
1650 2500 1650 2700
Wire Wire Line
2550 2500 2650 2500
Wire Wire Line
3000 2450 2800 2450
Wire Wire Line
2800 2450 2800 2300
Wire Wire Line
3000 2550 2800 2550
Wire Wire Line
2800 2550 2800 2700
Connection ~ 2350 2300
Connection ~ 2350 2700
Wire Wire Line
2350 2300 2800 2300
Wire Wire Line
2350 2700 2800 2700
Wire Wire Line
1500 2500 1650 2500
$Comp
L Device:R R17
U 1 1 618E0B81
P 2700 1950
F 0 "R17" V 2493 1950 50 0000 C CNN
F 1 "10k" V 2584 1950 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 2630 1950 50 0001 C CNN
F 3 "~" H 2700 1950 50 0001 C CNN
1 2700 1950
0 1 1 0
$EndComp
$Comp
L Device:R R15
U 1 1 618E1519
P 2350 1750
F 0 "R15" V 2143 1750 50 0000 C CNN
F 1 "10k" V 2234 1750 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 2280 1750 50 0001 C CNN
F 3 "~" H 2350 1750 50 0001 C CNN
1 2350 1750
0 1 1 0
$EndComp
$Comp
L power:GND #PWR014
U 1 1 618E2873
P 2450 1950
F 0 "#PWR014" H 2450 1700 50 0001 C CNN
F 1 "GND" V 2455 1822 50 0000 R CNN
F 2 "" H 2450 1950 50 0001 C CNN
F 3 "" H 2450 1950 50 0001 C CNN
1 2450 1950
0 1 1 0
$EndComp
$Comp
L power:+3V3 #PWR013
U 1 1 618E3269
P 2000 1750
F 0 "#PWR013" H 2000 1600 50 0001 C CNN
F 1 "+3V3" V 2015 1878 50 0000 L CNN
F 2 "" H 2000 1750 50 0001 C CNN
F 3 "" H 2000 1750 50 0001 C CNN
1 2000 1750
0 -1 -1 0
$EndComp
Text GLabel 2100 1400 0 50 Input ~ 0
CPU_RESET
$Comp
L Device:R R16
U 1 1 618E4ED2
P 2550 1400
F 0 "R16" V 2343 1400 50 0000 C CNN
F 1 "0" V 2434 1400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 2480 1400 50 0001 C CNN
F 3 "~" H 2550 1400 50 0001 C CNN
1 2550 1400
0 1 1 0
$EndComp
Wire Wire Line
3000 1950 2850 1950
Wire Wire Line
2550 1950 2450 1950
Wire Wire Line
3000 1750 2850 1750
Wire Wire Line
2200 1750 2000 1750
Wire Wire Line
2100 1400 2400 1400
Wire Wire Line
2700 1400 2850 1400
Wire Wire Line
2850 1400 2850 1750
Connection ~ 2850 1750
Wire Wire Line
2850 1750 2500 1750
Wire Wire Line
4400 1450 4400 1350
Wire Wire Line
4400 1350 4300 1350
Wire Wire Line
3900 1350 3900 1450
Wire Wire Line
4000 1450 4000 1350
Connection ~ 4000 1350
Wire Wire Line
4000 1350 3900 1350
Wire Wire Line
4100 1450 4100 1350
Connection ~ 4100 1350
Wire Wire Line
4100 1350 4000 1350
Wire Wire Line
4200 1450 4200 1350
Connection ~ 4200 1350
Wire Wire Line
4200 1350 4100 1350
Wire Wire Line
4300 1450 4300 1350
Connection ~ 4300 1350
Wire Wire Line
4300 1350 4200 1350
Wire Wire Line
3900 6950 3900 7050
Wire Wire Line
3900 7050 4000 7050
Wire Wire Line
4300 7050 4300 6950
Wire Wire Line
4200 6950 4200 7050
Connection ~ 4200 7050
Wire Wire Line
4200 7050 4300 7050
Wire Wire Line
4100 6950 4100 7050
Connection ~ 4100 7050
Wire Wire Line
4100 7050 4200 7050
Connection ~ 4000 7050
Wire Wire Line
4000 7050 4100 7050
Wire Wire Line
4000 6950 4000 7050
Wire Wire Line
4400 6950 4400 7050
Wire Wire Line
4400 7050 4300 7050
Connection ~ 4300 7050
$Comp
L power:GND #PWR019
U 1 1 618F6928
P 4400 7200
F 0 "#PWR019" H 4400 6950 50 0001 C CNN
F 1 "GND" H 4405 7027 50 0000 C CNN
F 2 "" H 4400 7200 50 0001 C CNN
F 3 "" H 4400 7200 50 0001 C CNN
1 4400 7200
1 0 0 -1
$EndComp
Wire Wire Line
4400 7200 4400 7050
Connection ~ 4400 7050
$Comp
L power:+3V3 #PWR018
U 1 1 618FA8BE
P 3900 1200
F 0 "#PWR018" H 3900 1050 50 0001 C CNN
F 1 "+3V3" H 3915 1373 50 0000 C CNN
F 2 "" H 3900 1200 50 0001 C CNN
F 3 "" H 3900 1200 50 0001 C CNN
1 3900 1200
1 0 0 -1
$EndComp
Wire Wire Line
4500 1450 4500 1200
Wire Wire Line
3900 1200 3900 1350
Connection ~ 3900 1350
$Comp
L power:GND #PWR017
U 1 1 61909F09
P 2950 2250
F 0 "#PWR017" H 2950 2000 50 0001 C CNN
F 1 "GND" V 2955 2122 50 0000 R CNN
F 2 "" H 2950 2250 50 0001 C CNN
F 3 "" H 2950 2250 50 0001 C CNN
1 2950 2250
0 1 1 0
$EndComp
Wire Wire Line
3000 2250 2950 2250
Wire Wire Line
2950 2150 3000 2150
Text HLabel 5400 2150 2 50 Input ~ 0
CPU_DAC0
Text HLabel 5400 2250 2 50 Input ~ 0
CPU_DAC1
Wire Wire Line
5400 2150 5000 2150
Wire Wire Line
5000 2250 5400 2250
Text HLabel 5400 1850 2 50 Input ~ 0
CPU_ADC1
Text HLabel 5400 1950 2 50 Input ~ 0
CPU_ADC2
Text HLabel 5400 2050 2 50 Input ~ 0
CPU_ADC3
Text HLabel 5400 2350 2 50 Input ~ 0
CPU_ADC4
Text HLabel 5400 1750 2 50 Input ~ 0
CPU_ADC0
Wire Wire Line
5000 1750 5400 1750
Wire Wire Line
5000 1850 5400 1850
Wire Wire Line
5000 1950 5400 1950
Wire Wire Line
5000 2050 5400 2050
Wire Wire Line
5000 2350 5400 2350
Wire Wire Line
5000 2450 5400 2450
Text HLabel 5400 2450 2 50 Input ~ 0
CPU_ADC5
Text HLabel 5400 5550 2 50 Input ~ 0
CPU_ADC6
Text HLabel 5400 5650 2 50 Input ~ 0
CPU_ADC7
Wire Wire Line
5000 5550 5400 5550
Wire Wire Line
5000 5650 5400 5650
Text HLabel 5350 4450 2 50 Input ~ 0
CPU_IIC2_SCL
Text HLabel 5350 4550 2 50 Input ~ 0
CPU_IIC2_SDA
Wire Wire Line
5000 4450 5350 4450
Wire Wire Line
5000 4550 5350 4550
Text HLabel 5350 4750 2 50 Input ~ 0
CPU_SPI2_SCK
Text HLabel 5350 4850 2 50 Input ~ 0
CPU_SPI2_MISO
Text HLabel 5350 4950 2 50 Input ~ 0
CPU_SPI2_MOSI
Wire Wire Line
5000 4750 5350 4750
Wire Wire Line
5000 4850 5350 4850
Wire Wire Line
5000 4950 5350 4950
Text HLabel 5400 3050 2 50 Input ~ 0
CPU_SWDIO
Text HLabel 5400 3150 2 50 Input ~ 0
CPU_SWCLK
Wire Wire Line
5400 3050 5000 3050
Wire Wire Line
5000 3150 5400 3150
Text HLabel 5400 2650 2 50 Input ~ 0
CPU_UART1_TX
Text HLabel 5400 2750 2 50 Input ~ 0
CPU_UART1_RX
Wire Wire Line
5400 2650 5000 2650
Wire Wire Line
5000 2750 5400 2750
Text HLabel 5400 6150 2 50 Input ~ 0
CPU_UART4_TX
Text HLabel 5400 6250 2 50 Input ~ 0
CPU_UART4_RX
Wire Wire Line
5400 6150 5000 6150
Wire Wire Line
5000 6250 5400 6250
Text HLabel 5350 4250 2 50 Input ~ 0
CPU_IIC1_SCL
Text HLabel 5350 4350 2 50 Input ~ 0
CPU_IIC1_SDA
Wire Wire Line
5350 4250 5000 4250
Wire Wire Line
5000 4350 5350 4350
Text HLabel 5350 3750 2 50 Input ~ 0
CPU_SPI1_SCK
Text HLabel 5350 3850 2 50 Input ~ 0
CPU_SPI1_MISO
Text HLabel 5350 3950 2 50 Input ~ 0
CPU_SPI1_MOSI
Wire Wire Line
5350 3750 5000 3750
Wire Wire Line
5000 3850 5350 3850
Wire Wire Line
5350 3950 5000 3950
Text HLabel 5350 4650 2 50 Input ~ 0
CPU_SPI2_CS
Wire Wire Line
5350 4650 5000 4650
Text HLabel 5400 3250 2 50 Input ~ 0
CPU_SPI1_CS
Wire Wire Line
5000 3250 5400 3250
Text HLabel 2600 6550 0 50 Input ~ 0
CPU_FSMC_DA0
Text HLabel 2600 6650 0 50 Input ~ 0
CPU_FSMC_DA1
Wire Wire Line
2600 6550 3000 6550
Wire Wire Line
2600 6650 3000 6650
Text HLabel 2600 5150 0 50 Input ~ 0
CPU_FSMC_DA2
Text HLabel 2600 5250 0 50 Input ~ 0
CPU_FSMC_DA3
Text HLabel 2600 4150 0 50 Input ~ 0
CPU_FSMC_DA4
Text HLabel 2600 4250 0 50 Input ~ 0
CPU_FSMC_DA5
Text HLabel 2600 4350 0 50 Input ~ 0
CPU_FSMC_DA6
Text HLabel 2600 4450 0 50 Input ~ 0
CPU_FSMC_DA7
Text HLabel 2600 4550 0 50 Input ~ 0
CPU_FSMC_DA8
Text HLabel 2600 4650 0 50 Input ~ 0
CPU_FSMC_DA9
Text HLabel 2600 4750 0 50 Input ~ 0
CPU_FSMC_DA10
Text HLabel 2600 4850 0 50 Input ~ 0
CPU_FSMC_DA11
Text HLabel 2600 4950 0 50 Input ~ 0
CPU_FSMC_DA12
Wire Wire Line
2600 4150 3000 4150
Wire Wire Line
2600 4250 3000 4250
Wire Wire Line
2600 4350 3000 4350
Wire Wire Line
2600 4450 3000 4450
Wire Wire Line
2600 4550 3000 4550
Wire Wire Line
2600 4650 3000 4650
Wire Wire Line
3000 4750 2600 4750
Wire Wire Line
2600 4850 3000 4850
Wire Wire Line
2600 4950 3000 4950
Wire Wire Line
2600 5150 3000 5150
Wire Wire Line
2600 5250 3000 5250
Text HLabel 2600 5950 0 50 Input ~ 0
CPU_FSMC_D13
Text HLabel 2600 6050 0 50 Input ~ 0
CPU_FSMC_D14
Text HLabel 2600 6150 0 50 Input ~ 0
CPU_FSMC_D15
Wire Wire Line
2600 5950 3000 5950
Wire Wire Line
2600 6050 3000 6050
Wire Wire Line
2600 6150 3000 6150
Text HLabel 2600 6250 0 50 Input ~ 0
CPU_FSMC_A16
Text HLabel 2600 6350 0 50 Input ~ 0
CPU_FSMC_A17
Text HLabel 2600 6450 0 50 Input ~ 0
CPU_FSMC_A18
Wire Wire Line
2600 6250 3000 6250
Wire Wire Line
2600 6350 3000 6350
Wire Wire Line
2600 6450 3000 6450
Text HLabel 2600 3750 0 50 Input ~ 0
CPU_FSMC_A19
Text HLabel 2600 3850 0 50 Input ~ 0
CPU_FSMC_A20
Text HLabel 2600 3950 0 50 Input ~ 0
CPU_FSMC_A21
Text HLabel 2600 4050 0 50 Input ~ 0
CPU_FSMC_A22
Text HLabel 2600 3650 0 50 Input ~ 0
CPU_FSMC_A23
Wire Wire Line
3000 3650 2600 3650
Wire Wire Line
2600 3750 3000 3750
Wire Wire Line
3000 3850 2600 3850
Wire Wire Line
2600 3950 3000 3950
Wire Wire Line
3000 4050 2600 4050
Text HLabel 2600 5650 0 50 Input ~ 0
CPU_FSMC_NWE
Text HLabel 2600 5550 0 50 Input ~ 0
CPU_FSMC_NOE
Wire Wire Line
2600 5550 3000 5550
Wire Wire Line
2600 5650 3000 5650
Text HLabel 2600 5850 0 50 Input ~ 0
CPU_FSMC_NE1
Wire Wire Line
2600 5850 3000 5850
Text HLabel 5400 5750 2 50 Input ~ 0
CPU_PWM_CH1
Text HLabel 5400 5850 2 50 Input ~ 0
CPU_PWM_CH2
Text HLabel 5400 5950 2 50 Input ~ 0
CPU_PWM_CH3
Text HLabel 5400 6050 2 50 Input ~ 0
CPU_PWM_CH4
Wire Wire Line
5400 5750 5000 5750
Wire Wire Line
5000 5850 5400 5850
Wire Wire Line
5400 5950 5000 5950
Wire Wire Line
5000 6050 5400 6050
Text HLabel 2600 3450 0 50 Input ~ 0
CPU_FSMC_NBL0
Text HLabel 2600 3550 0 50 Input ~ 0
CPU_FSMC_NBL1
Wire Wire Line
2600 3450 3000 3450
Wire Wire Line
3000 3550 2600 3550
Text HLabel 5350 4150 2 50 Input ~ 0
CPU_FSMC_NL
Text HLabel 2600 5450 0 50 Input ~ 0
CPU_FSMC_CLK
Text HLabel 2600 5750 0 50 Input ~ 0
CPU_FSMC_NWAIT
Wire Wire Line
2600 5750 3000 5750
Wire Wire Line
2600 5450 3000 5450
Wire Wire Line
5000 4150 5350 4150
Text HLabel 5400 2950 2 50 Input ~ 0
CPU_ENC_CS
Wire Wire Line
5400 2950 5000 2950
$Comp
L Device:L L?
U 1 1 6115CE70
P 7050 1550
AR Path="/60C2FE2A/6115CE70" Ref="L?" Part="1"
AR Path="/60FB17F2/6115CE70" Ref="L?" Part="1"
AR Path="/60E4702B/6115CE70" Ref="L?" Part="1"
AR Path="/60C2FDBB/6115CE70" Ref="L7" Part="1"
F 0 "L7" V 7240 1550 50 0000 C CNN
F 1 "10uH" V 7149 1550 50 0000 C CNN
F 2 "Inductor_SMD:L_0603_1608Metric" H 7050 1550 50 0001 C CNN
F 3 "~" H 7050 1550 50 0001 C CNN
1 7050 1550
0 -1 -1 0
$EndComp
$Comp
L Device:C C?
U 1 1 6115CE76
P 7400 1750
AR Path="/60C2FE2A/6115CE76" Ref="C?" Part="1"
AR Path="/60FB17F2/6115CE76" Ref="C?" Part="1"
AR Path="/60E4702B/6115CE76" Ref="C?" Part="1"
AR Path="/60C2FDBB/6115CE76" Ref="C35" Part="1"
F 0 "C35" H 7515 1796 50 0000 L CNN
F 1 "10uF" H 7515 1705 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 7438 1600 50 0001 C CNN
F 3 "~" H 7400 1750 50 0001 C CNN
1 7400 1750
1 0 0 -1
$EndComp
Wire Wire Line
6900 1550 6700 1550
Wire Wire Line
7200 1550 7400 1550
Wire Wire Line
7400 1600 7400 1550
$Comp
L power:+3V3 #PWR?
U 1 1 6115CE7F
P 6700 1350
AR Path="/60FB17F2/6115CE7F" Ref="#PWR?" Part="1"
AR Path="/60E4702B/6115CE7F" Ref="#PWR?" Part="1"
AR Path="/60C2FDBB/6115CE7F" Ref="#PWR0113" Part="1"
F 0 "#PWR0113" H 6700 1200 50 0001 C CNN
F 1 "+3V3" H 6715 1523 50 0000 C CNN
F 2 "" H 6700 1350 50 0001 C CNN
F 3 "" H 6700 1350 50 0001 C CNN
1 6700 1350
1 0 0 -1
$EndComp
Wire Wire Line
6700 1350 6700 1550
Text Label 7550 1550 0 50 ~ 0
+3V3A
Wire Wire Line
7550 1550 7400 1550
Connection ~ 7400 1550
$Comp
L power:GND #PWR?
U 1 1 6115CE89
P 7400 2000
AR Path="/60E4702B/6115CE89" Ref="#PWR?" Part="1"
AR Path="/60C2FDBB/6115CE89" Ref="#PWR0114" Part="1"
F 0 "#PWR0114" H 7400 1750 50 0001 C CNN
F 1 "GND" H 7405 1827 50 0000 C CNN
F 2 "" H 7400 2000 50 0001 C CNN
F 3 "" H 7400 2000 50 0001 C CNN
1 7400 2000
1 0 0 -1
$EndComp
Wire Wire Line
7400 2000 7400 1900
Text Label 4500 1200 0 50 ~ 0
+3V3A
Text Label 2950 2150 2 50 ~ 0
+3V3A
$EndSCHEMATC

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -16,8 +16,8 @@ $EndDescr
$Sheet
S 7500 950 600 1200
U 60FB17F2
F0 "High_Speed_ADC" 50
F1 "High_Speed_ADC.sch" 50
F0 "HighSpeedADC" 50
F1 "HighSpeedADC.sch" 50
F2 "ADC_IN" I L 7500 1050 50
F3 "ADC_CLK" I L 7500 1200 50
F4 "ADC_DATA1" I L 7500 1350 50
@ -218,9 +218,12 @@ F65 "CPU_FSMC_NWAIT" I R 3250 4150 50
F66 "CPU_ENC_CS" I L 1750 3150 50
$EndSheet
$Sheet
S 3450 5350 500 900
S 3300 5400 650 500
U 60E3407A
F0 "Current_Senser" 50
F1 "Current_Senser.sch" 50
F0 "CurrentSenser" 50
F1 "CurrentSenser.sch" 50
F2 "12V_OUT" I L 3300 5500 50
F3 "12V_SW" I L 3300 5650 50
F4 "12V_CURRENT" I L 3300 5800 50
$EndSheet
$EndSCHEMATC

View File

@ -1,226 +0,0 @@
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 7
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Sheet
S 7500 950 600 1200
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(fp_lib_table
(lib (name ADS831)(type KiCad)(uri ${KIPRJMOD}/libs/ADS831/ADS831.pretty)(options "")(descr ""))
(lib (name AG5300)(type KiCad)(uri ${KIPRJMOD}/libs/AG5300/AG5300.pretty)(options "")(descr ""))
(lib (name iCE40HX8K)(type KiCad)(uri ${KIPRJMOD}/libs/iCE40HX8K)(options "")(descr ""))
(lib (name ENC624J600)(type KiCad)(uri ${KIPRJMOD}/libs/ENC624J600/ENC624J600.pretty)(options "")(descr ""))
(lib (name SI4425DDY)(type KiCad)(uri ${KIPRJMOD}/libs/SI4425DDY/SI4425DDY.pretty)(options "")(descr ""))
(lib (name ACPL-217-500E)(type KiCad)(uri ${KIPRJMOD}/libs/ACPL-217-500E/ACPL-217-500E.pretty)(options "")(descr ""))
(lib (name LP38692MPX-5.0)(type KiCad)(uri ${KIPRJMOD}/libs/LP38692/LP38692MPX-5.0.pretty)(options "")(descr ""))
(lib (name BNX022)(type KiCad)(uri ${KIPRJMOD}/libs/BNX022)(options "")(descr ""))
)

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@ -1,14 +0,0 @@
EE Concierge + KiCAD Library Install Instruction:
Contents of this Zip file:
- eec.lib: The schematic symbol(s)
- eec.dcm: The component description, keywords, and aliases
- eec.pretty/*.mod: The layout footprint(s)
- eec.models/*.step: The 3d models of the components
The schematic symbols are organized by the manufacturer part number.
The layout footprints are organized by the manufacturer name and the
identifier the manufacturer gives to the footprint, or the part number if one
is not supplied.
All parts exported successfully.

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@ -1,7 +0,0 @@
EESchema-DOCLIB Version 2.0
#
$CMP ADC1175-50CIMTX/NOPB
D ADC1175-50CIMTX/NOPB
F http://www.ti.com/lit/ds/symlink/adc1175-50.pdf
$ENDCMP
# end doc library

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@ -1,53 +0,0 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Texas Instruments ADC1175-50CIMTX/NOPB
#
DEF ADC1175-50CIMTX_NOPB U 0 40 Y Y 1 L N
F0 "U" 0 200 50 H V L CNN
F1 "ADC1175-50CIMTX/NOPB" 0 300 50 H V L CNN
F2 "Texas_Instruments-PW0024A-0-0-*" 0 400 50 H I L CNN
F3 "http://www.ti.com/lit/ds/symlink/adc1175-50.pdf" 0 500 50 H I L CNN
F4 "IC" 0 600 50 H I L CNN "category"
F5 "IC ADC 8BIT 24-TSSOP" 0 700 50 H I L CNN "digikey description"
F6 "296-36905-1-ND" 0 800 50 H I L CNN "digikey part number"
F7 "CAPC6030X23" 0 900 50 H I L CNN "ipc land pattern name"
F8 "yes" 0 1000 50 H I L CNN "lead free"
F9 "6b5b8381a02f6a46" 0 1100 50 H I L CNN "library id"
F10 "Texas Instruments" 0 1200 50 H I L CNN "manufacturer"
F11 "Analog to Digital Converters - ADC" 0 1300 50 H I L CNN "mouser description"
F12 "926-AD117550CIMTXNPB" 0 1400 50 H I L CNN "mouser part number"
F13 "TSSOP-24" 0 1500 50 H I L CNN "package"
F14 "yes" 0 1600 50 H I L CNN "rohs"
F15 "+75°C" 0 1700 50 H I L CNN "temperature range high"
F16 "-20°C" 0 1800 50 H I L CNN "temperature range low"
DRAW
X AVDD 14 100 -100 100 R 40 40 1 1 U
X AVDD 15 100 -200 100 R 40 40 1 1 U
X AVDD 18 100 -300 100 R 40 40 1 1 U
X DVDD 11 100 -400 100 R 40 40 1 1 U
X DVDD 13 100 -500 100 R 40 40 1 1 U
X VIN 19 100 0 100 R 40 40 1 1 U
X CLK 12 1200 -1100 100 L 40 40 1 1 U
X D0(LSB) 3 1200 -100 100 L 40 40 1 1 U
X D1 4 1200 -200 100 L 40 40 1 1 U
X D2 5 1200 -300 100 L 40 40 1 1 U
X D3 6 1200 -400 100 L 40 40 1 1 U
X D4 7 1200 -500 100 L 40 40 1 1 U
X D5 8 1200 -600 100 L 40 40 1 1 U
X D6 9 1200 -700 100 L 40 40 1 1 U
X D7(MSB) 10 1200 -800 100 L 40 40 1 1 U
X PD 1 1200 -1000 100 L 40 40 1 1 U
X VRB 23 100 -1100 100 R 40 40 1 1 U
X VRBS 22 100 -1300 100 R 40 40 1 1 U
X VRT 17 100 -900 100 R 40 40 1 1 U
X VRTS 16 100 -700 100 R 40 40 1 1 U
X AVSS 20 1200 -1300 100 L 40 40 1 1 U
X AVSS 21 1200 -1400 100 L 40 40 1 1 U
X DVSS 2 1200 -1500 100 L 40 40 1 1 U
X DVSS 24 1200 -1600 100 L 40 40 1 1 U
S 200 100 1100 -1700 1 1 0 f
ENDDRAW
ENDDEF
#
# End Library

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END-ISO-10303-21;

View File

@ -1,68 +0,0 @@
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