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This commit is contained in:
Jack-Zheng 2021-08-31 17:36:44 +08:00
parent f0f70afd86
commit 112e812159
11 changed files with 10211 additions and 10311 deletions
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255
Ethernet.sch
View File

@ -141,7 +141,7 @@ F 1 "SM13126PEL" H 8100 3201 50 0000 C CNN
F 2 "Transformer_SMD:Transformer_Ethernet_Bourns_PT61017PEL" H 8100 2250 50 0001 C CNN F 2 "Transformer_SMD:Transformer_Ethernet_Bourns_PT61017PEL" H 8100 2250 50 0001 C CNN
F 3 "https://www.bourns.com/docs/Product-Datasheets/PT61017PEL.pdf" H 7400 3100 50 0001 C CNN F 3 "https://www.bourns.com/docs/Product-Datasheets/PT61017PEL.pdf" H 7400 3100 50 0001 C CNN
1 8100 2750 1 8100 2750
1 0 0 -1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
8500 3050 9200 3050 8500 3050 9200 3050
@ -532,28 +532,6 @@ Wire Wire Line
Connection ~ 6100 2500 Connection ~ 6100 2500
Wire Wire Line Wire Wire Line
6800 1900 6800 2000 6800 1900 6800 2000
$Comp
L Device:R R116
U 1 1 60F6879A
P 6200 3000
F 0 "R116" H 6270 3046 50 0000 L CNN
F 1 "49.9/1%" H 6270 2955 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6130 3000 50 0001 C CNN
F 3 "~" H 6200 3000 50 0001 C CNN
1 6200 3000
0 1 1 0
$EndComp
$Comp
L Device:R R115
U 1 1 60F66A1F
P 6200 2900
F 0 "R115" H 6270 2946 50 0000 L CNN
F 1 "49.9/1%" H 6270 2855 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6130 2900 50 0001 C CNN
F 3 "~" H 6200 2900 50 0001 C CNN
1 6200 2900
0 -1 -1 0
$EndComp
Wire Wire Line Wire Wire Line
7700 3050 6900 3050 7700 3050 6900 3050
Wire Wire Line Wire Wire Line
@ -765,27 +743,6 @@ Wire Wire Line
Connection ~ 2450 5400 Connection ~ 2450 5400
Wire Wire Line Wire Wire Line
2450 5400 2450 5500 2450 5400 2450 5500
Wire Wire Line
4550 5300 4650 5300
Wire Wire Line
4650 5300 4650 5400
Wire Wire Line
4650 5700 4550 5700
Wire Wire Line
4550 5600 4650 5600
Connection ~ 4650 5600
Wire Wire Line
4650 5600 4650 5700
Wire Wire Line
4550 5500 4650 5500
Connection ~ 4650 5500
Wire Wire Line
4650 5500 4650 5600
Connection ~ 4650 5400
Wire Wire Line
4650 5400 4650 5500
Wire Wire Line
4550 5400 4650 5400
Wire Wire Line Wire Wire Line
4650 5800 4650 5900 4650 5800 4650 5900
Wire Wire Line Wire Wire Line
@ -806,9 +763,6 @@ $EndComp
Wire Wire Line Wire Wire Line
4850 5800 4650 5800 4850 5800 4650 5800
Connection ~ 4650 5800 Connection ~ 4650 5800
Wire Wire Line
4850 5300 4650 5300
Connection ~ 4650 5300
$Comp $Comp
L Device:C C67 L Device:C C67
U 1 1 61289271 U 1 1 61289271
@ -984,7 +938,7 @@ AR Path="/60C2FE2A/610E001A" Ref="C?" Part="1"
AR Path="/60FB17F2/610E001A" Ref="C?" Part="1" AR Path="/60FB17F2/610E001A" Ref="C?" Part="1"
AR Path="/60E4702B/610E001A" Ref="C63" Part="1" AR Path="/60E4702B/610E001A" Ref="C63" Part="1"
F 0 "C63" H 4065 7146 50 0000 L CNN F 0 "C63" H 4065 7146 50 0000 L CNN
F 1 "10uF" H 4065 7055 50 0000 L CNN F 1 "1nF" H 4065 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 3988 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 3988 6950 50 0001 C CNN
F 3 "~" H 3950 7100 50 0001 C CNN F 3 "~" H 3950 7100 50 0001 C CNN
1 3950 7100 1 3950 7100
@ -1035,33 +989,6 @@ Wire Wire Line
1150 2050 1150 2250 1150 2050 1150 2250
Wire Wire Line Wire Wire Line
2250 2100 2550 2100 2250 2100 2550 2100
$Comp
L TestAutomation:ENC624J600-I_PT U14
U 1 1 6239CBED
P 2450 2000
F 0 "U14" H 3550 2265 50 0000 C CNN
F 1 "ENC624J600-I_PT" H 3550 2174 50 0000 C CNN
F 2 "TestAutomation:Microchip-ENC624J600-I_PT-Level_A" H 2450 2400 50 0001 L CNN
F 3 "http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf" H 2450 2500 50 0001 L CNN
F 4 "MS-026" H 2450 2600 50 0001 L CNN "Code JEDEC"
F 5 "Manufacturer URL" H 2450 2700 50 0001 L CNN "Component Link 1 Description"
F 6 "http://www.microchip.com/" H 2450 2800 50 0001 L CNN "Component Link 1 URL"
F 7 "Package Specification" H 2450 2900 50 0001 L CNN "Component Link 3 Description"
F 8 "http://www.microchip.com/stellent/groups/techpub_sg/documents/packagingspec/en012702.pdf" H 2450 3000 50 0001 L CNN "Component Link 3 URL"
F 9 "revC, Jan-2010" H 2450 3100 50 0001 L CNN "Datasheet Version"
F 10 "64-Lead Thin Plastic Quad Flat Pack (PT) - 10x10x1mm Body, 2.00mm [TQFP]" H 2450 3200 50 0001 L CNN "Package Description"
F 11 "revBB, Aug-2009" H 2450 3300 50 0001 L CNN "Package Version"
F 12 "IC" H 2450 3400 50 0001 L CNN "category"
F 13 "963374" H 2450 3500 50 0001 L CNN "ciiva ids"
F 14 "785a2be8c985604e" H 2450 3600 50 0001 L CNN "library id"
F 15 "Microchip" H 2450 3700 50 0001 L CNN "manufacturer"
F 16 "TQFP-PT64" H 2450 3800 50 0001 L CNN "package"
F 17 "1331939240" H 2450 3900 50 0001 L CNN "release date"
F 18 "7601FC2E-46AD-4DC1-8A2C-669C8D2FD12D" H 2450 4000 50 0001 L CNN "vault revision"
F 19 "yes" H 2450 4100 50 0001 L CNN "imported"
1 2450 2000
1 0 0 -1
$EndComp
Wire Wire Line Wire Wire Line
7800 4750 7800 5050 7800 4750 7800 5050
Wire Wire Line Wire Wire Line
@ -1079,7 +1006,7 @@ L Device:C C64
U 1 1 61E69389 U 1 1 61E69389
P 4400 7100 P 4400 7100
F 0 "C64" H 4515 7146 50 0000 L CNN F 0 "C64" H 4515 7146 50 0000 L CNN
F 1 "100nF" H 4515 7055 50 0000 L CNN F 1 "1nF" H 4515 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 4438 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 4438 6950 50 0001 C CNN
F 3 "~" H 4400 7100 50 0001 C CNN F 3 "~" H 4400 7100 50 0001 C CNN
1 4400 7100 1 4400 7100
@ -1092,91 +1019,77 @@ Wire Wire Line
$Comp $Comp
L Device:C C65 L Device:C C65
U 1 1 61E7524B U 1 1 61E7524B
P 4800 7100 P 2400 7100
F 0 "C65" H 4915 7146 50 0000 L CNN F 0 "C65" H 2515 7146 50 0000 L CNN
F 1 "100nF" H 4915 7055 50 0000 L CNN F 1 "100nF" H 2515 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 4838 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 2438 6950 50 0001 C CNN
F 3 "~" H 4800 7100 50 0001 C CNN F 3 "~" H 2400 7100 50 0001 C CNN
1 4800 7100 1 2400 7100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
4800 6950 4800 6900 2400 6950 2400 6900
Wire Wire Line Wire Wire Line
4800 7250 4800 7300 2400 7250 2400 7300
$Comp $Comp
L Device:C C66 L Device:C C66
U 1 1 61E81711 U 1 1 61E81711
P 5200 7100 P 4850 7100
F 0 "C66" H 5315 7146 50 0000 L CNN F 0 "C66" H 4965 7146 50 0000 L CNN
F 1 "100nF" H 5315 7055 50 0000 L CNN F 1 "1nF" H 4965 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 5238 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 4888 6950 50 0001 C CNN
F 3 "~" H 5200 7100 50 0001 C CNN F 3 "~" H 4850 7100 50 0001 C CNN
1 5200 7100 1 4850 7100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5200 6950 5200 6900 4850 6950 4850 6900
Wire Wire Line Wire Wire Line
5200 7250 5200 7300 4850 7250 4850 7300
$Comp $Comp
L Device:C C68 L Device:C C68
U 1 1 61E8DDE9 U 1 1 61E8DDE9
P 5600 7100 P 5250 7100
F 0 "C68" H 5715 7146 50 0000 L CNN F 0 "C68" H 5365 7146 50 0000 L CNN
F 1 "100nF" H 5715 7055 50 0000 L CNN F 1 "1nF" H 5365 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 5638 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 5288 6950 50 0001 C CNN
F 3 "~" H 5600 7100 50 0001 C CNN F 3 "~" H 5250 7100 50 0001 C CNN
1 5600 7100 1 5250 7100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
5600 6950 5600 6900 5250 6950 5250 6900
Wire Wire Line Wire Wire Line
5600 7250 5600 7300 5250 7250 5250 7300
Wire Wire Line Wire Wire Line
3950 6900 4400 6900 3950 6900 4400 6900
Connection ~ 4400 6900
Wire Wire Line Wire Wire Line
4400 6900 4800 6900 4850 6900 5250 6900
Connection ~ 4800 6900
Wire Wire Line
4800 6900 5200 6900
Connection ~ 5200 6900
Wire Wire Line
5200 6900 5600 6900
Wire Wire Line Wire Wire Line
3950 7300 4400 7300 3950 7300 4400 7300
Connection ~ 4400 7300
Wire Wire Line Wire Wire Line
4400 7300 4800 7300 4850 7300 5250 7300
Connection ~ 4800 7300
Wire Wire Line
4800 7300 5200 7300
Connection ~ 5200 7300
Wire Wire Line
5200 7300 5600 7300
$Comp $Comp
L Device:C C69 L Device:C C69
U 1 1 61EB716F U 1 1 61EB716F
P 6000 7100 P 5650 7100
F 0 "C69" H 6115 7146 50 0000 L CNN F 0 "C69" H 5765 7146 50 0000 L CNN
F 1 "6.8nF" H 6115 7055 50 0000 L CNN F 1 "6.8nF" H 5765 7055 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 6038 6950 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 5688 6950 50 0001 C CNN
F 3 "~" H 6000 7100 50 0001 C CNN F 3 "~" H 5650 7100 50 0001 C CNN
1 6000 7100 1 5650 7100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
6000 6950 6000 6900 5650 6950 5650 6900
Wire Wire Line Wire Wire Line
6000 7250 6000 7300 5650 7250 5650 7300
Wire Wire Line Wire Wire Line
5600 6900 6000 6900 5250 6900 5650 6900
Wire Wire Line Wire Wire Line
5600 7300 6000 7300 5250 7300 5650 7300
Connection ~ 5600 6900 Connection ~ 5250 6900
Connection ~ 5600 7300 Connection ~ 5250 7300
$Comp $Comp
L Device:C C61 L Device:C C61
U 1 1 61EDEC5D U 1 1 61EDEC5D
@ -1234,4 +1147,90 @@ Wire Wire Line
Connection ~ 8800 5700 Connection ~ 8800 5700
Wire Wire Line Wire Wire Line
8800 5700 8900 5700 8800 5700 8900 5700
Wire Wire Line
2400 6900 2800 6900
Connection ~ 2800 6900
Wire Wire Line
2400 7300 2800 7300
Connection ~ 2800 7300
Wire Wire Line
4400 6900 4850 6900
Connection ~ 4400 6900
Connection ~ 4850 6900
Wire Wire Line
4400 7300 4850 7300
Connection ~ 4400 7300
Connection ~ 4850 7300
$Comp
L Device:R R116
U 1 1 60F6879A
P 6200 3000
F 0 "R116" H 6270 3046 50 0000 L CNN
F 1 "49.9/1%" H 6270 2955 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6130 3000 50 0001 C CNN
F 3 "~" H 6200 3000 50 0001 C CNN
1 6200 3000
0 1 1 0
$EndComp
$Comp
L Device:R R115
U 1 1 60F66A1F
P 6200 2900
F 0 "R115" H 6270 2946 50 0000 L CNN
F 1 "49.9/1%" H 6270 2855 50 0000 L CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6130 2900 50 0001 C CNN
F 3 "~" H 6200 2900 50 0001 C CNN
1 6200 2900
0 -1 -1 0
$EndComp
Wire Wire Line
4550 5300 4650 5300
Wire Wire Line
4650 5400 4650 5500
Wire Wire Line
4550 5400 4650 5400
Wire Wire Line
4650 5500 4650 5600
Connection ~ 4650 5500
Wire Wire Line
4550 5500 4650 5500
Wire Wire Line
4650 5600 4550 5600
$Comp
L TestAutomation:ENC624J600-I_PT U14
U 1 1 6239CBED
P 2450 2000
F 0 "U14" H 3550 2265 50 0000 C CNN
F 1 "ENC624J600-I_PT" H 3550 2174 50 0000 C CNN
F 2 "TestAutomation:Microchip-ENC624J600-I_PT-Level_A" H 2450 2400 50 0001 L CNN
F 3 "http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf" H 2450 2500 50 0001 L CNN
F 4 "MS-026" H 2450 2600 50 0001 L CNN "Code JEDEC"
F 5 "Manufacturer URL" H 2450 2700 50 0001 L CNN "Component Link 1 Description"
F 6 "http://www.microchip.com/" H 2450 2800 50 0001 L CNN "Component Link 1 URL"
F 7 "Package Specification" H 2450 2900 50 0001 L CNN "Component Link 3 Description"
F 8 "http://www.microchip.com/stellent/groups/techpub_sg/documents/packagingspec/en012702.pdf" H 2450 3000 50 0001 L CNN "Component Link 3 URL"
F 9 "revC, Jan-2010" H 2450 3100 50 0001 L CNN "Datasheet Version"
F 10 "64-Lead Thin Plastic Quad Flat Pack (PT) - 10x10x1mm Body, 2.00mm [TQFP]" H 2450 3200 50 0001 L CNN "Package Description"
F 11 "revBB, Aug-2009" H 2450 3300 50 0001 L CNN "Package Version"
F 12 "IC" H 2450 3400 50 0001 L CNN "category"
F 13 "963374" H 2450 3500 50 0001 L CNN "ciiva ids"
F 14 "785a2be8c985604e" H 2450 3600 50 0001 L CNN "library id"
F 15 "Microchip" H 2450 3700 50 0001 L CNN "manufacturer"
F 16 "TQFP-PT64" H 2450 3800 50 0001 L CNN "package"
F 17 "1331939240" H 2450 3900 50 0001 L CNN "release date"
F 18 "7601FC2E-46AD-4DC1-8A2C-669C8D2FD12D" H 2450 4000 50 0001 L CNN "vault revision"
F 19 "yes" H 2450 4100 50 0001 L CNN "imported"
1 2450 2000
1 0 0 -1
$EndComp
Wire Wire Line
4650 5400 4650 5300
Connection ~ 4650 5400
Connection ~ 4650 5300
Wire Wire Line
4650 5300 4850 5300
Wire Wire Line
4550 5700 4650 5700
Wire Wire Line
4650 5700 4650 5800
$EndSCHEMATC $EndSCHEMATC

118
FPGA.sch
View File

@ -2711,7 +2711,6 @@ NoConn ~ 7650 4350
NoConn ~ 7650 4250 NoConn ~ 7650 4250
NoConn ~ 7650 4150 NoConn ~ 7650 4150
NoConn ~ 7650 3950 NoConn ~ 7650 3950
NoConn ~ 7650 3850
NoConn ~ 7650 3650 NoConn ~ 7650 3650
NoConn ~ 7650 3450 NoConn ~ 7650 3450
NoConn ~ 7650 3350 NoConn ~ 7650 3350
@ -2765,12 +2764,12 @@ $EndComp
$Comp $Comp
L Device:C C11 L Device:C C11
U 1 1 62010A4C U 1 1 62010A4C
P 10050 7200 P 12450 9500
F 0 "C11" V 9798 7200 50 0000 C CNN F 0 "C11" V 12198 9500 50 0000 C CNN
F 1 "0.1uF" V 9889 7200 50 0000 C CNN F 1 "0.1uF" V 12289 9500 50 0000 C CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 10088 7050 50 0001 C CNN F 2 "Capacitor_SMD:C_0402_1005Metric" H 12488 9350 50 0001 C CNN
F 3 "~" H 10050 7200 50 0001 C CNN F 3 "~" H 12450 9500 50 0001 C CNN
1 10050 7200 1 12450 9500
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line Wire Wire Line
@ -3254,18 +3253,8 @@ F 3 "~" H 3650 9900 50 0001 C CNN
1 3650 9900 1 3650 9900
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
Wire Wire Line
10050 7350 10050 7400
Wire Wire Line
10050 7050 10050 7000
Wire Wire Line
10050 7000 9650 7000
Connection ~ 9650 7000
Wire Wire Line Wire Wire Line
9650 7000 9250 7000 9650 7000 9250 7000
Wire Wire Line
10050 7400 9650 7400
Connection ~ 9650 7400
Wire Wire Line Wire Wire Line
9650 7400 9250 7400 9650 7400 9250 7400
Connection ~ 9250 7000 Connection ~ 9250 7000
@ -3295,17 +3284,14 @@ Wire Wire Line
$Comp $Comp
L power:GND #PWR0164 L power:GND #PWR0164
U 1 1 6303CA5C U 1 1 6303CA5C
P 10050 7500 P 9650 7550
F 0 "#PWR0164" H 10050 7250 50 0001 C CNN F 0 "#PWR0164" H 9650 7300 50 0001 C CNN
F 1 "GND" H 10055 7327 50 0000 C CNN F 1 "GND" H 9655 7377 50 0000 C CNN
F 2 "" H 10050 7500 50 0001 C CNN F 2 "" H 9650 7550 50 0001 C CNN
F 3 "" H 10050 7500 50 0001 C CNN F 3 "" H 9650 7550 50 0001 C CNN
1 10050 7500 1 9650 7550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Wire Wire Line
10050 7500 10050 7400
Connection ~ 10050 7400
$Comp $Comp
L Device:C C94 L Device:C C94
U 1 1 630C242B U 1 1 630C242B
@ -3380,4 +3366,84 @@ F 3 "" H 4200 7350 50 0001 C CNN
1 4200 7350 1 4200 7350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp
L Oscillator:SG-8002CE X1
U 1 1 611ED7C3
P 13100 9200
F 0 "X1" H 13444 9246 50 0000 L CNN
F 1 "SG-8002CE" H 13444 9155 50 0000 L CNN
F 2 "Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm" H 13800 8850 50 0001 C CNN
F 3 "https://support.epson.biz/td/api/doc_check.php?mode=dl&lang=en&Parts=SG-8002DC" H 13000 9200 50 0001 C CNN
1 13100 9200
1 0 0 -1
$EndComp
$Comp
L Device:R R88
U 1 1 611F4FD3
P 13950 9200
F 0 "R88" V 13743 9200 50 0000 C CNN
F 1 "22" V 13834 9200 50 0000 C CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 13880 9200 50 0001 C CNN
F 3 "~" H 13950 9200 50 0001 C CNN
1 13950 9200
0 1 1 0
$EndComp
Wire Wire Line
13100 8900 13100 8850
Wire Wire Line
13100 8850 12450 8850
Wire Wire Line
12450 8850 12450 9200
Wire Wire Line
12800 9200 12450 9200
Connection ~ 12450 9200
Wire Wire Line
12450 9200 12450 9350
Wire Wire Line
12450 9650 12450 9750
Wire Wire Line
12450 9750 13100 9750
Wire Wire Line
13100 9750 13100 9500
Wire Wire Line
13400 9200 13800 9200
Wire Wire Line
14100 9200 14450 9200
Text Label 14450 9200 2 50 ~ 0
FPGA_Clock
$Comp
L power:GND #PWR0167
U 1 1 613BDD9C
P 12450 9850
F 0 "#PWR0167" H 12450 9600 50 0001 C CNN
F 1 "GND" H 12455 9677 50 0000 C CNN
F 2 "" H 12450 9850 50 0001 C CNN
F 3 "" H 12450 9850 50 0001 C CNN
1 12450 9850
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR0168
U 1 1 613BEEC4
P 12450 8800
F 0 "#PWR0168" H 12450 8650 50 0001 C CNN
F 1 "+3V3" H 12465 8973 50 0000 C CNN
F 2 "" H 12450 8800 50 0001 C CNN
F 3 "" H 12450 8800 50 0001 C CNN
1 12450 8800
1 0 0 -1
$EndComp
Wire Wire Line
12450 8800 12450 8850
Connection ~ 12450 8850
Wire Wire Line
12450 9850 12450 9750
Connection ~ 12450 9750
Text Label 8150 3850 2 50 ~ 0
FPGA_Clock
Wire Wire Line
7650 3850 8150 3850
Wire Wire Line
9650 7400 9650 7550
Connection ~ 9650 7400
$EndSCHEMATC $EndSCHEMATC

4
MCU.sch
View File

@ -294,9 +294,9 @@ Wire Wire Line
5000 2450 5400 2450 5000 2450 5400 2450
Text HLabel 5400 2450 2 50 Input ~ 0 Text HLabel 5400 2450 2 50 Input ~ 0
CPU_ADC5 CPU_ADC5
Text HLabel 5400 5650 2 50 Input ~ 0
CPU_ADC6
Text HLabel 5400 5550 2 50 Input ~ 0 Text HLabel 5400 5550 2 50 Input ~ 0
CPU_ADC6
Text HLabel 5400 5650 2 50 Input ~ 0
CPU_ADC7 CPU_ADC7
Wire Wire Line Wire Wire Line
5000 5550 5400 5550 5000 5550 5400 5550

16
Power.sch
View File

@ -212,8 +212,8 @@ L Device:C C45
U 1 1 6101658E U 1 1 6101658E
P 4350 2750 P 4350 2750
F 0 "C45" H 4465 2796 50 0000 L CNN F 0 "C45" H 4465 2796 50 0000 L CNN
F 1 "4.7nF" H 4465 2705 50 0000 L CNN F 1 "4.7nF/2kV" H 4465 2705 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 4388 2600 50 0001 C CNN F 2 "Capacitor_SMD:C_1206_3216Metric" H 4388 2600 50 0001 C CNN
F 3 "~" H 4350 2750 50 0001 C CNN F 3 "~" H 4350 2750 50 0001 C CNN
1 4350 2750 1 4350 2750
1 0 0 -1 1 0 0 -1
@ -223,8 +223,8 @@ L Device:C C50
U 1 1 6104520B U 1 1 6104520B
P 5600 2500 P 5600 2500
F 0 "C50" H 5715 2546 50 0000 L CNN F 0 "C50" H 5715 2546 50 0000 L CNN
F 1 "4.7nF" H 5715 2455 50 0000 L CNN F 1 "4.7nF/2kV" H 5715 2455 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 5638 2350 50 0001 C CNN F 2 "Capacitor_SMD:C_1206_3216Metric" H 5638 2350 50 0001 C CNN
F 3 "~" H 5600 2500 50 0001 C CNN F 3 "~" H 5600 2500 50 0001 C CNN
1 5600 2500 1 5600 2500
1 0 0 -1 1 0 0 -1
@ -234,8 +234,8 @@ L Device:C C51
U 1 1 610484DB U 1 1 610484DB
P 5600 3200 P 5600 3200
F 0 "C51" H 5715 3246 50 0000 L CNN F 0 "C51" H 5715 3246 50 0000 L CNN
F 1 "4.7nF" H 5715 3155 50 0000 L CNN F 1 "4.7nF/2kV" H 5715 3155 50 0000 L CNN
F 2 "Capacitor_SMD:C_0402_1005Metric" H 5638 3050 50 0001 C CNN F 2 "Capacitor_SMD:C_1206_3216Metric" H 5638 3050 50 0001 C CNN
F 3 "~" H 5600 3200 50 0001 C CNN F 3 "~" H 5600 3200 50 0001 C CNN
1 5600 3200 1 5600 3200
1 0 0 -1 1 0 0 -1
@ -244,8 +244,8 @@ $Comp
L Device:R R98 L Device:R R98
U 1 1 610634F8 U 1 1 610634F8
P 6150 2750 P 6150 2750
F 0 "R98" V 6357 2750 50 0000 C CNN F 0 "R98" V 6250 2650 50 0000 C CNN
F 1 "0" V 6266 2750 50 0000 C CNN F 1 "0" V 6050 2700 50 0000 C CNN
F 2 "Resistor_SMD:R_0402_1005Metric" V 6080 2750 50 0001 C CNN F 2 "Resistor_SMD:R_0402_1005Metric" V 6080 2750 50 0001 C CNN
F 3 "~" H 6150 2750 50 0001 C CNN F 3 "~" H 6150 2750 50 0001 C CNN
1 6150 2750 1 6150 2750

356
STM32CubeMx/STM32CubeMx.ioc
View File

@ -1,356 +0,0 @@
#MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_0
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master
ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.master=1
FSMC.IPParameters=NSMemoryDataWidth1,WriteOperation1
FSMC.NSMemoryDataWidth1=FSMC_NORSRAM_MEM_BUS_WIDTH_16
FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
File.Version=6
GPIO.groupedBy=
KeepUserPlacement=false
Mcu.Family=STM32F1
Mcu.IP0=ADC1
Mcu.IP1=DAC
Mcu.IP10=TIM3
Mcu.IP11=TIM8
Mcu.IP12=UART4
Mcu.IP13=USART1
Mcu.IP2=FSMC
Mcu.IP3=I2C1
Mcu.IP4=I2C2
Mcu.IP5=NVIC
Mcu.IP6=RCC
Mcu.IP7=SPI1
Mcu.IP8=SPI2
Mcu.IP9=SYS
Mcu.IPNb=14
Mcu.Name=STM32F103V(C-D-E)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PE2
Mcu.Pin1=PE3
Mcu.Pin10=PA0-WKUP
Mcu.Pin11=PA1
Mcu.Pin12=PA2
Mcu.Pin13=PA3
Mcu.Pin14=PA4
Mcu.Pin15=PA5
Mcu.Pin16=PA6
Mcu.Pin17=PA7
Mcu.Pin18=PC4
Mcu.Pin19=PC5
Mcu.Pin2=PE4
Mcu.Pin20=PB0
Mcu.Pin21=PB1
Mcu.Pin22=PB2
Mcu.Pin23=PE7
Mcu.Pin24=PE8
Mcu.Pin25=PE9
Mcu.Pin26=PE10
Mcu.Pin27=PE11
Mcu.Pin28=PE12
Mcu.Pin29=PE13
Mcu.Pin3=PE5
Mcu.Pin30=PE14
Mcu.Pin31=PE15
Mcu.Pin32=PB10
Mcu.Pin33=PB11
Mcu.Pin34=PB12
Mcu.Pin35=PB13
Mcu.Pin36=PB14
Mcu.Pin37=PB15
Mcu.Pin38=PD8
Mcu.Pin39=PD9
Mcu.Pin4=PE6
Mcu.Pin40=PD10
Mcu.Pin41=PD11
Mcu.Pin42=PD12
Mcu.Pin43=PD13
Mcu.Pin44=PD14
Mcu.Pin45=PD15
Mcu.Pin46=PC6
Mcu.Pin47=PC7
Mcu.Pin48=PC8
Mcu.Pin49=PC9
Mcu.Pin5=OSC_IN
Mcu.Pin50=PA8
Mcu.Pin51=PA9
Mcu.Pin52=PA10
Mcu.Pin53=PA11
Mcu.Pin54=PA12
Mcu.Pin55=PA13
Mcu.Pin56=PA14
Mcu.Pin57=PA15
Mcu.Pin58=PC10
Mcu.Pin59=PC11
Mcu.Pin6=OSC_OUT
Mcu.Pin60=PD0
Mcu.Pin61=PD1
Mcu.Pin62=PD3
Mcu.Pin63=PD4
Mcu.Pin64=PD5
Mcu.Pin65=PD6
Mcu.Pin66=PD7
Mcu.Pin67=PB3
Mcu.Pin68=PB4
Mcu.Pin69=PB5
Mcu.Pin7=PC0
Mcu.Pin70=PB7
Mcu.Pin71=PB8
Mcu.Pin72=PB9
Mcu.Pin73=PE0
Mcu.Pin74=PE1
Mcu.Pin75=VP_SYS_VS_Systick
Mcu.Pin8=PC1
Mcu.Pin9=PC2
Mcu.PinsNb=76
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103VCTx
MxCube.Version=6.2.1
MxDb.Version=DB.6.0.21
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4
NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
OSC_IN.Mode=HSE-External-Oscillator
OSC_IN.Signal=RCC_OSC_IN
OSC_OUT.Mode=HSE-External-Oscillator
OSC_OUT.Signal=RCC_OSC_OUT
PA0-WKUP.Signal=ADCx_IN0
PA1.Signal=ADCx_IN1
PA10.Mode=Asynchronous
PA10.Signal=USART1_RX
PA11.Locked=true
PA11.Signal=GPIO_Output
PA12.Locked=true
PA12.Signal=GPIO_Output
PA13.Mode=Serial_Wire
PA13.Signal=SYS_JTMS-SWDIO
PA14.Mode=Serial_Wire
PA14.Signal=SYS_JTCK-SWCLK
PA15.Mode=NSS_Signal_Hard_Output
PA15.Signal=SPI1_NSS
PA2.Signal=ADCx_IN2
PA3.Signal=ADCx_IN3
PA4.Signal=COMP_DAC1_group
PA5.Signal=COMP_DAC2_group
PA6.Signal=ADCx_IN6
PA7.Signal=ADCx_IN7
PA8.Locked=true
PA8.Signal=GPIO_Output
PA9.Mode=Asynchronous
PA9.Signal=USART1_TX
PB0.Signal=ADCx_IN8
PB1.Locked=true
PB1.Signal=ADCx_IN9
PB10.Mode=I2C
PB10.Signal=I2C2_SCL
PB11.Mode=I2C
PB11.Signal=I2C2_SDA
PB12.Mode=NSS_Signal_Hard_Output
PB12.Signal=SPI2_NSS
PB13.Mode=Full_Duplex_Master
PB13.Signal=SPI2_SCK
PB14.Mode=Full_Duplex_Master
PB14.Signal=SPI2_MISO
PB15.Mode=Full_Duplex_Master
PB15.Signal=SPI2_MOSI
PB2.Locked=true
PB2.Signal=GPIO_Input
PB3.Mode=Full_Duplex_Master
PB3.Signal=SPI1_SCK
PB4.Mode=Full_Duplex_Master
PB4.Signal=SPI1_MISO
PB5.Mode=Full_Duplex_Master
PB5.Signal=SPI1_MOSI
PB7.Signal=FSMC_NL
PB8.Mode=I2C
PB8.Signal=I2C1_SCL
PB9.Mode=I2C
PB9.Signal=I2C1_SDA
PC0.Locked=true
PC0.Signal=GPIO_Output
PC1.Locked=true
PC1.Signal=GPIO_Input
PC10.Mode=Asynchronous
PC10.Signal=UART4_TX
PC11.Mode=Asynchronous
PC11.Signal=UART4_RX
PC2.Signal=ADCx_IN12
PC4.Locked=true
PC4.Signal=ADCx_IN14
PC5.Locked=true
PC5.Signal=ADCx_IN15
PC6.Signal=S_TIM3_CH1
PC7.Signal=S_TIM3_CH2
PC8.Signal=S_TIM8_CH3
PC9.Signal=S_TIM8_CH4
PD0.Mode=24b-da1
PD0.Signal=FSMC_DA2
PD1.Mode=24b-da1
PD1.Signal=FSMC_DA3
PD10.Mode=24b-da1
PD10.Signal=FSMC_DA15
PD11.Mode=24b-da1
PD11.Signal=FSMC_A16
PD12.Mode=24b-da1
PD12.Signal=FSMC_A17
PD13.Mode=24b-da1
PD13.Signal=FSMC_A18
PD14.Mode=24b-da1
PD14.Signal=FSMC_DA0
PD15.Mode=24b-da1
PD15.Signal=FSMC_DA1
PD3.Mode=BurstReadWrite1
PD3.Signal=FSMC_CLK
PD4.Mode=MuxedPsram1
PD4.Signal=FSMC_NOE
PD5.Mode=MuxedPsram1
PD5.Signal=FSMC_NWE
PD6.Mode=SynchronousWait1
PD6.Signal=FSMC_NWAIT
PD7.Mode=NorPsramChipSelect1_1
PD7.Signal=FSMC_NE1
PD8.Mode=24b-da1
PD8.Signal=FSMC_DA13
PD9.Mode=24b-da1
PD9.Signal=FSMC_DA14
PE0.Mode=2ByteEnable1
PE0.Signal=FSMC_NBL0
PE1.Mode=2ByteEnable1
PE1.Signal=FSMC_NBL1
PE10.Mode=24b-da1
PE10.Signal=FSMC_DA7
PE11.Mode=24b-da1
PE11.Signal=FSMC_DA8
PE12.Mode=24b-da1
PE12.Signal=FSMC_DA9
PE13.Mode=24b-da1
PE13.Signal=FSMC_DA10
PE14.Mode=24b-da1
PE14.Signal=FSMC_DA11
PE15.Mode=24b-da1
PE15.Signal=FSMC_DA12
PE2.Mode=24b-da1
PE2.Signal=FSMC_A23
PE3.Mode=24b-da1
PE3.Signal=FSMC_A19
PE4.Mode=24b-da1
PE4.Signal=FSMC_A20
PE5.Mode=24b-da1
PE5.Signal=FSMC_A21
PE6.Mode=24b-da1
PE6.Signal=FSMC_A22
PE7.Mode=24b-da1
PE7.Signal=FSMC_DA4
PE8.Mode=24b-da1
PE8.Signal=FSMC_DA5
PE9.Mode=24b-da1
PE9.Signal=FSMC_DA6
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
ProjectManager.CompilerOptimize=6
ProjectManager.ComputerToolchain=false
ProjectManager.CoupleFile=false
ProjectManager.CustomerFirmwarePackage=
ProjectManager.DefaultFWLocation=true
ProjectManager.DeletePrevious=true
ProjectManager.DeviceId=STM32F103VCTx
ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.3
ProjectManager.FreePins=false
ProjectManager.HalAssertFull=false
ProjectManager.HeapSize=0x200
ProjectManager.KeepUserCode=true
ProjectManager.LastFirmware=false
ProjectManager.LibraryCopy=0
ProjectManager.MainLocation=Core/Src
ProjectManager.NoMain=false
ProjectManager.PreviousToolchain=
ProjectManager.ProjectBuild=false
ProjectManager.ProjectFileName=STM32CubeMx.ioc
ProjectManager.ProjectName=STM32CubeMx
ProjectManager.RegisterCallBack=
ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=EWARM V8.32
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DAC_Init-DAC-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_I2C2_Init-I2C2-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_UART4_Init-UART4-false-HAL-true,9-MX_ADC1_Init-ADC1-false-HAL-true,10-MX_FSMC_Init-FSMC-false-HAL-true,11-MX_USART1_UART_Init-USART1-false-HAL-true,12-MX_TIM3_Init-TIM3-false-HAL-true,13-MX_TIM8_Init-TIM8-false-HAL-true
RCC.APB1Freq_Value=8000000
RCC.APB2Freq_Value=8000000
RCC.FamilyName=M
RCC.IPParameters=APB1Freq_Value,APB2Freq_Value,FamilyName,PLLCLKFreq_Value,PLLMCOFreq_Value,TimSysFreq_Value
RCC.PLLCLKFreq_Value=8000000
RCC.PLLMCOFreq_Value=4000000
RCC.TimSysFreq_Value=8000000
SH.ADCx_IN0.0=ADC1_IN0,IN0
SH.ADCx_IN0.ConfNb=1
SH.ADCx_IN1.0=ADC1_IN1,IN1
SH.ADCx_IN1.ConfNb=1
SH.ADCx_IN12.0=ADC1_IN12,IN12
SH.ADCx_IN12.ConfNb=1
SH.ADCx_IN14.0=ADC1_IN14,IN14
SH.ADCx_IN14.ConfNb=1
SH.ADCx_IN15.0=ADC1_IN15,IN15
SH.ADCx_IN15.ConfNb=1
SH.ADCx_IN2.0=ADC1_IN2,IN2
SH.ADCx_IN2.ConfNb=1
SH.ADCx_IN3.0=ADC1_IN3,IN3
SH.ADCx_IN3.ConfNb=1
SH.ADCx_IN6.0=ADC1_IN6,IN6
SH.ADCx_IN6.ConfNb=1
SH.ADCx_IN7.0=ADC1_IN7,IN7
SH.ADCx_IN7.ConfNb=1
SH.ADCx_IN8.0=ADC1_IN8,IN8
SH.ADCx_IN8.ConfNb=1
SH.ADCx_IN9.0=ADC1_IN9,IN9
SH.ADCx_IN9.ConfNb=1
SH.COMP_DAC1_group.0=DAC_OUT1,DAC_OUT1
SH.COMP_DAC1_group.ConfNb=1
SH.COMP_DAC2_group.0=DAC_OUT2,DAC_OUT2
SH.COMP_DAC2_group.ConfNb=1
SH.FSMC_NL.0=FSMC_NL,AddressValid1
SH.FSMC_NL.ConfNb=1
SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1
SH.S_TIM3_CH1.ConfNb=1
SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2
SH.S_TIM3_CH2.ConfNb=1
SH.S_TIM8_CH3.0=TIM8_CH3,PWM Generation3 CH3
SH.S_TIM8_CH3.ConfNb=1
SH.S_TIM8_CH4.0=TIM8_CH4,PWM Generation4 CH4
SH.S_TIM8_CH4.ConfNb=1
SPI1.CalculateBaudRate=4.0 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,VirtualNSS,CalculateBaudRate
SPI1.Mode=SPI_MODE_MASTER
SPI1.VirtualNSS=VM_NSSHARD
SPI1.VirtualType=VM_MASTER
SPI2.CalculateBaudRate=4.0 MBits/s
SPI2.Direction=SPI_DIRECTION_2LINES
SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS
SPI2.Mode=SPI_MODE_MASTER
SPI2.VirtualNSS=VM_NSSHARD
SPI2.VirtualType=VM_MASTER
TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM3.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2
TIM8.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3
TIM8.Channel-PWM\ Generation4\ CH4=TIM_CHANNEL_4
TIM8.IPParameters=Channel-PWM Generation3 CH3,Channel-PWM Generation4 CH4
UART4.IPParameters=VirtualMode
UART4.VirtualMode=Asynchronous
USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
board=custom

BIN
Syrostan.pdf Normal file
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Binary file not shown.

19165
TestAutomation.kicad_pcb
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File diff suppressed because it is too large Load Diff

8
TestAutomation.lib
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@ -232,14 +232,14 @@ X PSPCFG3 18 100 -2600 100 R 40 40 1 1 I
X A10 19 100 -1900 100 R 40 40 1 1 I X A10 19 100 -1900 100 R 40 40 1 1 I
X OSC2 2 100 0 100 R 40 40 1 1 O X OSC2 2 100 0 100 R 40 40 1 1 O
X A11 20 100 -2000 100 R 40 40 1 1 I X A11 20 100 -2000 100 R 40 40 1 1 I
X VDD 21 2100 -3400 100 L 40 40 1 1 W X VDD 21 2100 -3700 100 L 40 40 1 1 W
X VDDPLL 22 2100 -3500 100 L 40 40 1 1 W X VDDPLL 22 2100 -3400 100 L 40 40 1 1 W
X VSSPLL 23 100 -3400 100 R 40 40 1 1 W X VSSPLL 23 100 -3400 100 R 40 40 1 1 W
X VSSRX 24 100 -3500 100 R 40 40 1 1 W X VSSRX 24 100 -3500 100 R 40 40 1 1 W
X VDDRX 25 2100 -3600 100 L 40 40 1 1 W X VDDRX 25 2100 -3500 100 L 40 40 1 1 W
X TPIN+ 26 2100 -200 100 L 40 40 1 1 I X TPIN+ 26 2100 -200 100 L 40 40 1 1 I
X TPIN- 27 2100 -300 100 L 40 40 1 1 I X TPIN- 27 2100 -300 100 L 40 40 1 1 I
X VDDTX 28 2100 -3700 100 L 40 40 1 1 W X VDDTX 28 2100 -3600 100 L 40 40 1 1 W
X VSSTX 29 100 -3600 100 R 40 40 1 1 W X VSSTX 29 100 -3600 100 R 40 40 1 1 W
X OSC1 3 100 -100 100 R 40 40 1 1 I X OSC1 3 100 -100 100 R 40 40 1 1 I
X TPOUT+ 30 2100 -500 100 L 40 40 1 1 O X TPOUT+ 30 2100 -500 100 L 40 40 1 1 O

7
TestAutomation.pretty/ScrewKeepout.kicad_mod
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@ -1,12 +1,9 @@
(module ScrewKeepout (layer F.Cu) (tedit 60EBA4E8) (module ScrewKeepout (layer F.Cu) (tedit 60FE66E7)
(fp_text reference M3 (at 0 0.5) (layer F.SilkS) hide (fp_text reference M3 (at 0 0.5) (layer F.SilkS) hide
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_text value ScrewKeepout (at 0 -0.5) (layer F.Fab) hide (fp_text value ScrewKeepout (at 0 -0.5) (layer F.Fab) hide
(effects (font (size 1 1) (thickness 0.15))) (effects (font (size 1 1) (thickness 0.15)))
) )
(fp_circle (center 0 0) (end 3 0) (layer B.SilkS) (width 0.12)) (pad "" thru_hole circle (at 0 0) (size 6 6) (drill 3) (layers *.Cu *.Mask))
(fp_circle (center 0 0) (end 3 0) (layer F.Cu) (width 0.12))
(fp_circle (center 0 0) (end 3 0) (layer F.SilkS) (width 0.12))
(fp_circle (center 0 0) (end 3 0) (layer B.Cu) (width 0.12))
) )

580
TestAutomation.pro
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@ -1,290 +1,290 @@
update=7/13/2021 3:13:11 PM update=Wed Aug 18 14:10:14 2021
version=1 version=1
last_client=kicad last_client=kicad
[general] [general]
version=1 version=1
RootSch= RootSch=
BoardNm= BoardNm=
[cvpcb] [cvpcb]
version=1 version=1
NetIExt=net NetIExt=net
[eeschema] [eeschema]
version=1 version=1
LibDir= LibDir=
[eeschema/libraries] [eeschema/libraries]
[schematic_editor] [pcbnew]
version=1 version=1
PageLayoutDescrFile= PageLayoutDescrFile=
PlotDirectoryName= LastNetListRead=TestAutomation.net
SubpartIdSeparator=0 CopperLayerCount=4
SubpartFirstId=65 BoardThickness=1.6
NetFmtName=Pcbnew AllowMicroVias=0
SpiceAjustPassiveValues=0 AllowBlindVias=0
LabSize=50 RequireCourtyardDefinitions=0
ERC_TestSimilarLabels=1 ProhibitOverlappingCourtyards=1
[pcbnew] MinTrackWidth=0.1143
version=1 MinViaDiameter=0.45
PageLayoutDescrFile= MinViaDrill=0.2
LastNetListRead=TestAutomation.net MinMicroViaDiameter=0.25
CopperLayerCount=4 MinMicroViaDrill=0.09999999999999999
BoardThickness=1.6 MinHoleToHole=0.127
AllowMicroVias=0 TrackWidth1=0.254
AllowBlindVias=0 TrackWidth2=0.127
RequireCourtyardDefinitions=0 TrackWidth3=0.254
ProhibitOverlappingCourtyards=1 TrackWidth4=0.381
MinTrackWidth=0.1143 TrackWidth5=0.508
MinViaDiameter=0.45 TrackWidth6=0.762
MinViaDrill=0.2 TrackWidth7=1.016
MinMicroViaDiameter=0.25 TrackWidth8=1.27
MinMicroViaDrill=0.09999999999999999 ViaDiameter1=0.45
MinHoleToHole=0.127 ViaDrill1=0.25
TrackWidth1=0.254 ViaDiameter2=0.45
TrackWidth2=0.127 ViaDrill2=0.25
TrackWidth3=0.254 ViaDiameter3=0.5
TrackWidth4=0.381 ViaDrill3=0.3
TrackWidth5=0.508 ViaDiameter4=0.8
TrackWidth6=0.762 ViaDrill4=0.5
TrackWidth7=1.016 ViaDiameter5=1
TrackWidth8=1.27 ViaDrill5=0.7
ViaDiameter1=0.45 ViaDiameter6=1.3
ViaDrill1=0.25 ViaDrill6=1.152
ViaDiameter2=0.45 dPairWidth1=0.127
ViaDrill2=0.25 dPairGap1=0.1016
ViaDiameter3=0.5 dPairViaGap1=0.25
ViaDrill3=0.3 dPairWidth2=0.127
ViaDiameter4=0.8 dPairGap2=0.1016
ViaDrill4=0.5 dPairViaGap2=0.0889
ViaDiameter5=1.3 SilkLineWidth=0.1524
ViaDrill5=1.152 SilkTextSizeV=1.016
ViaDiameter6=6 SilkTextSizeH=1.016
ViaDrill6=3 SilkTextSizeThickness=0.1524
dPairWidth1=0.127 SilkTextItalic=0
dPairGap1=0.1016 SilkTextUpright=1
dPairViaGap1=0.25 CopperLineWidth=0.127
dPairWidth2=0.127 CopperTextSizeV=1.5
dPairGap2=0.1016 CopperTextSizeH=1.5
dPairViaGap2=0.0889 CopperTextThickness=0.3
SilkLineWidth=0.1524 CopperTextItalic=0
SilkTextSizeV=1.016 CopperTextUpright=1
SilkTextSizeH=1.016 EdgeCutLineWidth=0.05
SilkTextSizeThickness=0.1524 CourtyardLineWidth=0.05
SilkTextItalic=0 OthersLineWidth=0.15
SilkTextUpright=1 OthersTextSizeV=1
CopperLineWidth=0.127 OthersTextSizeH=1
CopperTextSizeV=1.5 OthersTextSizeThickness=0.15
CopperTextSizeH=1.5 OthersTextItalic=0
CopperTextThickness=0.3 OthersTextUpright=1
CopperTextItalic=0 SolderMaskClearance=0
CopperTextUpright=1 SolderMaskMinWidth=0
EdgeCutLineWidth=0.05 SolderPasteClearance=0
CourtyardLineWidth=0.05 SolderPasteRatio=-0
OthersLineWidth=0.15 [pcbnew/Layer.F.Cu]
OthersTextSizeV=1 Name=F.Cu
OthersTextSizeH=1 Type=0
OthersTextSizeThickness=0.15 Enabled=1
OthersTextItalic=0 [pcbnew/Layer.In1.Cu]
OthersTextUpright=1 Name=In1.Cu
SolderMaskClearance=0 Type=1
SolderMaskMinWidth=0 Enabled=1
SolderPasteClearance=0 [pcbnew/Layer.In2.Cu]
SolderPasteRatio=-0 Name=In2.Cu
[pcbnew/Layer.F.Cu] Type=1
Name=F.Cu Enabled=1
Type=0 [pcbnew/Layer.In3.Cu]
Enabled=1 Name=In3.Cu
[pcbnew/Layer.In1.Cu] Type=0
Name=In1.Cu Enabled=0
Type=1 [pcbnew/Layer.In4.Cu]
Enabled=1 Name=In4.Cu
[pcbnew/Layer.In2.Cu] Type=0
Name=In2.Cu Enabled=0
Type=1 [pcbnew/Layer.In5.Cu]
Enabled=1 Name=In5.Cu
[pcbnew/Layer.In3.Cu] Type=0
Name=In3.Cu Enabled=0
Type=0 [pcbnew/Layer.In6.Cu]
Enabled=0 Name=In6.Cu
[pcbnew/Layer.In4.Cu] Type=0
Name=In4.Cu Enabled=0
Type=0 [pcbnew/Layer.In7.Cu]
Enabled=0 Name=In7.Cu
[pcbnew/Layer.In5.Cu] Type=0
Name=In5.Cu Enabled=0
Type=0 [pcbnew/Layer.In8.Cu]
Enabled=0 Name=In8.Cu
[pcbnew/Layer.In6.Cu] Type=0
Name=In6.Cu Enabled=0
Type=0 [pcbnew/Layer.In9.Cu]
Enabled=0 Name=In9.Cu
[pcbnew/Layer.In7.Cu] Type=0
Name=In7.Cu Enabled=0
Type=0 [pcbnew/Layer.In10.Cu]
Enabled=0 Name=In10.Cu
[pcbnew/Layer.In8.Cu] Type=0
Name=In8.Cu Enabled=0
Type=0 [pcbnew/Layer.In11.Cu]
Enabled=0 Name=In11.Cu
[pcbnew/Layer.In9.Cu] Type=0
Name=In9.Cu Enabled=0
Type=0 [pcbnew/Layer.In12.Cu]
Enabled=0 Name=In12.Cu
[pcbnew/Layer.In10.Cu] Type=0
Name=In10.Cu Enabled=0
Type=0 [pcbnew/Layer.In13.Cu]
Enabled=0 Name=In13.Cu
[pcbnew/Layer.In11.Cu] Type=0
Name=In11.Cu Enabled=0
Type=0 [pcbnew/Layer.In14.Cu]
Enabled=0 Name=In14.Cu
[pcbnew/Layer.In12.Cu] Type=0
Name=In12.Cu Enabled=0
Type=0 [pcbnew/Layer.In15.Cu]
Enabled=0 Name=In15.Cu
[pcbnew/Layer.In13.Cu] Type=0
Name=In13.Cu Enabled=0
Type=0 [pcbnew/Layer.In16.Cu]
Enabled=0 Name=In16.Cu
[pcbnew/Layer.In14.Cu] Type=0
Name=In14.Cu Enabled=0
Type=0 [pcbnew/Layer.In17.Cu]
Enabled=0 Name=In17.Cu
[pcbnew/Layer.In15.Cu] Type=0
Name=In15.Cu Enabled=0
Type=0 [pcbnew/Layer.In18.Cu]
Enabled=0 Name=In18.Cu
[pcbnew/Layer.In16.Cu] Type=0
Name=In16.Cu Enabled=0
Type=0 [pcbnew/Layer.In19.Cu]
Enabled=0 Name=In19.Cu
[pcbnew/Layer.In17.Cu] Type=0
Name=In17.Cu Enabled=0
Type=0 [pcbnew/Layer.In20.Cu]
Enabled=0 Name=In20.Cu
[pcbnew/Layer.In18.Cu] Type=0
Name=In18.Cu Enabled=0
Type=0 [pcbnew/Layer.In21.Cu]
Enabled=0 Name=In21.Cu
[pcbnew/Layer.In19.Cu] Type=0
Name=In19.Cu Enabled=0
Type=0 [pcbnew/Layer.In22.Cu]
Enabled=0 Name=In22.Cu
[pcbnew/Layer.In20.Cu] Type=0
Name=In20.Cu Enabled=0
Type=0 [pcbnew/Layer.In23.Cu]
Enabled=0 Name=In23.Cu
[pcbnew/Layer.In21.Cu] Type=0
Name=In21.Cu Enabled=0
Type=0 [pcbnew/Layer.In24.Cu]
Enabled=0 Name=In24.Cu
[pcbnew/Layer.In22.Cu] Type=0
Name=In22.Cu Enabled=0
Type=0 [pcbnew/Layer.In25.Cu]
Enabled=0 Name=In25.Cu
[pcbnew/Layer.In23.Cu] Type=0
Name=In23.Cu Enabled=0
Type=0 [pcbnew/Layer.In26.Cu]
Enabled=0 Name=In26.Cu
[pcbnew/Layer.In24.Cu] Type=0
Name=In24.Cu Enabled=0
Type=0 [pcbnew/Layer.In27.Cu]
Enabled=0 Name=In27.Cu
[pcbnew/Layer.In25.Cu] Type=0
Name=In25.Cu Enabled=0
Type=0 [pcbnew/Layer.In28.Cu]
Enabled=0 Name=In28.Cu
[pcbnew/Layer.In26.Cu] Type=0
Name=In26.Cu Enabled=0
Type=0 [pcbnew/Layer.In29.Cu]
Enabled=0 Name=In29.Cu
[pcbnew/Layer.In27.Cu] Type=0
Name=In27.Cu Enabled=0
Type=0 [pcbnew/Layer.In30.Cu]
Enabled=0 Name=In30.Cu
[pcbnew/Layer.In28.Cu] Type=0
Name=In28.Cu Enabled=0
Type=0 [pcbnew/Layer.B.Cu]
Enabled=0 Name=B.Cu
[pcbnew/Layer.In29.Cu] Type=0
Name=In29.Cu Enabled=1
Type=0 [pcbnew/Layer.B.Adhes]
Enabled=0 Enabled=1
[pcbnew/Layer.In30.Cu] [pcbnew/Layer.F.Adhes]
Name=In30.Cu Enabled=1
Type=0 [pcbnew/Layer.B.Paste]
Enabled=0 Enabled=1
[pcbnew/Layer.B.Cu] [pcbnew/Layer.F.Paste]
Name=B.Cu Enabled=1
Type=0 [pcbnew/Layer.B.SilkS]
Enabled=1 Enabled=1
[pcbnew/Layer.B.Adhes] [pcbnew/Layer.F.SilkS]
Enabled=1 Enabled=1
[pcbnew/Layer.F.Adhes] [pcbnew/Layer.B.Mask]
Enabled=1 Enabled=1
[pcbnew/Layer.B.Paste] [pcbnew/Layer.F.Mask]
Enabled=1 Enabled=1
[pcbnew/Layer.F.Paste] [pcbnew/Layer.Dwgs.User]
Enabled=1 Enabled=1
[pcbnew/Layer.B.SilkS] [pcbnew/Layer.Cmts.User]
Enabled=1 Enabled=1
[pcbnew/Layer.F.SilkS] [pcbnew/Layer.Eco1.User]
Enabled=1 Enabled=1
[pcbnew/Layer.B.Mask] [pcbnew/Layer.Eco2.User]
Enabled=1 Enabled=1
[pcbnew/Layer.F.Mask] [pcbnew/Layer.Edge.Cuts]
Enabled=1 Enabled=1
[pcbnew/Layer.Dwgs.User] [pcbnew/Layer.Margin]
Enabled=1 Enabled=1
[pcbnew/Layer.Cmts.User] [pcbnew/Layer.B.CrtYd]
Enabled=1 Enabled=1
[pcbnew/Layer.Eco1.User] [pcbnew/Layer.F.CrtYd]
Enabled=1 Enabled=1
[pcbnew/Layer.Eco2.User] [pcbnew/Layer.B.Fab]
Enabled=1 Enabled=1
[pcbnew/Layer.Edge.Cuts] [pcbnew/Layer.F.Fab]
Enabled=1 Enabled=1
[pcbnew/Layer.Margin] [pcbnew/Layer.Rescue]
Enabled=1 Enabled=0
[pcbnew/Layer.B.CrtYd] [pcbnew/Netclasses]
Enabled=1 [pcbnew/Netclasses/Default]
[pcbnew/Layer.F.CrtYd] Name=Default
Enabled=1 Clearance=0.0889
[pcbnew/Layer.B.Fab] TrackWidth=0.254
Enabled=1 ViaDiameter=0.45
[pcbnew/Layer.F.Fab] ViaDrill=0.25
Enabled=1 uViaDiameter=0.3
[pcbnew/Layer.Rescue] uViaDrill=0.1
Enabled=0 dPairWidth=0.127
[pcbnew/Netclasses] dPairGap=0.1016
[pcbnew/Netclasses/Default] dPairViaGap=0.25
Name=Default [pcbnew/Netclasses/1]
Clearance=0.0889 Name=Diff_In
TrackWidth=0.254 Clearance=0.0889
ViaDiameter=0.45 TrackWidth=0.1524
ViaDrill=0.25 ViaDiameter=0.8
uViaDiameter=0.3 ViaDrill=0.4
uViaDrill=0.1 uViaDiameter=0.3
dPairWidth=0.127 uViaDrill=0.1
dPairGap=0.1016 dPairWidth=0.1143
dPairViaGap=0.25 dPairGap=0.1524
[pcbnew/Netclasses/1] dPairViaGap=0.25
Name=Diff_In [pcbnew/Netclasses/2]
Clearance=0.0889 Name=Diff_Out
TrackWidth=0.1524 Clearance=0.0889
ViaDiameter=0.8 TrackWidth=0.127
ViaDrill=0.4 ViaDiameter=0.8
uViaDiameter=0.3 ViaDrill=0.4
uViaDrill=0.1 uViaDiameter=0.3
dPairWidth=0.1143 uViaDrill=0.1
dPairGap=0.1524 dPairWidth=0.127
dPairViaGap=0.25 dPairGap=0.127
[pcbnew/Netclasses/2] dPairViaGap=0.25
Name=Diff_Out [schematic_editor]
Clearance=0.0889 version=1
TrackWidth=0.127 PageLayoutDescrFile=
ViaDiameter=0.8 PlotDirectoryName=
ViaDrill=0.4 SubpartIdSeparator=0
uViaDiameter=0.3 SubpartFirstId=65
uViaDrill=0.1 NetFmtName=Pcbnew
dPairWidth=0.127 SpiceAjustPassiveValues=0
dPairGap=0.127 LabSize=50
dPairViaGap=0.25 ERC_TestSimilarLabels=1

13
update_log.txt
View File

@ -3,7 +3,14 @@ v1.0
v1.1 v1.1
-replace ice40 package with default library BGA256 -replace ice40 package with default library BGA256
-fix buck converter capacitors position -optimize buck converter capacitors position
-fix PoE schematic bug -fix PoE schematic bug
-fix silk position overlapping -optimize silk position overlapping
-optimize ENC624J600 decoupling capacitors
-optimize 12V decoupling capacitors
-optimize screw keepout hole
-add external oscillator for FPGA
-change TPS2590 resistor to change current limit (TODO)
-1.27mm headers use standard pin numbers (TODO)
-fix CPU_IO headers interferes with Analog headers
-fix MCU ADC7 and ADC6 label bug