Syrostan/libs/ENC624J600/ENC624J600.lib

EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Microchip ENC624J600-I/PT
#
DEF ENC624J600-I_PT U 0 40 Y Y 1 L N
F0 "U" 0 200 50 H V L CNN 
F1 "ENC624J600-I/PT" 0 300 50 H V L CNN 
F2 "Microchip-ENC624J600-I_PT-*" 0 400 50 H I L CNN 
F3 "http://ww1.microchip.com/downloads/en/DeviceDoc/39935c.pdf" 0 500 50 H I L CNN 
F4 "MS-026" 0 600 50 H I L CNN "Code  JEDEC"
F5 "Manufacturer URL" 0 700 50 H I L CNN "Component Link 1 Description"
F6 "http://www.microchip.com/" 0 800 50 H I L CNN "Component Link 1 URL"
F7 "Package Specification" 0 900 50 H I L CNN "Component Link 3 Description"
F8 "http://www.microchip.com/stellent/groups/techpub_sg/documents/packagingspec/en012702.pdf" 0 1000 50 H I L CNN "Component Link 3 URL"
F9 "revC, Jan-2010" 0 1100 50 H I L CNN "Datasheet Version"
F10 "64-Lead Thin Plastic Quad Flat Pack (PT) - 10x10x1mm Body, 2.00mm [TQFP]" 0 1200 50 H I L CNN "Package Description"
F11 "revBB, Aug-2009" 0 1300 50 H I L CNN "Package Version"
F12 "IC" 0 1400 50 H I L CNN "category"
F13 "963374" 0 1500 50 H I L CNN "ciiva ids"
F14 "785a2be8c985604e" 0 1600 50 H I L CNN "library id"
F15 "Microchip" 0 1700 50 H I L CNN "manufacturer"
F16 "TQFP-PT64" 0 1800 50 H I L CNN "package"
F17 "1331939240" 0 1900 50 H I L CNN "release date"
F18 "7601FC2E-46AD-4DC1-8A2C-669C8D2FD12D" 0 2000 50 H I L CNN "vault revision"
F19 "yes" 0 2100 50 H I L CNN "imported"
DRAW
X VSSOSC 1 100 -3300 100 R 40 40 1 1 W 
X OSC2 2 100 0 100 R 40 40 1 1 O 
X OSC1 3 100 -100 100 R 40 40 1 1 I 
X VDDOSC 4 2100 -3300 100 L 40 40 1 1 W 
X AD4 5 2100 -1400 100 L 40 40 1 1 B 
X AD5 6 2100 -1500 100 L 40 40 1 1 B 
X AD6 7 2100 -1600 100 L 40 40 1 1 B 
X AD7 8 2100 -1700 100 L 40 40 1 1 B 
X A5 9 100 -1400 100 R 40 40 1 1 I 
X A6 10 100 -1500 100 R 40 40 1 1 I 
X A7 11 100 -1600 100 R 40 40 1 1 I 
X A8 12 100 -1700 100 R 40 40 1 1 I 
X A9 13 100 -1800 100 R 40 40 1 1 I 
X LEDB 14 2100 -3000 100 L 40 40 1 1 O 
X LEDA 15 2100 -2900 100 L 40 40 1 1 O 
X RBIAS 16 2100 -800 100 L 40 40 1 1 I 
X PSPCFG2 17 100 -2500 100 R 40 40 1 1 I 
X PSPCFG3 18 100 -2600 100 R 40 40 1 1 I 
X A10 19 100 -1900 100 R 40 40 1 1 I 
X A11 20 100 -2000 100 R 40 40 1 1 I 
X VDD 21 2100 -3400 100 L 40 40 1 1 W 
X VDDPLL 22 2100 -3500 100 L 40 40 1 1 W 
X VSSPLL 23 100 -3400 100 R 40 40 1 1 W 
X VSSRX 24 100 -3500 100 R 40 40 1 1 W 
X VDDRX 25 2100 -3600 100 L 40 40 1 1 W 
X TPIN+ 26 2100 -200 100 L 40 40 1 1 I 
X TPIN- 27 2100 -300 100 L 40 40 1 1 I 
X VDDTX 28 2100 -3700 100 L 40 40 1 1 W 
X VSSTX 29 100 -3600 100 R 40 40 1 1 W 
X TPOUT+ 30 2100 -500 100 L 40 40 1 1 O 
X TPOUT- 31 2100 -600 100 L 40 40 1 1 O 
X VSSTX 32 100 -3700 100 R 40 40 1 1 W 
X CLKOUT 33 2100 0 100 L 40 40 1 1 O 
X ~INT~/SPISEL 34 2100 -2700 100 L 40 40 1 1 B 
X AD8 35 2100 -1800 100 L 40 40 1 1 B 
X AD9 36 2100 -1900 100 L 40 40 1 1 B 
X AD10 37 2100 -2000 100 L 40 40 1 1 B 
X AD11 38 2100 -2100 100 L 40 40 1 1 B 
X AD12 39 2100 -2200 100 L 40 40 1 1 B 
X AD13 40 2100 -2300 100 L 40 40 1 1 B 
X AD14 41 2100 -2400 100 L 40 40 1 1 B 
X AD15 42 2100 -2500 100 L 40 40 1 1 B 
X A12 43 100 -2100 100 R 40 40 1 1 I 
X A13 44 100 -2200 100 R 40 40 1 1 I 
X A14/PSPCFG1 45 100 -2300 100 R 40 40 1 1 I 
X VSS 46 100 -3800 100 R 40 40 1 1 W 
X VDD 47 2100 -3800 100 L 40 40 1 1 W 
X B1SEL/WRH 48 100 -3000 100 R 40 40 1 1 I 
X ~CS~/CS 49 100 -300 100 R 40 40 1 1 I 
X B0SEL/EN/SO/WR/WRL 50 100 -2800 100 R 40 40 1 1 B 
X ~W~/SI 51 100 -700 100 R 40 40 1 1 I 
X SCK/AL/PSPCFG4 52 100 -500 100 R 40 40 1 1 I 
X AD0 53 2100 -1000 100 L 40 40 1 1 B 
X AD1 54 2100 -1100 100 L 40 40 1 1 B 
X AD2 55 2100 -1200 100 L 40 40 1 1 B 
X AD3 56 2100 -1300 100 L 40 40 1 1 B 
X A0 57 100 -900 100 R 40 40 1 1 I 
X A1 58 100 -1000 100 R 40 40 1 1 I 
X A2 59 100 -1100 100 R 40 40 1 1 I 
X A3 60 100 -1200 100 R 40 40 1 1 I 
X A4 61 100 -1300 100 R 40 40 1 1 I 
X VSS 62 100 -3900 100 R 40 40 1 1 W 
X VCAP 63 2100 -3200 100 L 40 40 1 1 W 
X VDD 64 2100 -3900 100 L 40 40 1 1 W 
S 200 100 2000 -4000 1 1 0 f
ENDDRAW
ENDDEF
#
# End Library