Syrostan/update_log.txt

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v1.0
-first production version
v1.1
-replace ice40 package with default library BGA256
2021-08-31 17:36:44 +08:00
-optimize buck converter capacitors position
-fix PoE schematic bug
2021-08-31 17:36:44 +08:00
-optimize silk position overlapping
-optimize ENC624J600 decoupling capacitors
-optimize 12V decoupling capacitors
-optimize screw keepout hole
-add external oscillator for FPGA
-change TPS2590 resistor to change current limit (TODO)
-1.27mm headers use standard pin numbers (TODO)
-fix CPU_IO headers interferes with Analog headers
-fix MCU ADC7 and ADC6 label bug