module top (
            HW_CLK,
            LED,
            KEY,
            ADC_CLK,
            ADC_DAT,
            FSMC_CLK,
            FSMC_ADD,
            FSMC_DAT,
            FSMC_NL,
            FSMC_NWAIT,
            FSMC_NOE,
            FSMC_NWE,
            FSMC_NBL,
            FSMC_NE1
        );

    /* I/O */
    input HW_CLK;
    input KEY;
    output LED;

    input FSMC_NL;
    input FSMC_NWAIT;
    input FSMC_NOE;
    input FSMC_NWE;
    input FSMC_NE1;
    input [1:0]FSMC_NBL;
    input FSMC_CLK;
    input [7:0]FSMC_ADD;
    output [15:0]FSMC_DAT;

    output ADC_CLK;
    input [7:0]ADC_DAT;

    reg [7:0] adc_result = 8'b0;
    
    /* Counter register */
    reg [31:0] counter = 32'b0;
    /* LED drivers */
    assign LED = counter[24];
    // assign LED = ~KEY;

    /* always */
    always @ (posedge HW_CLK) begin
        counter <= counter + 1;
        
        FSMC_DAT = 200;
        
        ADC_CLK = ~ADC_CLK;
    end

    always @ (posedge ADC_CLK) begin
        adc_result = ADC_DAT;

        // FSMC_DAT = 200;
    end

endmodule