mikelam cf76348432 EEM output working		2022-01-22 17:50:49 +08:00
.vscode	EEM output working	2022-01-22 17:50:49 +08:00
Core	EEM output working	2022-01-22 17:50:49 +08:00
Drivers	HSADC working (under 25MHz clock); FSMC working; make file can generate fpga bitstram as C array	2021-12-26 16:53:27 +08:00
FPGA	EEM output working	2022-01-22 17:50:49 +08:00
.gitignore	add ethernet controller spi driver	2021-07-27 09:58:57 +08:00
.mxproject	use software FSMC to avoid FPGA strange inout issue	2022-01-09 20:30:28 +08:00
fpga.nix	change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch	2021-08-31 17:38:28 +08:00
Makefile	use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)	2022-01-15 19:38:30 +08:00
plot_adc.py	EEM output working	2022-01-22 17:50:49 +08:00
startup_stm32f103xg.s	change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch	2021-08-31 17:38:28 +08:00
STM32F103VFTx_FLASH.ld	change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch	2021-08-31 17:38:28 +08:00
Syrostan-C.jdebug	change to STM32F103VFT6; add ADC and SW/LED IO labels; simple testing for 5V GND MOS switch	2021-08-31 17:38:28 +08:00
Syrostan-C.jdebug.user	EEM output working	2022-01-22 17:50:49 +08:00
Syrostan-MCU-C.ioc	FPGA BRAM working	2022-01-15 15:54:47 +08:00