71 lines
2.4 KiB
C
71 lines
2.4 KiB
C
#include "fpga.h"
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#include "fpga_bin.h"
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#include "string.h"
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// A public method to flash iCE40 FPGA on Humpback
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void flash_fpga()
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{
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// Data buffer setup
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uint8_t dummy_bytes[13];
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memset(dummy_bytes, 0, 13);
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// Drive CRESET_B low
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HAL_GPIO_WritePin(FPGA_CRESET_GPIO_Port, FPGA_CRESET_Pin, GPIO_PIN_RESET);
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// Drive SPI_SS_B low
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HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_RESET);
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// Wait at least 200ns
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HAL_Delay(5);
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// Drive CRESET_B high
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HAL_GPIO_WritePin(FPGA_CRESET_GPIO_Port, FPGA_CRESET_Pin, GPIO_PIN_SET);
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// Wait at least another 1200us to clear internal config memory
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HAL_Delay(5);
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// Before data transmission starts, check if C_DONE is truly low
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// If C_DONE is high, the FPGA reset procedure is unsuccessful
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while (HAL_GPIO_ReadPin(FPGA_CDONE_GPIO_Port, FPGA_CDONE_Pin) == GPIO_PIN_SET);
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// Set SPI_SS_B high
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HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_SET);
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// Send 8 dummy clock, effectively 1 byte of 0x00
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HAL_SPI_Transmit(&hspi1, dummy_bytes, 1, 1000);
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// Drive SPI_SS_B low
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HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_RESET);
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// Send the whole image without interruption
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for (uint16_t i = 0; i < 1351U; i++)
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{
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HAL_SPI_Transmit(&hspi1, (uint8_t *)__build_syrostan_fpga_bin+100*i, 100, HAL_MAX_DELAY-1);
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}
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// HAL_SPI_Transmit(&hspi1, (uint8_t *)__build_syrostan_fpga_bin, 65535U, HAL_MAX_DELAY-1);
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// HAL_SPI_Transmit(&hspi1, (uint8_t *)&__build_syrostan_fpga_bin[65535U], 65535U, HAL_MAX_DELAY-1);
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// HAL_SPI_Transmit(&hspi1, (uint8_t *)&__build_syrostan_fpga_bin[131070UL], 4030U, HAL_MAX_DELAY-1);
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// Drive SPI_SS_B high
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HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_SET);
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// Send at another 100 dummy clocks (choosing 13 bytes)
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HAL_SPI_Transmit(&hspi1, dummy_bytes, 13, 1000);
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// Check the CDONE output from FPGA
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// CDONE needs to be high
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while (HAL_GPIO_ReadPin(FPGA_CDONE_GPIO_Port, FPGA_CDONE_Pin) == GPIO_PIN_RESET);
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// Send at least another 49 clock cycles to activate IO pins (choosing same 13 bytes)
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HAL_SPI_Transmit(&hspi1, dummy_bytes, 13, 1000);
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}
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void read_fsmc( uint16_t address, uint8_t *fsmc_dat)
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{
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uint32_t fsmc_add = 0x60000000 + address;
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*fsmc_dat = (*(__IO uint16_t *)(fsmc_add));
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// HAL_SRAM_Read_8b(&hsram1, (uint32_t*)&fsmc_add, fsmc_dat, 1);
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}
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