#include "ethernet.h"
#include "spi.h"


void ethernet_spi_1_byte(uint8_t spi_cmd)
{
    HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
    HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
    HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
}

void ethernet_spi_2_byte(uint8_t spi_cmd, uint8_t *spi_data)
{
    ethernet_spi_n_byte_banked(ENC_SPI_READ, spi_cmd, spi_data, 1);
}

void ethernet_spi_3_byte(enc_spi_operate_type_t type, uint8_t spi_cmd, uint8_t *spi_data)
{
    ethernet_spi_n_byte_banked(type, spi_cmd, spi_data, 2);
}

void ethernet_spi_n_byte_banked(enc_spi_operate_type_t type, uint8_t spi_cmd, uint8_t *spi_data, uint8_t n)
{
    switch (type)
    {
    case ENC_SPI_WRITE:
        HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
        HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
        HAL_SPI_Transmit(&hspi1, spi_data, n, 100);
        HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
        break;
    
    case ENC_SPI_READ:
        HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
        HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
        HAL_SPI_Receive(&hspi1, spi_data, n, 100);
        HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
        break;

    default:
        break;
    }
}

void ethernet_init()
{
    HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
    uint8_t spi_dummy_data = 0x00;
    HAL_SPI_Transmit(&hspi1, &spi_dummy_data, 1, 100); //dummy transmition to make the clock low

    uint16_t spi_test_data = 0;
    ethernet_spi_1_byte(ENC_CMD_BxSEL(0));
    // HAL_Delay(1);
    // ethernet_spi_2_byte(ENC_CMD_RBSEL, (uint8_t*)&spi_test_data);
    // while(spi_test_data != 0);

    spi_test_data = 1234U;
    ethernet_spi_n_byte_banked(ENC_SPI_WRITE, ENC_CMD_WCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
    HAL_Delay(1);
    spi_test_data = 0;
    ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_RCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
    while(spi_test_data != 1234U);

    // do
    // {
    //     ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_WCR(0x1A), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
    //     HAL_Delay(1);
    // }
    // while((spi_test_data & (0x0001 << 12U)) == 0x0000);

    ethernet_spi_1_byte(ENC_CMD_RESET);
    HAL_Delay(1);
    ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_RCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
    while(spi_test_data != 0x0000);
    HAL_Delay(1);
}