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use software FSMC to avoid FPGA strange inout issue

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This commit is contained in:
mikelam 2022-01-09 20:30:28 +08:00
parent 32098c89ae
commit fe0d520b28
36 changed files with 7370 additions and 7218 deletions
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@ -1,5 +1,5 @@
[PreviousLibFiles]
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm1.h;
LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xg.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/cmsis_iccarm.h;Drivers/CMSIS/Include/core_cm33.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/mpu_armv8.h;Drivers/CMSIS/Include/mpu_armv7.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/cmsis_armclang.h;Drivers/CMSIS/Include/core_armv8mml.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/tz_context.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_version.h;Drivers/CMSIS/Include/core_armv8mbl.h;Drivers/CMSIS/Include/cmsis_compiler.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cm23.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/core_cm1.h;
[PreviousUsedIarFiles]
SourceFiles=../Core/Src/main.c;../Core/Src/stm32f1xx_it.c;../Core/Src/stm32f1xx_hal_msp.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Core/Src/system_stm32f1xx.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;../Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;../Core/Src/system_stm32f1xx.c;../Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;
@ -7,41 +7,39 @@ HeaderPath=../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/I
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousUsedMakefileFiles]
SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/adc.c;Core/Src/dac.c;Core/Src/dma.c;Core/Src/fsmc.c;Core/Src/i2c.c;Core/Src/spi.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;;;
SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/adc.c;Core/Src/dac.c;Core/Src/dma.c;Core/Src/i2c.c;Core/Src/spi.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Core/Src/system_stm32f1xx.c;;;
HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Core/Inc;
CDefines=USE_HAL_DRIVER;STM32F103xG;USE_HAL_DRIVER;USE_HAL_DRIVER;
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5
.vscode/settings.json vendored
View File

@ -8,6 +8,9 @@
"fpga.h": "c",
"stdio.h": "c",
"fpga_bin.h": "c",
"stdlib.h": "c"
"stdlib.h": "c",
"gpio.h": "c",
"stm32f1xx_hal.h": "c",
"stm32f1xx_hal_conf.h": "c"
}
}

13058
Core/Inc/User/fpga_bin.h
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File diff suppressed because it is too large Load Diff

2
Core/Inc/User/user_main.h
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@ -10,7 +10,7 @@
#include "ethernet.h"
#include "power.h"
#include "fpga.h"
#include "fsmc.h"
// #include "fsmc.h"
#include "test_logic.h"
void user_setup();

14
Core/Inc/adc.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __ADC_H__
#define __ADC_H__
@ -49,4 +50,3 @@ void MX_ADC1_Init(void);
#endif /* __ADC_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/dac.h
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@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dac.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DAC_H__
#define __DAC_H__
@ -49,4 +50,3 @@ void MX_DAC_Init(void);
#endif /* __DAC_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/dma.h
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@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DMA_H__
#define __DMA_H__
@ -49,4 +50,3 @@ void MX_DMA_Init(void);
#endif /* __DMA_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

60
Core/Inc/fsmc.h
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@ -1,60 +0,0 @@
/**
******************************************************************************
* File Name : FSMC.h
* Description : This file provides code for the configuration
* of the FSMC peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __FSMC_H
#define __FSMC_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
extern SRAM_HandleTypeDef hsram1;
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_FSMC_Init(void);
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram);
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /*__FSMC_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/gpio.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __GPIO_H__
#define __GPIO_H__
@ -46,4 +47,3 @@ void MX_GPIO_Init(void);
#endif
#endif /*__ GPIO_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/i2c.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __I2C_H__
#define __I2C_H__
@ -51,4 +52,3 @@ void MX_I2C2_Init(void);
#endif /* __I2C_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

64
Core/Inc/main.h
View File

@ -58,6 +58,16 @@ void Error_Handler(void);
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
#define FSMC_A15_Pin GPIO_PIN_2
#define FSMC_A15_GPIO_Port GPIOE
#define FSMC_A11_Pin GPIO_PIN_3
#define FSMC_A11_GPIO_Port GPIOE
#define FSMC_A12_Pin GPIO_PIN_4
#define FSMC_A12_GPIO_Port GPIOE
#define FSMC_A13_Pin GPIO_PIN_5
#define FSMC_A13_GPIO_Port GPIOE
#define FSMC_A14_Pin GPIO_PIN_6
#define FSMC_A14_GPIO_Port GPIOE
#define SPI_ENC_CS_Pin GPIO_PIN_13
#define SPI_ENC_CS_GPIO_Port GPIOC
#define LED_Pin GPIO_PIN_0
@ -67,8 +77,42 @@ void Error_Handler(void);
#define EEM_POWER_FAULT_Pin GPIO_PIN_2
#define EEM_POWER_FAULT_GPIO_Port GPIOB
#define EEM_POWER_FAULT_EXTI_IRQn EXTI2_IRQn
#define FSMC_D4_Pin GPIO_PIN_7
#define FSMC_D4_GPIO_Port GPIOE
#define FSMC_D5_Pin GPIO_PIN_8
#define FSMC_D5_GPIO_Port GPIOE
#define FSMC_D6_Pin GPIO_PIN_9
#define FSMC_D6_GPIO_Port GPIOE
#define FSMC_D7_Pin GPIO_PIN_10
#define FSMC_D7_GPIO_Port GPIOE
#define FSMC_A0_Pin GPIO_PIN_11
#define FSMC_A0_GPIO_Port GPIOE
#define FSMC_A1_Pin GPIO_PIN_12
#define FSMC_A1_GPIO_Port GPIOE
#define FSMC_A2_Pin GPIO_PIN_13
#define FSMC_A2_GPIO_Port GPIOE
#define FSMC_A3_Pin GPIO_PIN_14
#define FSMC_A3_GPIO_Port GPIOE
#define FSMC_A4_Pin GPIO_PIN_15
#define FSMC_A4_GPIO_Port GPIOE
#define SW3_Pin GPIO_PIN_12
#define SW3_GPIO_Port GPIOB
#define FSMC_A5_Pin GPIO_PIN_8
#define FSMC_A5_GPIO_Port GPIOD
#define FSMC_A6_Pin GPIO_PIN_9
#define FSMC_A6_GPIO_Port GPIOD
#define FSMC_A7_Pin GPIO_PIN_10
#define FSMC_A7_GPIO_Port GPIOD
#define FSMC_A8_Pin GPIO_PIN_11
#define FSMC_A8_GPIO_Port GPIOD
#define FSMC_A9_Pin GPIO_PIN_12
#define FSMC_A9_GPIO_Port GPIOD
#define FSMC_A10_Pin GPIO_PIN_13
#define FSMC_A10_GPIO_Port GPIOD
#define FSMC_D0_Pin GPIO_PIN_14
#define FSMC_D0_GPIO_Port GPIOD
#define FSMC_D1_Pin GPIO_PIN_15
#define FSMC_D1_GPIO_Port GPIOD
#define SW4_Pin GPIO_PIN_6
#define SW4_GPIO_Port GPIOC
#define SW5_Pin GPIO_PIN_7
@ -87,16 +131,18 @@ void Error_Handler(void);
#define FPGA_CRESET_GPIO_Port GPIOA
#define SPI_FPGA_CS_Pin GPIO_PIN_15
#define SPI_FPGA_CS_GPIO_Port GPIOA
#define DIO_IO_Pin GPIO_PIN_3
#define DIO_IO_GPIO_Port GPIOD
#define DIO_CH_SEL2_Pin GPIO_PIN_6
#define DIO_CH_SEL2_GPIO_Port GPIOD
#define FSMC_D2_Pin GPIO_PIN_0
#define FSMC_D2_GPIO_Port GPIOD
#define FSMC_D3_Pin GPIO_PIN_1
#define FSMC_D3_GPIO_Port GPIOD
#define FSMC_NOE_Pin GPIO_PIN_4
#define FSMC_NOE_GPIO_Port GPIOD
#define FSMC_NWE_Pin GPIO_PIN_5
#define FSMC_NWE_GPIO_Port GPIOD
#define FSMC_NE1_Pin GPIO_PIN_7
#define FSMC_NE1_GPIO_Port GPIOD
#define EEM_POWER_SW_Pin GPIO_PIN_6
#define EEM_POWER_SW_GPIO_Port GPIOB
#define DIO_CH_SEL0_Pin GPIO_PIN_0
#define DIO_CH_SEL0_GPIO_Port GPIOE
#define DIO_CH_SEL1_Pin GPIO_PIN_1
#define DIO_CH_SEL1_GPIO_Port GPIOE
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
@ -106,5 +152,3 @@ void Error_Handler(void);
#endif
#endif /* __MAIN_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/spi.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file spi.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __SPI_H__
#define __SPI_H__
@ -49,4 +50,3 @@ void MX_SPI1_Init(void);
#endif /* __SPI_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Inc/stm32f1xx_hal_conf.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_hal_conf.h
@ -5,16 +6,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_HAL_CONF_H
@ -62,7 +63,7 @@
/*#define HAL_SDRAM_MODULE_ENABLED */
/*#define HAL_SMARTCARD_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
#define HAL_SRAM_MODULE_ENABLED
/*#define HAL_SRAM_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
/*#define HAL_USART_MODULE_ENABLED */
@ -388,4 +389,3 @@ void assert_failed(uint8_t* file, uint32_t line);
#endif /* __STM32F1xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

2
Core/Inc/stm32f1xx_it.h
View File

@ -68,5 +68,3 @@ void TIM4_IRQHandler(void);
#endif
#endif /* __STM32F1xx_IT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/tim.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file tim.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __TIM_H__
#define __TIM_H__
@ -51,4 +52,3 @@ void MX_TIM4_Init(void);
#endif /* __TIM_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Inc/usart.h
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.h
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USART_H__
#define __USART_H__
@ -49,4 +50,3 @@ void MX_UART4_Init(void);
#endif /* __USART_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

100
Core/Src/User/fpga.c
View File

@ -63,19 +63,101 @@ void flash_fpga()
void fsmc_read(uint16_t address, uint8_t *dat)
{
uint32_t fsmc_add = 0x60000000 | (address << 8);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_RESET);
// uint32_t fsmc_add = 0x60000000 | (address << 8);
// *dat = (*(__IO uint32_t *)(fsmc_add));
HAL_GPIO_WritePin(FSMC_A0_GPIO_Port, FSMC_A0_Pin, (address >> 0) & 0x0001);
HAL_GPIO_WritePin(FSMC_A1_GPIO_Port, FSMC_A1_Pin, (address >> 1) & 0x0001);
HAL_GPIO_WritePin(FSMC_A2_GPIO_Port, FSMC_A2_Pin, (address >> 2) & 0x0001);
HAL_GPIO_WritePin(FSMC_A3_GPIO_Port, FSMC_A3_Pin, (address >> 3) & 0x0001);
HAL_GPIO_WritePin(FSMC_A4_GPIO_Port, FSMC_A4_Pin, (address >> 4) & 0x0001);
HAL_GPIO_WritePin(FSMC_A5_GPIO_Port, FSMC_A5_Pin, (address >> 5) & 0x0001);
HAL_GPIO_WritePin(FSMC_A6_GPIO_Port, FSMC_A6_Pin, (address >> 6) & 0x0001);
HAL_GPIO_WritePin(FSMC_A7_GPIO_Port, FSMC_A7_Pin, (address >> 7) & 0x0001);
HAL_GPIO_WritePin(FSMC_A8_GPIO_Port, FSMC_A8_Pin, (address >> 8) & 0x0001);
HAL_GPIO_WritePin(FSMC_A9_GPIO_Port, FSMC_A9_Pin, (address >> 9) & 0x0001);
HAL_GPIO_WritePin(FSMC_A10_GPIO_Port, FSMC_A10_Pin, (address >> 10) & 0x0001);
HAL_GPIO_WritePin(FSMC_A11_GPIO_Port, FSMC_A11_Pin, (address >> 11) & 0x0001);
HAL_GPIO_WritePin(FSMC_A12_GPIO_Port, FSMC_A12_Pin, (address >> 12) & 0x0001);
HAL_GPIO_WritePin(FSMC_A13_GPIO_Port, FSMC_A13_Pin, (address >> 13) & 0x0001);
HAL_GPIO_WritePin(FSMC_A14_GPIO_Port, FSMC_A14_Pin, (address >> 14) & 0x0001);
HAL_GPIO_WritePin(FSMC_A15_GPIO_Port, FSMC_A15_Pin, (address >> 15) & 0x0001);
*dat = (*(__IO uint8_t *)(fsmc_add));
// HAL_GPIO_WritePin(FSMC_NRE_GPIO_Port, FSMC_NRE_Pin, GPIO_PIN_RESET);
// HAL_GPIO_WritePin(FSMC_NRE_GPIO_Port, FSMC_NRE_Pin, GPIO_PIN_SET);
// HAL_SRAM_Read_8b(&hsram1, (uint32_t*)&fsmc_add, dat, 1);
GPIO_InitTypeDef GPIO_InitStruct = {0};
GPIO_InitStruct.Pin = FSMC_D0_Pin|FSMC_D1_Pin|FSMC_D2_Pin|FSMC_D3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.Pin = FSMC_D4_Pin|FSMC_D5_Pin|FSMC_D6_Pin|FSMC_D7_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
*dat = 0x00;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D0_GPIO_Port, FSMC_D0_Pin) << 0;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D1_GPIO_Port, FSMC_D1_Pin) << 1;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D2_GPIO_Port, FSMC_D2_Pin) << 2;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D3_GPIO_Port, FSMC_D3_Pin) << 3;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D4_GPIO_Port, FSMC_D4_Pin) << 4;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D5_GPIO_Port, FSMC_D5_Pin) << 5;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D6_GPIO_Port, FSMC_D6_Pin) << 6;
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D7_GPIO_Port, FSMC_D7_Pin) << 7;
HAL_GPIO_WritePin(FSMC_NOE_GPIO_Port, FSMC_NOE_Pin, GPIO_PIN_RESET);
HAL_Delay(1);
HAL_GPIO_WritePin(FSMC_NOE_GPIO_Port, FSMC_NOE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_SET);
}
void fsmc_write(uint16_t address, uint8_t dat)
{
// HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_RESET);
uint32_t fsmc_add = 0x60000000 | (address << 8);
// HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_RESET);
// uint32_t fsmc_add = 0x60000000 | (address << 8);
// (*(__IO uint32_t *)(fsmc_add)) = dat;
HAL_GPIO_WritePin(FSMC_A0_GPIO_Port, FSMC_A0_Pin, (address >> 0) & 0x0001);
HAL_GPIO_WritePin(FSMC_A1_GPIO_Port, FSMC_A1_Pin, (address >> 1) & 0x0001);
HAL_GPIO_WritePin(FSMC_A2_GPIO_Port, FSMC_A2_Pin, (address >> 2) & 0x0001);
HAL_GPIO_WritePin(FSMC_A3_GPIO_Port, FSMC_A3_Pin, (address >> 3) & 0x0001);
HAL_GPIO_WritePin(FSMC_A4_GPIO_Port, FSMC_A4_Pin, (address >> 4) & 0x0001);
HAL_GPIO_WritePin(FSMC_A5_GPIO_Port, FSMC_A5_Pin, (address >> 5) & 0x0001);
HAL_GPIO_WritePin(FSMC_A6_GPIO_Port, FSMC_A6_Pin, (address >> 6) & 0x0001);
HAL_GPIO_WritePin(FSMC_A7_GPIO_Port, FSMC_A7_Pin, (address >> 7) & 0x0001);
HAL_GPIO_WritePin(FSMC_A8_GPIO_Port, FSMC_A8_Pin, (address >> 8) & 0x0001);
HAL_GPIO_WritePin(FSMC_A9_GPIO_Port, FSMC_A9_Pin, (address >> 9) & 0x0001);
HAL_GPIO_WritePin(FSMC_A10_GPIO_Port, FSMC_A10_Pin, (address >> 10) & 0x0001);
HAL_GPIO_WritePin(FSMC_A11_GPIO_Port, FSMC_A11_Pin, (address >> 11) & 0x0001);
HAL_GPIO_WritePin(FSMC_A12_GPIO_Port, FSMC_A12_Pin, (address >> 12) & 0x0001);
HAL_GPIO_WritePin(FSMC_A13_GPIO_Port, FSMC_A13_Pin, (address >> 13) & 0x0001);
HAL_GPIO_WritePin(FSMC_A14_GPIO_Port, FSMC_A14_Pin, (address >> 14) & 0x0001);
HAL_GPIO_WritePin(FSMC_A15_GPIO_Port, FSMC_A15_Pin, (address >> 15) & 0x0001);
(*(__IO uint8_t *)(fsmc_add)) = dat;
GPIO_InitTypeDef GPIO_InitStruct = {0};
GPIO_InitStruct.Pin = FSMC_D0_Pin|FSMC_D1_Pin|FSMC_D2_Pin|FSMC_D3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
GPIO_InitStruct.Pin = FSMC_D4_Pin|FSMC_D5_Pin|FSMC_D6_Pin|FSMC_D7_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
HAL_GPIO_WritePin(FSMC_D0_GPIO_Port, FSMC_D0_Pin, (dat >> 0) & 0x01);
HAL_GPIO_WritePin(FSMC_D1_GPIO_Port, FSMC_D1_Pin, (dat >> 1) & 0x01);
HAL_GPIO_WritePin(FSMC_D2_GPIO_Port, FSMC_D2_Pin, (dat >> 2) & 0x01);
HAL_GPIO_WritePin(FSMC_D3_GPIO_Port, FSMC_D3_Pin, (dat >> 3) & 0x01);
HAL_GPIO_WritePin(FSMC_D4_GPIO_Port, FSMC_D4_Pin, (dat >> 4) & 0x01);
HAL_GPIO_WritePin(FSMC_D5_GPIO_Port, FSMC_D5_Pin, (dat >> 5) & 0x01);
HAL_GPIO_WritePin(FSMC_D6_GPIO_Port, FSMC_D6_Pin, (dat >> 6) & 0x01);
HAL_GPIO_WritePin(FSMC_D7_GPIO_Port, FSMC_D7_Pin, (dat >> 7) & 0x01);
HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_RESET);
HAL_Delay(1);
HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_SET);
}

43
Core/Src/User/user_main.c
View File

@ -1,7 +1,9 @@
#include "user_main.h"
int8_t fsmc_buf;
uint8_t gpio_buf[16];
#define ADC_SAMPLE_NUM 100
uint8_t fsmc_read_buf, fsmc_write_buf;
int8_t adc_result[ADC_SAMPLE_NUM];
void user_setup()
{
@ -16,26 +18,27 @@ void user_setup()
uint8_t dio_ch = 0;
uint8_t dio_io = 0;
uint8_t adc_sample = 0;
void user_loop()
{
// fsmc_read(0, (uint8_t*)&fsmc_buf);
// gpio_buf[0] = HAL_GPIO_ReadPin(GPIOE, GPIO_PIN_11);
// gpio_buf[1] = HAL_GPIO_ReadPin(GPIOE, GPIO_PIN_12);
// gpio_buf[2] = HAL_GPIO_ReadPin(GPIOE, GPIO_PIN_13);
// gpio_buf[3] = HAL_GPIO_ReadPin(GPIOE, GPIO_PIN_14);
// gpio_buf[4] = HAL_GPIO_ReadPin(GPIOE, GPIO_PIN_15);
static uint16_t i = 0;
i++;
fsmc_read(i, (uint8_t*)&fsmc_buf);
HAL_Delay(1000);
// fsmc_write(i, 0b00001111);
if (adc_sample)
{
adc_sample = 0;
fsmc_write_buf = (dio_io & 0x01) | ((dio_ch & 0x03) << 1) | 0x10;
fsmc_write(fsmc_write_buf, 0);
}
fsmc_read(0xffff, (uint8_t*)&fsmc_read_buf);
if (fsmc_read_buf & 0x02)
{
fsmc_write_buf = (dio_io & 0x01) | ((dio_ch & 0x03) << 1);
fsmc_write(fsmc_write_buf, 0);
uint16_t add = 0;
while (add < ADC_SAMPLE_NUM)
{
fsmc_read(add, (uint8_t*)(adc_result + add));
add++;
}
}
// HAL_Delay(1000);
key_events();
HAL_GPIO_WritePin(DIO_CH_SEL0_GPIO_Port, DIO_CH_SEL0_Pin, (dio_ch >> 0) & 0x01);
HAL_GPIO_WritePin(DIO_CH_SEL1_GPIO_Port, DIO_CH_SEL1_Pin, (dio_ch >> 1) & 0x01);
HAL_GPIO_WritePin(DIO_CH_SEL2_GPIO_Port, DIO_CH_SEL2_Pin, (dio_ch >> 2) & 0x01);
HAL_GPIO_WritePin(DIO_IO_GPIO_Port, DIO_IO_Pin, dio_io);
}

16
Core/Src/adc.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
@ -246,5 +246,3 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/dac.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dac.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "dac.h"
@ -119,5 +119,3 @@ void HAL_DAC_MspDeInit(DAC_HandleTypeDef* dacHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

14
Core/Src/dma.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file dma.c
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
@ -52,4 +53,3 @@ void MX_DMA_Init(void)
/* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

239
Core/Src/fsmc.c
View File

@ -1,239 +0,0 @@
/**
******************************************************************************
* File Name : FSMC.c
* Description : This file provides code for the configuration
* of the FSMC peripheral.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "fsmc.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
SRAM_HandleTypeDef hsram1;
/* FSMC initialization function */
void MX_FSMC_Init(void)
{
/* USER CODE BEGIN FSMC_Init 0 */
/* USER CODE END FSMC_Init 0 */
FSMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FSMC_Init 1 */
/* USER CODE END FSMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FSMC_NORSRAM_DEVICE;
hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FSMC_NORSRAM_BANK1;
hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_ENABLE;
hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_PSRAM;
hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_8;
hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FSMC_WRITE_BURST_DISABLE;
/* Timing */
Timing.AddressSetupTime = 15;
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 255;
Timing.BusTurnAroundDuration = 15;
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FSMC_ACCESS_MODE_A;
/* ExtTiming */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
Error_Handler( );
}
/** Disconnect NADV
*/
__HAL_AFIO_FSMCNADV_DISCONNECTED();
/* USER CODE BEGIN FSMC_Init 2 */
/* USER CODE END FSMC_Init 2 */
}
static uint32_t FSMC_Initialized = 0;
static void HAL_FSMC_MspInit(void){
/* USER CODE BEGIN FSMC_MspInit 0 */
/* USER CODE END FSMC_MspInit 0 */
GPIO_InitTypeDef GPIO_InitStruct = {0};
if (FSMC_Initialized) {
return;
}
FSMC_Initialized = 1;
/* Peripheral clock enable */
__HAL_RCC_FSMC_CLK_ENABLE();
/** FSMC GPIO Configuration
PE2 ------> FSMC_A23
PE3 ------> FSMC_A19
PE4 ------> FSMC_A20
PE5 ------> FSMC_A21
PE6 ------> FSMC_A22
PE7 ------> FSMC_DA4
PE8 ------> FSMC_DA5
PE9 ------> FSMC_DA6
PE10 ------> FSMC_DA7
PE11 ------> FSMC_DA8
PE12 ------> FSMC_DA9
PE13 ------> FSMC_DA10
PE14 ------> FSMC_DA11
PE15 ------> FSMC_DA12
PD8 ------> FSMC_DA13
PD9 ------> FSMC_DA14
PD10 ------> FSMC_DA15
PD11 ------> FSMC_A16
PD12 ------> FSMC_A17
PD13 ------> FSMC_A18
PD14 ------> FSMC_DA0
PD15 ------> FSMC_DA1
PD0 ------> FSMC_DA2
PD1 ------> FSMC_DA3
PD4 ------> FSMC_NOE
PD5 ------> FSMC_NWE
PD7 ------> FSMC_NE1
*/
/* GPIO_InitStruct */
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* GPIO_InitStruct */
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/* USER CODE BEGIN FSMC_MspInit 1 */
/* USER CODE END FSMC_MspInit 1 */
}
void HAL_SRAM_MspInit(SRAM_HandleTypeDef* sramHandle){
/* USER CODE BEGIN SRAM_MspInit 0 */
/* USER CODE END SRAM_MspInit 0 */
HAL_FSMC_MspInit();
/* USER CODE BEGIN SRAM_MspInit 1 */
/* USER CODE END SRAM_MspInit 1 */
}
static uint32_t FSMC_DeInitialized = 0;
static void HAL_FSMC_MspDeInit(void){
/* USER CODE BEGIN FSMC_MspDeInit 0 */
/* USER CODE END FSMC_MspDeInit 0 */
if (FSMC_DeInitialized) {
return;
}
FSMC_DeInitialized = 1;
/* Peripheral clock enable */
__HAL_RCC_FSMC_CLK_DISABLE();
/** FSMC GPIO Configuration
PE2 ------> FSMC_A23
PE3 ------> FSMC_A19
PE4 ------> FSMC_A20
PE5 ------> FSMC_A21
PE6 ------> FSMC_A22
PE7 ------> FSMC_DA4
PE8 ------> FSMC_DA5
PE9 ------> FSMC_DA6
PE10 ------> FSMC_DA7
PE11 ------> FSMC_DA8
PE12 ------> FSMC_DA9
PE13 ------> FSMC_DA10
PE14 ------> FSMC_DA11
PE15 ------> FSMC_DA12
PD8 ------> FSMC_DA13
PD9 ------> FSMC_DA14
PD10 ------> FSMC_DA15
PD11 ------> FSMC_A16
PD12 ------> FSMC_A17
PD13 ------> FSMC_A18
PD14 ------> FSMC_DA0
PD15 ------> FSMC_DA1
PD0 ------> FSMC_DA2
PD1 ------> FSMC_DA3
PD4 ------> FSMC_NOE
PD5 ------> FSMC_NWE
PD7 ------> FSMC_NE1
*/
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
|GPIO_PIN_14|GPIO_PIN_15);
HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
|GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5
|GPIO_PIN_7);
/* USER CODE BEGIN FSMC_MspDeInit 1 */
/* USER CODE END FSMC_MspDeInit 1 */
}
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* sramHandle){
/* USER CODE BEGIN SRAM_MspDeInit 0 */
/* USER CODE END SRAM_MspDeInit 0 */
HAL_FSMC_MspDeInit();
/* USER CODE BEGIN SRAM_MspDeInit 1 */
/* USER CODE END SRAM_MspDeInit 1 */
}
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

88
Core/Src/gpio.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
@ -6,16 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
@ -50,29 +51,47 @@ void MX_GPIO_Init(void)
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, FSMC_A15_Pin|FSMC_A11_Pin|FSMC_A12_Pin|FSMC_A13_Pin
|FSMC_A14_Pin|FSMC_D4_Pin|FSMC_D5_Pin|FSMC_D6_Pin
|FSMC_D7_Pin|FSMC_A0_Pin|FSMC_A1_Pin|FSMC_A2_Pin
|FSMC_A3_Pin|FSMC_A4_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOD, FSMC_A5_Pin|FSMC_A6_Pin|FSMC_A7_Pin|FSMC_A8_Pin
|FSMC_A9_Pin|FSMC_A10_Pin|FSMC_D0_Pin|FSMC_D2_Pin
|FSMC_D3_Pin|FSMC_NOE_Pin|FSMC_NWE_Pin|FSMC_NE1_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(FSMC_D1_GPIO_Port, FSMC_D1_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8|GND2_SW_Pin|GND1_SW_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, FPGA_CRESET_Pin|SPI_FPGA_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(DIO_IO_GPIO_Port, DIO_IO_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(DIO_CH_SEL2_GPIO_Port, DIO_CH_SEL2_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(EEM_POWER_SW_GPIO_Port, EEM_POWER_SW_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, DIO_CH_SEL0_Pin|DIO_CH_SEL1_Pin, GPIO_PIN_RESET);
/*Configure GPIO pins : PEPin PEPin PEPin PEPin
PEPin PEPin PEPin PEPin
PEPin PEPin PEPin PEPin
PEPin PEPin */
GPIO_InitStruct.Pin = FSMC_A15_Pin|FSMC_A11_Pin|FSMC_A12_Pin|FSMC_A13_Pin
|FSMC_A14_Pin|FSMC_D4_Pin|FSMC_D5_Pin|FSMC_D6_Pin
|FSMC_D7_Pin|FSMC_A0_Pin|FSMC_A1_Pin|FSMC_A2_Pin
|FSMC_A3_Pin|FSMC_A4_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = SPI_ENC_CS_Pin;
@ -108,6 +127,24 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(SW3_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PDPin PDPin PDPin PDPin
PDPin PDPin PDPin PDPin
PDPin PDPin PDPin PDPin */
GPIO_InitStruct.Pin = FSMC_A5_Pin|FSMC_A6_Pin|FSMC_A7_Pin|FSMC_A8_Pin
|FSMC_A9_Pin|FSMC_A10_Pin|FSMC_D0_Pin|FSMC_D2_Pin
|FSMC_D3_Pin|FSMC_NOE_Pin|FSMC_NWE_Pin|FSMC_NE1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = FSMC_D1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(FSMC_D1_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PA8 PAPin PAPin */
GPIO_InitStruct.Pin = GPIO_PIN_8|GND2_SW_Pin|GND1_SW_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
@ -135,20 +172,6 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(SPI_FPGA_CS_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = DIO_IO_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(DIO_IO_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = DIO_CH_SEL2_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(DIO_CH_SEL2_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = EEM_POWER_SW_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
@ -156,13 +179,6 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(EEM_POWER_SW_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PEPin PEPin */
GPIO_InitStruct.Pin = DIO_CH_SEL0_Pin|DIO_CH_SEL1_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(EXTI2_IRQn);
@ -172,5 +188,3 @@ void MX_GPIO_Init(void)
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/i2c.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
@ -186,5 +186,3 @@ void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

3
Core/Src/main.c
View File

@ -27,7 +27,6 @@
#include "tim.h"
#include "usart.h"
#include "gpio.h"
#include "fsmc.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
@ -102,7 +101,6 @@ int main(void)
MX_TIM3_Init();
MX_TIM4_Init();
MX_UART4_Init();
MX_FSMC_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
@ -201,4 +199,3 @@ void assert_failed(uint8_t *file, uint32_t line)
}
#endif /* USE_FULL_ASSERT */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/spi.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file spi.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "spi.h"
@ -122,5 +122,3 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1
Core/Src/stm32f1xx_hal_msp.c
View File

@ -85,4 +85,3 @@ void HAL_MspInit(void)
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

4
Core/Src/stm32f1xx_it.c
View File

@ -209,7 +209,7 @@ void EXTI2_IRQHandler(void)
/* USER CODE BEGIN EXTI2_IRQn 0 */
/* USER CODE END EXTI2_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
HAL_GPIO_EXTI_IRQHandler(FSMC_A15_Pin);
/* USER CODE BEGIN EXTI2_IRQn 1 */
/* USER CODE END EXTI2_IRQn 1 */
@ -246,4 +246,4 @@ void TIM4_IRQHandler(void)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/tim.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file tim.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "tim.h"
@ -172,5 +172,3 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/usart.c
View File

@ -1,3 +1,4 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.c
@ -6,17 +7,16 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
@ -114,5 +114,3 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

77
FPGA/fsmc.pcf.bak Normal file
View File

@ -0,0 +1,77 @@
# example.pcf
set_io --warn-no-port HW_CLK R9
set_io --warn-no-port LED T15
set_io --warn-no-port KEY T16
# set_io --warn-no-port io0 R6
# set_io --warn-no-port io1 T8
# set_io --warn-no-port io2 T5
# set_io --warn-no-port io3 R9
# set_io --warn-no-port io4 R5
# set_io --warn-no-port io5 T9
# set_io --warn-no-port io6 T3
# set_io --warn-no-port io7 R10
# set_io --warn-no-port io8 R3
# set_io --warn-no-port io9 T10
# set_io --warn-no-port io10 T2
# set_io --warn-no-port io11 T11
# set_io --warn-no-port io12 R2
# set_io --warn-no-port io13 T13
# set_io --warn-no-port io14 T1
# set_io --warn-no-port io15 T14
set_io --warn-no-port DIO_OUT T10
set_io --warn-no-port DIO_IO_SEL R10
set_io --warn-no-port DIO_CH_SEL[0] T14
set_io --warn-no-port DIO_CH_SEL[1] T13
set_io --warn-no-port DIO_CH_SEL[2] T11
set_io --warn-no-port ADC_DAT[7] J15
set_io --warn-no-port ADC_DAT[6] K16
set_io --warn-no-port ADC_DAT[5] K15
set_io --warn-no-port ADC_DAT[4] L16
set_io --warn-no-port ADC_DAT[3] M16
set_io --warn-no-port ADC_DAT[2] M15
set_io --warn-no-port ADC_DAT[1] N16
set_io --warn-no-port ADC_DAT[0] P16
set_io --warn-no-port ADC_CLK P15
set_io --warn-no-port FSMC_DA[0] B10
set_io --warn-no-port FSMC_DA[1] A11
set_io --warn-no-port FSMC_DA[2] B11
set_io --warn-no-port FSMC_DA[3] B12
set_io --warn-no-port FSMC_DA[4] A1
set_io --warn-no-port FSMC_DA[5] A2
set_io --warn-no-port FSMC_DA[6] C3
set_io --warn-no-port FSMC_DA[7] B3
set_io --warn-no-port FSMC_DA[8] B4
set_io --warn-no-port FSMC_DA[9] A5
set_io --warn-no-port FSMC_DA[10] B5
set_io --warn-no-port FSMC_DA[11] A6
set_io --warn-no-port FSMC_DA[12] B6
set_io --warn-no-port FSMC_DA[13] A7
set_io --warn-no-port FSMC_DA[14] B7
set_io --warn-no-port FSMC_DA[15] B8
# set_io --warn-no-port FSMC_A[16] A9
# set_io --warn-no-port FSMC_A[17] B9
# set_io --warn-no-port FSMC_A[18] A10
# set_io --warn-no-port FSMC_A[19] C10
# set_io --warn-no-port FSMC_A[20] C9
# set_io --warn-no-port FSMC_A[21] C8
# set_io --warn-no-port FSMC_A[22] C7
# set_io --warn-no-port FSMC_A[23] C11
set_io --warn-no-port FSMC_NL C14
set_io --warn-no-port FSMC_NWAIT B15
set_io --warn-no-port FSMC_NOE B14
set_io --warn-no-port FSMC_NWE A15
set_io --warn-no-port FSMC_NBL[0] C13
set_io --warn-no-port FSMC_NBL[1] C12
set_io --warn-no-port FSMC_CLK B13
set_io --warn-no-port FSMC_NE1 A16

102
FPGA/fsmc.v.bak Normal file
View File

@ -0,0 +1,102 @@
module top (
HW_CLK,
LED,
KEY,
DIO_OUT,
DIO_IO_SEL,
DIO_CH_SEL,
ADC_CLK,
ADC_DAT,
FSMC_CLK,
FSMC_DA,
FSMC_NL,
FSMC_NWAIT,
FSMC_NOE,
FSMC_NWE,
FSMC_NBL,
FSMC_NE1
);
/* I/O */
input HW_CLK;
input KEY;
output LED;
input FSMC_NL;
input FSMC_NOE;
input FSMC_NWE;
input FSMC_NE1;
inout [15:0]FSMC_DA;
input [1:0]FSMC_NBL;
input FSMC_CLK;
input FSMC_NWAIT;
output ADC_CLK;
input [7:0]ADC_DAT;
output DIO_OUT;
output DIO_IO_SEL;
output [2:0]DIO_CH_SEL;
reg [15:0] FSMC_add = 16'b0;
/* Counter register */
reg [31:0] counter = 32'b0;
/* LED drivers */
// assign LED = counter[24];
// assign LED = ~KEY;
/* always */
always @ (posedge HW_CLK) begin
counter <= counter + 1;
end
/* high-speed ADC */
assign ADC_CLK = HW_CLK;
reg [7:0] adc_buf = 8'b0;
always @ (posedge ADC_CLK) begin
adc_buf = ADC_DAT;
adc_buf[7] = ~adc_buf[7];
// FSMC_DA = adc_buf;
end
/* FSMC */
reg [15:0] out_data = 16'h0000;
wire FSMC_ADV = ~FSMC_NE1 & ~FSMC_NL;
always @ (posedge FSMC_ADV)
begin
// LED = ~LED;
FSMC_add[15:0] = FSMC_DA[15:0];
end
// assign LED = FSMC_add[0];
wire FSMC_RE = ~FSMC_NOE & ~FSMC_NE1 & FSMC_NL;
always @ (posedge FSMC_RE) begin //read from FPGA
case (FSMC_add)
0: out_data = 16'd0;
1: out_data = 16'd1;
2: out_data = 16'd2;
63: out_data = 16'd123;
default: out_data = 16'd0;
endcase
// out_data = FSMC_add;
end
wire FSMC_WE = ~FSMC_NWE & ~FSMC_NE1 & FSMC_NL;
always @ (posedge FSMC_WE) begin //write to FPGA
//4 bits for LVDS; 3 bits for channel select; 1 bit for IO direction control
// DIO_IO_SEL <= FSMC_DA[0];
// DIO_CH_SEL <= FSMC_DA[3:1];
// if (DIO_CH_SEL == 3'b111)
// LED = ~LED;
end
assign FSMC_DA = FSMC_RE ? out_data : 16'hzzzz;
/* multiplexer control */
// assign DIO_IO_SEL = FSMC_CLK;
// assign DIO_CH_SEL[1:0] = FSMC_NBL[1:0];
// assign DIO_CH_SEL[2] = FSMC_NWAIT;
endmodule

65
FPGA/top.v
View File

@ -24,14 +24,14 @@ module top (
output LED;
input FSMC_NL;
input FSMC_NWAIT;
input FSMC_NOE;
input FSMC_NWE;
input FSMC_NE1;
input [15:0]FSMC_ADD;
inout [7:0]FSMC_DAT;
input [1:0]FSMC_NBL;
input FSMC_CLK;
input [15:0]FSMC_ADD;
output [7:0]FSMC_DAT;
input FSMC_NWAIT;
output ADC_CLK;
input [7:0]ADC_DAT;
@ -40,11 +40,10 @@ module top (
output DIO_IO_SEL;
output [2:0]DIO_CH_SEL;
/* Counter register */
reg [31:0] counter = 32'b0;
/* LED drivers */
assign LED = counter[24];
// assign LED = counter[24];
// assign LED = ~KEY;
/* always */
@ -52,37 +51,49 @@ module top (
counter <= counter + 1;
end
/* high-speed ADC */
assign ADC_CLK = HW_CLK;
reg [7:0] adc_buf = 8'b0;
reg [7:0] adc_ram [100];
reg [15:0] ram_pointer = 0;
reg [7:0] adc_status = 8'h00; //0:idle or sampling; 1: data available
always @ (posedge ADC_CLK) begin
if (adc_status[0]) begin
adc_buf = ADC_DAT;
adc_buf[7] = ~adc_buf[7];
FSMC_DAT = adc_buf;
adc_ram[ram_pointer] = adc_buf;
if (ram_pointer < 100) begin
adc_status[1] = 1'b0;
ram_pointer++;
end
else begin
adc_status[1] = 1'b1;
ram_pointer = 0;
end
end
end
// wire FSMC_RE = ~NOE;
// always @ (posedge FSMC_RE) begin
// // FSMC_DAT <= FSMC_ADD[7:0];
// // case (FSMC_ADD)
// // 0: FSMC_DAT = 8'd0;
// // 1: FSMC_DAT = 8'd1;
// // 2: FSMC_DAT = 8'd2;
// // 63: FSMC_DAT = 8'd123;
// // default: FSMC_DAT = 8'd122;
// // endcase
// end
/* FSMC */
reg [7:0] fsmc_buf;
// wire FSMC_WE = ~NWE & ~NOE;
// always @ (posedge FSMC_WE) begin
// //4 bits for LVDS; 3 bits for channel select; 1 bit for IO direction control
// // DIO_IO_SEL <= FSMC_DAT[0];
// // DIO_CH_SEL <= FSMC_DAT[3:1];
// // if (DIO_CH_SEL == 3'b111)
// end
wire FSMC_RE = ~FSMC_NOE & ~FSMC_NE1;
always @ (posedge FSMC_RE) begin //read from FPGA
if (FSMC_ADD == 16'hffff)
FSMC_DAT <= adc_status;
else
FSMC_DAT <= adc_ram[FSMC_ADD];
end
assign DIO_IO_SEL = FSMC_CLK;
assign DIO_CH_SEL[1:0] = FSMC_NBL[1:0];
assign DIO_CH_SEL[2] = FSMC_NWAIT;
wire FSMC_WE = ~FSMC_NWE & ~FSMC_NE1;
always @ (posedge FSMC_WE) begin //write to FPGA
//4 bits for LVDS; 3 bits for channel select; 1 bit for IO direction control
DIO_IO_SEL <= FSMC_ADD[0];
DIO_CH_SEL <= FSMC_ADD[3:1];
adc_status[0] = FSMC_ADD[4];
end
// assign FSMC_DAT = FSMC_RE ? fsmc_buf : 8'hzz;
assign LED = adc_status[1];
endmodule

5
Makefile
View File

@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [3.15.2] date: [Fri Dec 31 10:30:11 HKT 2021]
# File automatically-generated by tool: [projectgenerator] version: [3.15.2] date: [Sun Jan 09 16:58:14 HKT 2022]
##########################################################################################################################
# ------------------------------------------------
@ -73,9 +73,6 @@ Core/Src/User/user_isr.c \
Core/Src/User/fpga.c \
Core/Src/User/ethernet.c \
Core/Src/User/power.c \
Core/Src/fsmc.c \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_fsmc.c \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_sram.c \
Core/Src/User/test_logic.c
# ASM sources

34
Syrostan-C.jdebug.user
View File

@ -1,32 +1,30 @@
OpenDocument="fpga.c", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/Core/Src/User/fpga.c", Line=43
OpenDocument="main.c", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/Core/Src/main.c", Line=64
OpenDocument="stm32f1xx_hal.c", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c", Line=372
OpenDocument="stm32f1xx_it.c", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/Core/Src/stm32f1xx_it.c", Line=79
OpenDocument="main.c", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/Core/Src/main.c", Line=64
OpenDocument="startup_stm32f103xg.s", FilePath="/home/geekzjk/Desktop/Syrostan-MCU-C/startup_stm32f103xg.s", Line=56
OpenToolbar="Debug", Floating=0, x=0, y=0
OpenWindow="Registers 1", DockArea=RIGHT, x=0, y=2, w=300, h=226, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, FilteredItems=[], RefreshRate=1
OpenWindow="Source Files", DockArea=LEFT, x=0, y=1, w=499, h=147, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Disassembly", DockArea=RIGHT, x=0, y=0, w=300, h=203, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Memory 1", DockArea=BOTTOM, x=3, y=0, w=307, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, EditorAddress=0xFC
OpenWindow="Global Data", DockArea=RIGHT, x=0, y=1, w=300, h=193, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Watched Data 1", DockArea=LEFT, x=0, y=2, w=499, h=299, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Functions", DockArea=LEFT, x=0, y=0, w=499, h=176, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Data Sampling", DockArea=BOTTOM, x=1, y=0, w=493, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, VisibleTab=0, UniformSampleSpacing=0
OpenWindow="Timeline", DockArea=BOTTOM, x=2, y=0, w=718, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=1, DataPaneShown=1, PowerPaneShown=1, CodePaneShown=1, PinCursor="Cursor Movable", TimePerDiv="1 ns / Div", TimeStampFormat="Time", DataGraphDrawAsPoints=0, DataGraphLegendShown=1, DataGraphUniformSampleSpacing=0, DataGraphLegendPosition="501;0", PowerGraphDrawAsPoints=0, PowerGraphLegendShown=1, PowerGraphAvgFilterTime=Off, PowerGraphAvgFilterLen=Off, PowerGraphUniformSampleSpacing=0, PowerGraphLegendPosition="528;1", CodeGraphLegendShown=1, CodeGraphLegendPosition="544;0"
OpenWindow="Console", DockArea=BOTTOM, x=0, y=0, w=399, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
TableHeader="Global Data", SortCol="Name", SortOrder="ASCENDING", VisibleCols=["Name";"Value";"Location";"Size";"Type";"Scope"], ColWidths=[100;100;100;100;100;100]
OpenWindow="Registers 1", DockArea=RIGHT, x=0, y=0, w=300, h=629, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, FilteredItems=[], RefreshRate=1
OpenWindow="Memory 1", DockArea=BOTTOM, x=3, y=0, w=162, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, EditorAddress=0xFC
OpenWindow="Watched Data 1", DockArea=LEFT, x=0, y=1, w=484, h=363, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Functions", DockArea=LEFT, x=0, y=0, w=484, h=265, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
OpenWindow="Data Sampling", DockArea=BOTTOM, x=1, y=0, w=470, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0, VisibleTab=0, UniformSampleSpacing=0
OpenWindow="Timeline", DockArea=BOTTOM, x=2, y=0, w=916, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=1, DataPaneShown=1, PowerPaneShown=1, CodePaneShown=1, PinCursor="Cursor Movable", TimePerDiv="50 ms / Div", TimeStampFormat="Time", DataGraphDrawAsPoints=0, DataGraphLegendShown=1, DataGraphUniformSampleSpacing=0, DataGraphLegendPosition="697;0", PowerGraphDrawAsPoints=0, PowerGraphLegendShown=1, PowerGraphAvgFilterTime=Off, PowerGraphAvgFilterLen=Off, PowerGraphUniformSampleSpacing=0, PowerGraphLegendPosition="733;0", CodeGraphLegendShown=1, CodeGraphLegendPosition="749;0"
OpenWindow="Console", DockArea=BOTTOM, x=0, y=0, w=369, h=318, FilterBarShown=0, TotalValueBarShown=0, ToolBarShown=0
TableHeader="Functions", SortCol="Name", SortOrder="DESCENDING", VisibleCols=["Name";"Address";"Size";"#Insts";"Source"], ColWidths=[1183;100;100;100;203]
TableHeader="Source Files", SortCol="File", SortOrder="ASCENDING", VisibleCols=["File";"Status";"Size";"#Insts";"Path"], ColWidths=[190;100;100;100;707]
TableHeader="Data Sampling Table", SortCol="Index", SortOrder="ASCENDING", VisibleCols=["Index";"Time"], ColWidths=[100;100]
TableHeader="Data Sampling Setup", SortCol="Expression", SortOrder="ASCENDING", VisibleCols=["Expression";"Type";"Value";"Min";"Max";"Average";"# Changes";"Min. Change";"Max. Change"], ColWidths=[100;100;100;100;100;100;100;100;100]
TableHeader="Power Sampling", SortCol="Index", SortOrder="ASCENDING", VisibleCols=["Index";"Time";"Ch 0"], ColWidths=[100;100;100]
TableHeader="Registers 1", SortCol="Name", SortOrder="ASCENDING", VisibleCols=["Name";"Value";"Description"], ColWidths=[100;105;259]
TableHeader="Watched Data 1", SortCol="Expression", SortOrder="ASCENDING", VisibleCols=["Expression";"Value";"Location";"Refresh"], ColWidths=[133;144;100;122]
TableHeader="RegisterSelectionDialog", SortCol="None", SortOrder="ASCENDING", VisibleCols=[], ColWidths=[]
TableHeader="TargetExceptionDialog", SortCol="Name", SortOrder="ASCENDING", VisibleCols=["Name";"Value";"Address";"Description"], ColWidths=[200;100;100;358]
TableHeader="Watched Data 1", SortCol="Expression", SortOrder="ASCENDING", VisibleCols=["Expression";"Value";"Location";"Refresh"], ColWidths=[133;144;100;107]
TableHeader="Data Sampling Table", SortCol="None", SortOrder="ASCENDING", VisibleCols=["Index";"Time"], ColWidths=[100;100]
TableHeader="Data Sampling Setup", SortCol="Expression", SortOrder="ASCENDING", VisibleCols=["Expression";"Type";"Value";"Min";"Max";"Average";"# Changes";"Min. Change";"Max. Change"], ColWidths=[100;100;100;100;100;100;100;100;100]
WatchedExpression="spi_test_data", RefreshRate=5, DisplayFormat=DISPLAY_FORMAT_HEX, Window=Watched Data 1
WatchedExpression="enc_mac_address", RefreshRate=5, DisplayFormat=DISPLAY_FORMAT_HEX, Window=Watched Data 1
WatchedExpression="voltages", RefreshRate=5, Window=Watched Data 1
WatchedExpression="eem_current", RefreshRate=5, Window=Watched Data 1
WatchedExpression="fsmc_buf", RefreshRate=5, DisplayFormat=DISPLAY_FORMAT_BINARY, Window=Watched Data 1
WatchedExpression="hsram1", RefreshRate=5, Window=Watched Data 1
WatchedExpression="fsmc_buf", RefreshRate=5, Window=Watched Data 1
WatchedExpression="i", RefreshRate=5, DisplayFormat=DISPLAY_FORMAT_BINARY, Window=Watched Data 1
WatchedExpression="dio_ch", RefreshRate=5, Window=Watched Data 1
WatchedExpression="dio_io", RefreshRate=5, Window=Watched Data 1

352
Syrostan-MCU-C.ioc
View File

@ -46,27 +46,23 @@ Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=ADC1
Dma.RequestsNb=1
FSMC.IPParameters=NSMemoryDataWidth1,WriteOperation1
FSMC.NSMemoryDataWidth1=FSMC_NORSRAM_MEM_BUS_WIDTH_8
FSMC.WriteOperation1=FSMC_WRITE_OPERATION_ENABLE
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.Family=STM32F1
Mcu.IP0=ADC1
Mcu.IP1=DAC
Mcu.IP10=TIM3
Mcu.IP11=TIM4
Mcu.IP12=UART4
Mcu.IP10=TIM4
Mcu.IP11=UART4
Mcu.IP2=DMA
Mcu.IP3=FSMC
Mcu.IP4=I2C1
Mcu.IP5=I2C2
Mcu.IP6=NVIC
Mcu.IP7=RCC
Mcu.IP8=SPI1
Mcu.IP9=SYS
Mcu.IPNb=13
Mcu.IP3=I2C1
Mcu.IP4=I2C2
Mcu.IP5=NVIC
Mcu.IP6=RCC
Mcu.IP7=SPI1
Mcu.IP8=SYS
Mcu.IP9=TIM3
Mcu.IPNb=12
Mcu.Name=STM32F103V(F-G)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PE2
@ -126,31 +122,27 @@ Mcu.Pin57=PC11
Mcu.Pin58=PD0
Mcu.Pin59=PD1
Mcu.Pin6=OSC_IN
Mcu.Pin60=PD3
Mcu.Pin61=PD4
Mcu.Pin62=PD5
Mcu.Pin63=PD6
Mcu.Pin64=PD7
Mcu.Pin65=PB3
Mcu.Pin66=PB4
Mcu.Pin67=PB5
Mcu.Pin68=PB6
Mcu.Pin69=PB8
Mcu.Pin60=PD4
Mcu.Pin61=PD5
Mcu.Pin62=PD7
Mcu.Pin63=PB3
Mcu.Pin64=PB4
Mcu.Pin65=PB5
Mcu.Pin66=PB6
Mcu.Pin67=PB8
Mcu.Pin68=PB9
Mcu.Pin69=VP_SYS_VS_Systick
Mcu.Pin7=OSC_OUT
Mcu.Pin70=PB9
Mcu.Pin71=PE0
Mcu.Pin72=PE1
Mcu.Pin73=VP_SYS_VS_Systick
Mcu.Pin74=VP_TIM3_VS_ClockSourceINT
Mcu.Pin75=VP_TIM4_VS_ClockSourceINT
Mcu.Pin70=VP_TIM3_VS_ClockSourceINT
Mcu.Pin71=VP_TIM4_VS_ClockSourceINT
Mcu.Pin8=PC0
Mcu.Pin9=PC1
Mcu.PinsNb=76
Mcu.PinsNb=72
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103VFTx
MxCube.Version=6.2.1
MxDb.Version=DB.6.0.21
MxCube.Version=6.4.0
MxDb.Version=DB.6.0.40
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@ -209,8 +201,12 @@ PA9.Locked=true
PA9.Signal=GPIO_Output
PB0.Signal=ADCx_IN8
PB1.Signal=ADCx_IN9
PB10.GPIOParameters=GPIO_Pu
PB10.GPIO_Pu=GPIO_PULLUP
PB10.Mode=I2C
PB10.Signal=I2C2_SCL
PB11.GPIOParameters=GPIO_Pu
PB11.GPIO_Pu=GPIO_PULLUP
PB11.Mode=I2C
PB11.Signal=I2C2_SDA
PB12.GPIOParameters=GPIO_PuPd,GPIO_Label
@ -233,8 +229,12 @@ PB6.GPIOParameters=PinState,GPIO_Label
PB6.GPIO_Label=EEM_POWER_SW
PB6.PinState=GPIO_PIN_SET
PB6.Signal=GPIO_Output
PB8.GPIOParameters=GPIO_Pu
PB8.GPIO_Pu=GPIO_PULLUP
PB8.Mode=I2C
PB8.Signal=I2C1_SCL
PB9.GPIOParameters=GPIO_Pu
PB9.GPIO_Pu=GPIO_PULLUP
PB9.Mode=I2C
PB9.Signal=I2C1_SDA
PC0.GPIOParameters=GPIO_Label
@ -276,78 +276,218 @@ PC9.GPIO_Label=SW2
PC9.GPIO_PuPd=GPIO_PULLUP
PC9.Locked=true
PC9.Signal=GPIO_Input
PD0.Mode=24b-da1
PD0.Signal=FSMC_DA2
PD1.Mode=24b-da1
PD1.Signal=FSMC_DA3
PD10.Mode=24b-da1
PD10.Signal=FSMC_DA15
PD11.Mode=24b-da1
PD11.Signal=FSMC_A16
PD12.Mode=24b-da1
PD12.Signal=FSMC_A17
PD13.Mode=24b-da1
PD13.Signal=FSMC_A18
PD14.Mode=24b-da1
PD14.Signal=FSMC_DA0
PD15.Mode=24b-da1
PD15.Signal=FSMC_DA1
PD3.GPIOParameters=GPIO_Label
PD3.GPIO_Label=DIO_IO
PD3.Locked=true
PD3.Signal=GPIO_Output
PD4.Mode=MuxedPsram1
PD4.Signal=FSMC_NOE
PD5.Mode=MuxedPsram1
PD5.Signal=FSMC_NWE
PD6.GPIOParameters=GPIO_Speed,PinState,GPIO_Label
PD6.GPIO_Label=DIO_CH_SEL2
PD6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD6.Locked=true
PD6.PinState=GPIO_PIN_SET
PD6.Signal=GPIO_Output
PD7.Mode=NorPsramChipSelect1_1
PD7.Signal=FSMC_NE1
PD8.Mode=24b-da1
PD8.Signal=FSMC_DA13
PD9.Mode=24b-da1
PD9.Signal=FSMC_DA14
PE0.GPIOParameters=GPIO_Label
PE0.GPIO_Label=DIO_CH_SEL0
PE0.Locked=true
PE0.Signal=GPIO_Output
PE1.GPIOParameters=GPIO_Label
PE1.GPIO_Label=DIO_CH_SEL1
PE1.Locked=true
PE1.Signal=GPIO_Output
PE10.Mode=24b-da1
PE10.Signal=FSMC_DA7
PE11.Mode=24b-da1
PE11.Signal=FSMC_DA8
PE12.Mode=24b-da1
PE12.Signal=FSMC_DA9
PE13.Mode=24b-da1
PE13.Signal=FSMC_DA10
PE14.Mode=24b-da1
PE14.Signal=FSMC_DA11
PE15.Mode=24b-da1
PE15.Signal=FSMC_DA12
PE2.Mode=24b-da1
PE2.Signal=FSMC_A23
PE3.Mode=24b-da1
PE3.Signal=FSMC_A19
PE4.Mode=24b-da1
PE4.Signal=FSMC_A20
PE5.Mode=24b-da1
PE5.Signal=FSMC_A21
PE6.Mode=24b-da1
PE6.Signal=FSMC_A22
PE7.Mode=24b-da1
PE7.Signal=FSMC_DA4
PE8.Mode=24b-da1
PE8.Signal=FSMC_DA5
PE9.Mode=24b-da1
PE9.Signal=FSMC_DA6
PD0.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD0.GPIO_Label=FSMC_D2
PD0.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD0.GPIO_PuPd=GPIO_NOPULL
PD0.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD0.Locked=true
PD0.PinState=GPIO_PIN_SET
PD0.Signal=GPIO_Output
PD1.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD1.GPIO_Label=FSMC_D3
PD1.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD1.GPIO_PuPd=GPIO_NOPULL
PD1.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD1.Locked=true
PD1.PinState=GPIO_PIN_SET
PD1.Signal=GPIO_Output
PD10.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD10.GPIO_Label=FSMC_A7
PD10.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD10.GPIO_PuPd=GPIO_NOPULL
PD10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD10.Locked=true
PD10.PinState=GPIO_PIN_SET
PD10.Signal=GPIO_Output
PD11.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD11.GPIO_Label=FSMC_A8
PD11.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD11.GPIO_PuPd=GPIO_NOPULL
PD11.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD11.Locked=true
PD11.PinState=GPIO_PIN_SET
PD11.Signal=GPIO_Output
PD12.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD12.GPIO_Label=FSMC_A9
PD12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD12.GPIO_PuPd=GPIO_NOPULL
PD12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD12.Locked=true
PD12.PinState=GPIO_PIN_SET
PD12.Signal=GPIO_Output
PD13.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD13.GPIO_Label=FSMC_A10
PD13.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD13.GPIO_PuPd=GPIO_NOPULL
PD13.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD13.Locked=true
PD13.PinState=GPIO_PIN_SET
PD13.Signal=GPIO_Output
PD14.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD14.GPIO_Label=FSMC_D0
PD14.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD14.GPIO_PuPd=GPIO_NOPULL
PD14.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD14.Locked=true
PD14.PinState=GPIO_PIN_SET
PD14.Signal=GPIO_Output
PD15.GPIOParameters=GPIO_Label
PD15.GPIO_Label=FSMC_D1
PD15.Locked=true
PD15.Signal=GPIO_Output
PD4.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD4.GPIO_Label=FSMC_NOE
PD4.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD4.GPIO_PuPd=GPIO_NOPULL
PD4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD4.Locked=true
PD4.PinState=GPIO_PIN_SET
PD4.Signal=GPIO_Output
PD5.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD5.GPIO_Label=FSMC_NWE
PD5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD5.GPIO_PuPd=GPIO_NOPULL
PD5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD5.Locked=true
PD5.PinState=GPIO_PIN_SET
PD5.Signal=GPIO_Output
PD7.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD7.GPIO_Label=FSMC_NE1
PD7.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD7.GPIO_PuPd=GPIO_NOPULL
PD7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD7.Locked=true
PD7.PinState=GPIO_PIN_SET
PD7.Signal=GPIO_Output
PD8.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD8.GPIO_Label=FSMC_A5
PD8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD8.GPIO_PuPd=GPIO_NOPULL
PD8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD8.Locked=true
PD8.PinState=GPIO_PIN_SET
PD8.Signal=GPIO_Output
PD9.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PD9.GPIO_Label=FSMC_A6
PD9.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PD9.GPIO_PuPd=GPIO_NOPULL
PD9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PD9.Locked=true
PD9.PinState=GPIO_PIN_SET
PD9.Signal=GPIO_Output
PE10.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE10.GPIO_Label=FSMC_D7
PE10.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE10.GPIO_PuPd=GPIO_NOPULL
PE10.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE10.Locked=true
PE10.PinState=GPIO_PIN_SET
PE10.Signal=GPIO_Output
PE11.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE11.GPIO_Label=FSMC_A0
PE11.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE11.GPIO_PuPd=GPIO_NOPULL
PE11.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE11.Locked=true
PE11.PinState=GPIO_PIN_SET
PE11.Signal=GPIO_Output
PE12.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE12.GPIO_Label=FSMC_A1
PE12.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE12.GPIO_PuPd=GPIO_NOPULL
PE12.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE12.Locked=true
PE12.PinState=GPIO_PIN_SET
PE12.Signal=GPIO_Output
PE13.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE13.GPIO_Label=FSMC_A2
PE13.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE13.GPIO_PuPd=GPIO_NOPULL
PE13.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE13.Locked=true
PE13.PinState=GPIO_PIN_SET
PE13.Signal=GPIO_Output
PE14.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE14.GPIO_Label=FSMC_A3
PE14.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE14.GPIO_PuPd=GPIO_NOPULL
PE14.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE14.Locked=true
PE14.PinState=GPIO_PIN_SET
PE14.Signal=GPIO_Output
PE15.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE15.GPIO_Label=FSMC_A4
PE15.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE15.GPIO_PuPd=GPIO_NOPULL
PE15.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE15.Locked=true
PE15.PinState=GPIO_PIN_SET
PE15.Signal=GPIO_Output
PE2.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE2.GPIO_Label=FSMC_A15
PE2.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE2.GPIO_PuPd=GPIO_NOPULL
PE2.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE2.Locked=true
PE2.PinState=GPIO_PIN_SET
PE2.Signal=GPIO_Output
PE3.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE3.GPIO_Label=FSMC_A11
PE3.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE3.GPIO_PuPd=GPIO_NOPULL
PE3.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE3.Locked=true
PE3.PinState=GPIO_PIN_SET
PE3.Signal=GPIO_Output
PE4.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE4.GPIO_Label=FSMC_A12
PE4.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE4.GPIO_PuPd=GPIO_NOPULL
PE4.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE4.Locked=true
PE4.PinState=GPIO_PIN_SET
PE4.Signal=GPIO_Output
PE5.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE5.GPIO_Label=FSMC_A13
PE5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE5.GPIO_PuPd=GPIO_NOPULL
PE5.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE5.Locked=true
PE5.PinState=GPIO_PIN_SET
PE5.Signal=GPIO_Output
PE6.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE6.GPIO_Label=FSMC_A14
PE6.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE6.GPIO_PuPd=GPIO_NOPULL
PE6.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE6.Locked=true
PE6.PinState=GPIO_PIN_SET
PE6.Signal=GPIO_Output
PE7.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE7.GPIO_Label=FSMC_D4
PE7.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE7.GPIO_PuPd=GPIO_NOPULL
PE7.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE7.Locked=true
PE7.PinState=GPIO_PIN_SET
PE7.Signal=GPIO_Output
PE8.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE8.GPIO_Label=FSMC_D5
PE8.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE8.GPIO_PuPd=GPIO_NOPULL
PE8.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE8.Locked=true
PE8.PinState=GPIO_PIN_SET
PE8.Signal=GPIO_Output
PE9.GPIOParameters=GPIO_Speed,PinState,GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP
PE9.GPIO_Label=FSMC_D6
PE9.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_PP
PE9.GPIO_PuPd=GPIO_NOPULL
PE9.GPIO_Speed=GPIO_SPEED_FREQ_HIGH
PE9.Locked=true
PE9.PinState=GPIO_PIN_SET
PE9.Signal=GPIO_Output
PinOutPanel.RotationAngle=0
ProjectManager.AskForMigrate=true
ProjectManager.BackupPrevious=false
@ -376,7 +516,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=Makefile
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_DAC_Init-DAC-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_TIM3_Init-TIM3-false-HAL-true,10-MX_TIM4_Init-TIM4-false-HAL-true,11-MX_UART4_Init-UART4-false-HAL-true,12-MX_FSMC_Init-FSMC-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_DAC_Init-DAC-false-HAL-true,6-MX_I2C1_Init-I2C1-false-HAL-true,7-MX_I2C2_Init-I2C2-false-HAL-true,8-MX_SPI1_Init-SPI1-false-HAL-true,9-MX_TIM3_Init-TIM3-false-HAL-true,10-MX_TIM4_Init-TIM4-false-HAL-true,11-MX_UART4_Init-UART4-false-HAL-true
RCC.ADCFreqValue=12000000
RCC.ADCPresc=RCC_ADCPCLK2_DIV6
RCC.AHBFreq_Value=72000000