sinara-hw/Syrostan-MCU-C
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use UART to transmit data out and plot wave using python for HSADC performance testing (working well @75MHz)

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This commit is contained in:
mikelam 2022-01-15 19:38:30 +08:00
parent 5d1c7c4d51
commit a082a2bd0d
6 changed files with 7660 additions and 7633 deletions
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15242
Core/Inc/User/fpga_bin.h
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File diff suppressed because it is too large Load Diff

4
Core/Src/User/fpga.c
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@ -106,7 +106,7 @@ void fsmc_read(uint16_t address, uint8_t *dat)
*dat |= (uint8_t)HAL_GPIO_ReadPin(FSMC_D7_GPIO_Port, FSMC_D7_Pin) << 7;
HAL_GPIO_WritePin(FSMC_NOE_GPIO_Port, FSMC_NOE_Pin, GPIO_PIN_RESET);
HAL_Delay(1);
// HAL_Delay(1);
HAL_GPIO_WritePin(FSMC_NOE_GPIO_Port, FSMC_NOE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_SET);
}
@ -157,7 +157,7 @@ void fsmc_write(uint16_t address, uint8_t dat)
HAL_GPIO_WritePin(FSMC_D7_GPIO_Port, FSMC_D7_Pin, (dat >> 7) & 0x01);
HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_RESET);
HAL_Delay(1);
// HAL_Delay(1);
HAL_GPIO_WritePin(FSMC_NWE_GPIO_Port, FSMC_NWE_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(FSMC_NE1_GPIO_Port, FSMC_NE1_Pin, GPIO_PIN_SET);
}

26
Core/Src/User/user_main.c
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@ -12,13 +12,14 @@ void user_setup()
HAL_TIM_Base_Start_IT(&htim4);
HAL_TIM_Base_Start(&htim3);
eem_power_init();
uint8_t str[10] = "test";
HAL_UART_Transmit(&huart4, str, 5, 100);
uint8_t str[10] = "start";
HAL_UART_Transmit(&huart4, str, 6, 100);
}
uint8_t dio_ch = 0;
uint8_t dio_io = 0;
uint8_t adc_sample = 0;
uint16_t fsmc_add = 0;
void user_loop()
{
if (adc_sample)
@ -33,13 +34,24 @@ void user_loop()
{
fsmc_write_buf = (dio_io & 0x01) | ((dio_ch & 0x03) << 1);
fsmc_write(fsmc_write_buf, 0);
uint16_t add = 0;
while (add < ADC_SAMPLE_NUM)
fsmc_add = 0;
while (fsmc_add < ADC_SAMPLE_NUM)
{
fsmc_read(add, (uint8_t*)(adc_result + add));
add++;
fsmc_read(fsmc_add, (uint8_t*)(adc_result + fsmc_add));
fsmc_add++;
}
// HAL_UART_Transmit(&huart4, "test0", 6, 100);
HAL_UART_Transmit(&huart4, (uint8_t*)adc_result, ADC_SAMPLE_NUM, 10000);
}
// HAL_Delay(1000);
key_events();
// key_events();
if (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET)
{
HAL_Delay(50);
if (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET)
{
adc_sample = 1;
while (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET);
}
}
}

5
FPGA/top.v
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@ -36,7 +36,7 @@ module top (
SB_PLL40_CORE #(.FEEDBACK_PATH("SIMPLE"),
.PLLOUT_SELECT("GENCLK"),
.DIVR(4'd0),
.DIVF(7'd1),
.DIVF(7'd2),
.DIVQ(3'd0), //12MHz * (DIVF+1) / 2^DIVQ / (DIVR+1)
.FILTER_RANGE(3'b001), // wfm without PLL is broken
@ -65,6 +65,7 @@ module top (
ram_pointer++;
end
else begin
// adc_status[0] = 1'b0;
adc_status[1] = 1'b1;
ram_pointer = 0;
end
@ -92,7 +93,7 @@ module top (
end
// assign FSMC_DAT = FSMC_RE ? fsmc_buf : 8'hzz;
assign FSMC_CLK = adc_status[0];
// assign FSMC_CLK = adc_status[0];
assign FSMC_NWAIT = adc_status[1];
assign LED = adc_status[1];

2
Makefile
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@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [3.15.2] date: [Sat Jan 15 15:39:31 HKT 2022]
# File automatically-generated by tool: [projectgenerator] version: [3.15.2] date: [Sat Jan 15 17:32:43 HKT 2022]
##########################################################################################################################
# ------------------------------------------------

14
plot_adc.py Normal file
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@ -0,0 +1,14 @@
length = 16384
import serial
import numpy as np
import matplotlib.pyplot as plt
ser = serial.Serial('/dev/ttyUSB0', 115200, timeout=None)
buffer = ser.read(length);
data = []
for i in range(length):
data.append(np.int8(buffer[i]))
# print(data)
plt.plot(data)
plt.show()
ser.close()