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add ethernet controller spi driver

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This commit is contained in:
Zheng-Jiakun 2021-07-27 09:58:57 +08:00
parent 71f86fa2ab
commit 416bb29b83
138 changed files with 483 additions and 132830 deletions
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1
.gitignore vendored Normal file
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@ -0,0 +1 @@
build/

36
.mxproject
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@ -7,37 +7,39 @@ HeaderPath=../Drivers/STM32F1xx_HAL_Driver/Inc;../Drivers/STM32F1xx_HAL_Driver/I
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousUsedMakefileFiles]
SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/adc.c;Core/Src/dac.c;Core/Src/i2c.c;Core/Src/spi.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Core/Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;
SourceFiles=Core/Src/main.c;Core/Src/gpio.c;Core/Src/adc.c;Core/Src/dac.c;Core/Src/dma.c;Core/Src/i2c.c;Core/Src/spi.c;Core/Src/tim.c;Core/Src/usart.c;Core/Src/stm32f1xx_it.c;Core/Src/stm32f1xx_hal_msp.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Core/Src/system_stm32f1xx.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_uart.c;Core/Src/system_stm32f1xx.c;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;
HeaderPath=Drivers/STM32F1xx_HAL_Driver/Inc;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;Drivers/CMSIS/Device/ST/STM32F1xx/Include;Drivers/CMSIS/Include;Core/Inc;
CDefines=USE_HAL_DRIVER;STM32F103xE;USE_HAL_DRIVER;USE_HAL_DRIVER;
[PreviousGenFiles]
AdvancedFolderStructure=true
HeaderFileListSize=10
HeaderFileListSize=11
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HeaderFiles#2=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/dac.h
HeaderFiles#3=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/i2c.h
HeaderFiles#4=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/spi.h
HeaderFiles#5=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/tim.h
HeaderFiles#6=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/usart.h
HeaderFiles#7=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/stm32f1xx_it.h
HeaderFiles#8=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/stm32f1xx_hal_conf.h
HeaderFiles#9=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/main.h
HeaderFiles#3=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/dma.h
HeaderFiles#4=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/i2c.h
HeaderFiles#5=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/spi.h
HeaderFiles#6=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/tim.h
HeaderFiles#7=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/usart.h
HeaderFiles#8=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/stm32f1xx_it.h
HeaderFiles#9=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/stm32f1xx_hal_conf.h
HeaderFiles#10=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc/main.h
HeaderFolderListSize=1
HeaderPath#0=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Inc
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SourceFiles#2=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/dac.c
SourceFiles#3=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/i2c.c
SourceFiles#4=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/spi.c
SourceFiles#5=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/tim.c
SourceFiles#6=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/usart.c
SourceFiles#7=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/stm32f1xx_it.c
SourceFiles#8=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/stm32f1xx_hal_msp.c
SourceFiles#9=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/main.c
SourceFiles#3=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/dma.c
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SourceFiles#5=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/spi.c
SourceFiles#6=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/tim.c
SourceFiles#7=/home/geekzjk/m-labs/SW/Syrostan-MCU-C/Core/Src/usart.c
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SourceFolderListSize=1
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SourceFiles=;

6
.vscode/settings.json vendored
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@ -1,5 +1,9 @@
{
"files.associations": {
"main.h": "c"
"main.h": "c",
"ethernet.h": "c",
"eem_power.h": "c",
"user_main.h": "c",
"user_isr.h": "c"
}
}

13
Core/Inc/User/eem_power.h Normal file
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@ -0,0 +1,13 @@
#ifndef EEM_POWER_H
#define EEM_POWER_H
#include "user_main.h"
#define EEM_CURRENT_REF 0
#define EEM_CURRENT_VAL 1
#define EEM_ADC2CURRENT(val,ref) ((val-ref)/4096*3.3f/750) //((val-ref)/4096*3.3/1000/0.03/25)
void eem_power_init();
void eem_power_get_current();
#endif

21
Core/Inc/User/ethernet.h Normal file
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@ -0,0 +1,21 @@
#ifndef ETHERNET_H
#define ETHERNET_H
#include "user_main.h"
#define ENC_CMD_RESET (0b11001010)
#define ENC_CMD_RCR(add) (0b00000000 | add)
#define ENC_CMD_WCR(add) (0b01000000 | add)
#define ENC_CMD_BxSEL(x) (0b11000000 | (x << 1U))
#define ENC_CMD_RBSEL (0b11001000)
typedef enum
{
ENC_SPI_READ = 0,
ENC_SPI_WRITE
} enc_spi_operate_type_t;
void ethernet_init();
void ethernet_spi_n_byte_banked(enc_spi_operate_type_t type, uint8_t spi_cmd, uint8_t *spi_data, uint8_t n);
#endif

4
Core/Inc/User/user_isr.h
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@ -1,6 +1,10 @@
#ifndef USER_ISR
#define USER_ISR
#include "user_main.h"
void timer4_isr();
void adc1_dma_isr();
void exti2_isr();
#endif

4
Core/Inc/User/user_main.h
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@ -3,6 +3,10 @@
#include "main.h"
#include "tim.h"
#include "gpio.h"
#include "adc.h"
#include "ethernet.h"
#include "eem_power.h"
void user_setup();
void user_loop();

52
Core/Inc/dma.h Normal file
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@ -0,0 +1,52 @@
/**
******************************************************************************
* @file dma.h
* @brief This file contains all the function prototypes for
* the dma.c file
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DMA_H__
#define __DMA_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* DMA memory to memory transfer handles -------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_DMA_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __DMA_H__ */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

9
Core/Inc/main.h
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@ -64,12 +64,13 @@ void Error_Handler(void);
#define LED_GPIO_Port GPIOC
#define KEY_Pin GPIO_PIN_1
#define KEY_GPIO_Port GPIOC
#define Fault_12V_Pin GPIO_PIN_2
#define Fault_12V_GPIO_Port GPIOB
#define EEM_POWER_FAULT_Pin GPIO_PIN_2
#define EEM_POWER_FAULT_GPIO_Port GPIOB
#define EEM_POWER_FAULT_EXTI_IRQn EXTI2_IRQn
#define SPI_FPGA_CS_Pin GPIO_PIN_15
#define SPI_FPGA_CS_GPIO_Port GPIOA
#define SW_12V_Pin GPIO_PIN_6
#define SW_12V_GPIO_Port GPIOB
#define EEM_POWER_SW_Pin GPIO_PIN_6
#define EEM_POWER_SW_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */

2
Core/Inc/stm32f1xx_hal_conf.h
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@ -41,7 +41,7 @@
/*#define HAL_CORTEX_MODULE_ENABLED */
/*#define HAL_CRC_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/*#define HAL_DMA_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/*#define HAL_ETH_MODULE_ENABLED */
/*#define HAL_FLASH_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED

2
Core/Inc/stm32f1xx_it.h
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@ -56,6 +56,8 @@ void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void EXTI2_IRQHandler(void);
void DMA1_Channel1_IRQHandler(void);
void TIM4_IRQHandler(void);
/* USER CODE BEGIN EFP */

15
Core/Src/User/eem_power.c Normal file
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@ -0,0 +1,15 @@
#include "eem_power.h"
uint16_t adc_eem_power[2];
float eem_current;
void eem_power_init()
{
HAL_GPIO_WritePin(EEM_POWER_SW_GPIO_Port, EEM_POWER_SW_Pin, GPIO_PIN_SET);
HAL_ADC_Start_DMA(&hadc1, (uint32_t*)adc_eem_power, sizeof(adc_eem_power));
}
void eem_power_get_current()
{
eem_current = EEM_ADC2CURRENT(adc_eem_power[EEM_CURRENT_VAL], adc_eem_power[EEM_CURRENT_REF]);
}

76
Core/Src/User/ethernet.c Normal file
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@ -0,0 +1,76 @@
#include "ethernet.h"
#include "spi.h"
void ethernet_spi_1_byte(uint8_t spi_cmd)
{
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
}
void ethernet_spi_2_byte(uint8_t spi_cmd, uint8_t *spi_data)
{
ethernet_spi_n_byte_banked(ENC_SPI_READ, spi_cmd, spi_data, 1);
}
void ethernet_spi_3_byte(enc_spi_operate_type_t type, uint8_t spi_cmd, uint8_t *spi_data)
{
ethernet_spi_n_byte_banked(type, spi_cmd, spi_data, 2);
}
void ethernet_spi_n_byte_banked(enc_spi_operate_type_t type, uint8_t spi_cmd, uint8_t *spi_data, uint8_t n)
{
switch (type)
{
case ENC_SPI_WRITE:
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
HAL_SPI_Transmit(&hspi1, spi_data, n, 100);
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
break;
case ENC_SPI_READ:
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_RESET);
HAL_SPI_Transmit(&hspi1, &spi_cmd, 1, 100);
HAL_SPI_Receive(&hspi1, spi_data, n, 100);
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
break;
default:
break;
}
}
void ethernet_init()
{
HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
uint8_t spi_dummy_data = 0x00;
HAL_SPI_Transmit(&hspi1, &spi_dummy_data, 1, 100); //dummy transmition to make the clock low
uint16_t spi_test_data = 0;
ethernet_spi_1_byte(ENC_CMD_BxSEL(0));
// HAL_Delay(1);
// ethernet_spi_2_byte(ENC_CMD_RBSEL, (uint8_t*)&spi_test_data);
// while(spi_test_data != 0);
spi_test_data = 1234U;
ethernet_spi_n_byte_banked(ENC_SPI_WRITE, ENC_CMD_WCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
HAL_Delay(1);
spi_test_data = 0;
ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_RCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
while(spi_test_data != 1234U);
// do
// {
// ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_WCR(0x1A), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
// HAL_Delay(1);
// }
// while((spi_test_data & (0x0001 << 12U)) == 0x0000);
ethernet_spi_1_byte(ENC_CMD_RESET);
HAL_Delay(1);
ethernet_spi_n_byte_banked(ENC_SPI_READ, ENC_CMD_RCR(0x16), (uint8_t*)&spi_test_data, sizeof(spi_test_data));
while(spi_test_data != 0x0000);
HAL_Delay(1);
}

17
Core/Src/User/user_isr.c
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@ -1,7 +1,6 @@
#include "user_isr.h"
#include "user_main.h"
void timer4_isr ()
void timer4_isr()
{
static uint16_t cnt = 0;
if (cnt > 999)
@ -13,4 +12,18 @@ void timer4_isr ()
{
cnt++;
}
}
void adc1_dma_isr()
{
eem_power_get_current();
}
GPIO_PinState fault_state;
void exti2_isr()
{
fault_state = HAL_GPIO_ReadPin(EEM_POWER_FAULT_GPIO_Port, EEM_POWER_FAULT_Pin);
HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, fault_state);
}

18
Core/Src/User/user_main.c
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@ -1,11 +1,23 @@
#include "user_main.h"
void user_setup ()
void user_setup()
{
ethernet_init();
HAL_TIM_Base_Start_IT(&htim4);
// HAL_TIM_Base_Start(&htim3);
// eem_power_init();
}
void user_loop ()
void user_loop()
{
if (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET)
{
HAL_Delay(50);
if (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET)
{
// ethernet_reset();
// HAL_GPIO_TogglePin(EEM_POWER_SW_GPIO_Port, EEM_POWER_SW_Pin);
while (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET);
}
}
}

36
Core/Src/adc.c
View File

@ -25,6 +25,7 @@
/* USER CODE END 0 */
ADC_HandleTypeDef hadc1;
DMA_HandleTypeDef hdma_adc1;
/* ADC1 init function */
void MX_ADC1_Init(void)
@ -42,25 +43,33 @@ void MX_ADC1_Init(void)
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
hadc1.Init.ContinuousConvMode = DISABLE;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIGCONV_T3_TRGO;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.NbrOfConversion = 1;
hadc1.Init.NbrOfConversion = 2;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_0;
sConfig.Channel = ADC_CHANNEL_8;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_9;
sConfig.Rank = ADC_REGULAR_RANK_2;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
@ -108,6 +117,23 @@ void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
hdma_adc1.Init.Mode = DMA_CIRCULAR;
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
{
Error_Handler();
}
__HAL_LINKDMA(adcHandle,DMA_Handle,hdma_adc1);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
@ -145,6 +171,8 @@ void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
/* ADC1 DMA DeInit */
HAL_DMA_DeInit(adcHandle->DMA_Handle);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */

55
Core/Src/dma.c Normal file
View File

@ -0,0 +1,55 @@
/**
******************************************************************************
* @file dma.c
* @brief This file provides code for the configuration
* of all the requested memory to memory DMA transfers.
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "dma.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure DMA */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/**
* Enable DMA controller clock
*/
void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

16
Core/Src/gpio.c
View File

@ -61,7 +61,7 @@ void MX_GPIO_Init(void)
HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(SW_12V_GPIO_Port, SW_12V_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(EEM_POWER_SW_GPIO_Port, EEM_POWER_SW_Pin, GPIO_PIN_SET);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = SPI_ENC_CS_Pin;
@ -84,10 +84,10 @@ void MX_GPIO_Init(void)
HAL_GPIO_Init(KEY_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = Fault_12V_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pin = EEM_POWER_FAULT_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(Fault_12V_GPIO_Port, &GPIO_InitStruct);
HAL_GPIO_Init(EEM_POWER_FAULT_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PA8 PA11 PA12 */
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_11|GPIO_PIN_12;
@ -104,11 +104,15 @@ void MX_GPIO_Init(void)
HAL_GPIO_Init(SPI_FPGA_CS_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pin : PtPin */
GPIO_InitStruct.Pin = SW_12V_Pin;
GPIO_InitStruct.Pin = EEM_POWER_SW_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(SW_12V_GPIO_Port, &GPIO_InitStruct);
HAL_GPIO_Init(EEM_POWER_SW_GPIO_Port, &GPIO_InitStruct);
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(EXTI2_IRQn);
}

2
Core/Src/main.c
View File

@ -21,6 +21,7 @@
#include "main.h"
#include "adc.h"
#include "dac.h"
#include "dma.h"
#include "i2c.h"
#include "spi.h"
#include "tim.h"
@ -91,6 +92,7 @@ int main(void)
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_DAC_Init();
MX_I2C1_Init();
MX_I2C2_Init();

2
Core/Src/spi.c
View File

@ -45,7 +45,7 @@ void MX_SPI1_Init(void)
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_4;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;

29
Core/Src/stm32f1xx_it.c
View File

@ -57,6 +57,7 @@
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern DMA_HandleTypeDef hdma_adc1;
extern TIM_HandleTypeDef htim4;
/* USER CODE BEGIN EV */
@ -200,6 +201,34 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles EXTI line2 interrupt.
*/
void EXTI2_IRQHandler(void)
{
/* USER CODE BEGIN EXTI2_IRQn 0 */
exti2_isr();
/* USER CODE END EXTI2_IRQn 0 */
HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_2);
/* USER CODE BEGIN EXTI2_IRQn 1 */
/* USER CODE END EXTI2_IRQn 1 */
}
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
adc1_dma_isr();
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
/**
* @brief This function handles TIM4 global interrupt.
*/

88
Core/Src/tim.c
View File

@ -36,6 +36,7 @@ void MX_TIM3_Init(void)
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_MasterConfigTypeDef sMasterConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
@ -48,11 +49,20 @@ void MX_TIM3_Init(void)
htim3.Init.Period = 999;
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
{
Error_Handler();
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
sMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE;
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
{
@ -181,10 +191,10 @@ void MX_TIM8_Init(void)
}
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
{
if(tim_pwmHandle->Instance==TIM3)
if(tim_baseHandle->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspInit 0 */
@ -195,23 +205,7 @@ void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
/* USER CODE END TIM3_MspInit 1 */
}
else if(tim_pwmHandle->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspInit 0 */
/* USER CODE END TIM8_MspInit 0 */
/* TIM8 clock enable */
__HAL_RCC_TIM8_CLK_ENABLE();
/* USER CODE BEGIN TIM8_MspInit 1 */
/* USER CODE END TIM8_MspInit 1 */
}
}
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
{
if(tim_baseHandle->Instance==TIM4)
else if(tim_baseHandle->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspInit 0 */
@ -227,6 +221,22 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
/* USER CODE END TIM4_MspInit 1 */
}
}
void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
{
if(tim_pwmHandle->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspInit 0 */
/* USER CODE END TIM8_MspInit 0 */
/* TIM8 clock enable */
__HAL_RCC_TIM8_CLK_ENABLE();
/* USER CODE BEGIN TIM8_MspInit 1 */
/* USER CODE END TIM8_MspInit 1 */
}
}
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
{
@ -275,10 +285,10 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
}
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
{
if(tim_pwmHandle->Instance==TIM3)
if(tim_baseHandle->Instance==TIM3)
{
/* USER CODE BEGIN TIM3_MspDeInit 0 */
@ -289,23 +299,7 @@ void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
/* USER CODE END TIM3_MspDeInit 1 */
}
else if(tim_pwmHandle->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspDeInit 0 */
/* USER CODE END TIM8_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM8_CLK_DISABLE();
/* USER CODE BEGIN TIM8_MspDeInit 1 */
/* USER CODE END TIM8_MspDeInit 1 */
}
}
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
{
if(tim_baseHandle->Instance==TIM4)
else if(tim_baseHandle->Instance==TIM4)
{
/* USER CODE BEGIN TIM4_MspDeInit 0 */
@ -321,6 +315,22 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
}
}
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
{
if(tim_pwmHandle->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspDeInit 0 */
/* USER CODE END TIM8_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM8_CLK_DISABLE();
/* USER CODE BEGIN TIM8_MspDeInit 1 */
/* USER CODE END TIM8_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

7
Makefile
View File

@ -1,5 +1,5 @@
##########################################################################################################################
# File automatically-generated by tool: [projectgenerator] version: [3.13.0-B3] date: [Mon Jul 26 17:15:52 CST 2021]
# File automatically-generated by tool: [projectgenerator] version: [3.13.0-B3] date: [Tue Jul 27 10:33:41 CST 2021]
##########################################################################################################################
# ------------------------------------------------
@ -68,7 +68,10 @@ Core/Src/dac.c \
Core/Src/i2c.c \
Core/Src/spi.c \
Core/Src/tim.c \
Core/Src/usart.c
Core/Src/usart.c \
Core/Src/Uesr/ethernet.c \
Core/Src/dma.c \
Core/Src/User/eem_power.c
# ASM sources
ASM_SOURCES = \

77
Syrostan-MCU-C.ioc
View File

@ -1,29 +1,47 @@
#MicroXplorer Configuration settings - do not modify
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_0
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_8
ADC1.Channel-1\#ChannelRegularConversion=ADC_CHANNEL_9
ADC1.ContinuousConvMode=DISABLE
ADC1.ExternalTrigConv=ADC_EXTERNALTRIGCONV_T3_TRGO
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,NbrOfConversionFlag,master,Rank-1\#ChannelRegularConversion,Channel-1\#ChannelRegularConversion,SamplingTime-1\#ChannelRegularConversion,NbrOfConversion,ContinuousConvMode,ExternalTrigConv
ADC1.NbrOfConversion=2
ADC1.NbrOfConversionFlag=1
ADC1.Rank-0\#ChannelRegularConversion=1
ADC1.Rank-1\#ChannelRegularConversion=2
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.SamplingTime-1\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
ADC1.master=1
Dma.ADC1.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.ADC1.0.Instance=DMA1_Channel1
Dma.ADC1.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
Dma.ADC1.0.MemInc=DMA_MINC_ENABLE
Dma.ADC1.0.Mode=DMA_CIRCULAR
Dma.ADC1.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
Dma.ADC1.0.PeriphInc=DMA_PINC_DISABLE
Dma.ADC1.0.Priority=DMA_PRIORITY_LOW
Dma.ADC1.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority
Dma.Request0=ADC1
Dma.RequestsNb=1
File.Version=6
GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false
Mcu.Family=STM32F1
Mcu.IP0=ADC1
Mcu.IP1=DAC
Mcu.IP10=TIM4
Mcu.IP11=TIM8
Mcu.IP12=UART4
Mcu.IP13=USART1
Mcu.IP2=I2C1
Mcu.IP3=I2C2
Mcu.IP4=NVIC
Mcu.IP5=RCC
Mcu.IP6=SPI1
Mcu.IP7=SPI2
Mcu.IP8=SYS
Mcu.IP9=TIM3
Mcu.IPNb=14
Mcu.IP10=TIM3
Mcu.IP11=TIM4
Mcu.IP12=TIM8
Mcu.IP13=UART4
Mcu.IP14=USART1
Mcu.IP2=DMA
Mcu.IP3=I2C1
Mcu.IP4=I2C2
Mcu.IP5=NVIC
Mcu.IP6=RCC
Mcu.IP7=SPI1
Mcu.IP8=SPI2
Mcu.IP9=SYS
Mcu.IPNb=15
Mcu.Name=STM32F103V(C-D-E)Tx
Mcu.Package=LQFP100
Mcu.Pin0=PC13-TAMPER-RTC
@ -67,20 +85,23 @@ Mcu.Pin42=PB6
Mcu.Pin43=PB8
Mcu.Pin44=PB9
Mcu.Pin45=VP_SYS_VS_Systick
Mcu.Pin46=VP_TIM4_VS_ClockSourceINT
Mcu.Pin46=VP_TIM3_VS_ClockSourceINT
Mcu.Pin47=VP_TIM4_VS_ClockSourceINT
Mcu.Pin5=PC2
Mcu.Pin6=PA0-WKUP
Mcu.Pin7=PA1
Mcu.Pin8=PA2
Mcu.Pin9=PA3
Mcu.PinsNb=47
Mcu.PinsNb=48
Mcu.ThirdPartyNb=0
Mcu.UserConstants=
Mcu.UserName=STM32F103VCTx
MxCube.Version=6.2.1
MxDb.Version=DB.6.0.21
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.DMA1_Channel1_IRQn=true\:0\:0\:false\:false\:true\:false\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.EXTI2_IRQn=true\:0\:0\:false\:false\:true\:true\:true
NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false
NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false
@ -138,11 +159,12 @@ PB14.Mode=Full_Duplex_Master
PB14.Signal=SPI2_MISO
PB15.Mode=Full_Duplex_Master
PB15.Signal=SPI2_MOSI
PB2.GPIOParameters=GPIO_PuPd,GPIO_Label
PB2.GPIO_Label=Fault_12V
PB2.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultEXTI
PB2.GPIO_Label=EEM_POWER_FAULT
PB2.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_RISING_FALLING
PB2.GPIO_PuPd=GPIO_PULLUP
PB2.Locked=true
PB2.Signal=GPIO_Input
PB2.Signal=GPXTI2
PB3.Mode=Full_Duplex_Master
PB3.Signal=SPI1_SCK
PB4.Mode=Full_Duplex_Master
@ -150,7 +172,7 @@ PB4.Signal=SPI1_MISO
PB5.Mode=Full_Duplex_Master
PB5.Signal=SPI1_MOSI
PB6.GPIOParameters=PinState,GPIO_Label
PB6.GPIO_Label=SW_12V
PB6.GPIO_Label=EEM_POWER_SW
PB6.Locked=true
PB6.PinState=GPIO_PIN_SET
PB6.Signal=GPIO_Output
@ -214,7 +236,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=Makefile
ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=false
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-SystemClock_Config-RCC-false-HAL-false,3-MX_DAC_Init-DAC-false-HAL-true,4-MX_I2C1_Init-I2C1-false-HAL-true,5-MX_I2C2_Init-I2C2-false-HAL-true,6-MX_SPI1_Init-SPI1-false-HAL-true,7-MX_SPI2_Init-SPI2-false-HAL-true,8-MX_UART4_Init-UART4-false-HAL-true,9-MX_ADC1_Init-ADC1-false-HAL-true,10-MX_FSMC_Init-FSMC-false-HAL-true,11-MX_USART1_UART_Init-USART1-false-HAL-true,12-MX_TIM3_Init-TIM3-false-HAL-true,13-MX_TIM8_Init-TIM8-false-HAL-true,14-MX_TIM4_Init-TIM4-false-HAL-true
ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-HAL-true,2-MX_DMA_Init-DMA-false-HAL-true,3-SystemClock_Config-RCC-false-HAL-false,4-MX_DAC_Init-DAC-false-HAL-true,5-MX_I2C1_Init-I2C1-false-HAL-true,6-MX_I2C2_Init-I2C2-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_SPI2_Init-SPI2-false-HAL-true,9-MX_UART4_Init-UART4-false-HAL-true,10-MX_ADC1_Init-ADC1-false-HAL-true,11-MX_USART1_UART_Init-USART1-false-HAL-true,12-MX_TIM3_Init-TIM3-false-HAL-true,13-MX_TIM8_Init-TIM8-false-HAL-true,14-MX_TIM4_Init-TIM4-false-HAL-true
RCC.ADCFreqValue=12000000
RCC.ADCPresc=RCC_ADCPCLK2_DIV6
RCC.AHBFreq_Value=72000000
@ -268,6 +290,8 @@ SH.COMP_DAC1_group.0=DAC_OUT1,DAC_OUT1
SH.COMP_DAC1_group.ConfNb=1
SH.COMP_DAC2_group.0=DAC_OUT2,DAC_OUT2
SH.COMP_DAC2_group.ConfNb=1
SH.GPXTI2.0=GPIO_EXTI2
SH.GPXTI2.ConfNb=1
SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1
SH.S_TIM3_CH1.ConfNb=1
SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2
@ -276,8 +300,8 @@ SH.S_TIM8_CH3.0=TIM8_CH3,PWM Generation3 CH3
SH.S_TIM8_CH3.ConfNb=1
SH.S_TIM8_CH4.0=TIM8_CH4,PWM Generation4 CH4
SH.S_TIM8_CH4.ConfNb=1
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_128
SPI1.CalculateBaudRate=562.5 KBits/s
SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_4
SPI1.CalculateBaudRate=18.0 MBits/s
SPI1.Direction=SPI_DIRECTION_2LINES
SPI1.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
SPI1.Mode=SPI_MODE_MASTER
@ -291,9 +315,10 @@ SPI2.VirtualNSS=VM_NSSHARD
SPI2.VirtualType=VM_MASTER
TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1
TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2
TIM3.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Prescaler,Period
TIM3.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Prescaler,Period,TIM_MasterOutputTrigger
TIM3.Period=999
TIM3.Prescaler=71
TIM3.TIM_MasterOutputTrigger=TIM_TRGO_UPDATE
TIM4.IPParameters=Prescaler,Period
TIM4.Period=999
TIM4.Prescaler=71
@ -306,6 +331,8 @@ USART1.IPParameters=VirtualMode
USART1.VirtualMode=VM_ASYNC
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM3_VS_ClockSourceINT.Mode=Internal
VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT
VP_TIM4_VS_ClockSourceINT.Mode=Internal
VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT
board=custom

BIN
build/Syrostan-MCU-C.bin
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BIN
build/Syrostan-MCU-C.elf
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643
build/Syrostan-MCU-C.hex
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@ -1,643 +0,0 @@
:020000040800F2
:1000000000C00020D12600081F03000821030008BB
:100010002303000825030008270300080000000050
:10002000000000000000000000000000290300089C
:100030002B030008000000002D0300082F03000818
:100040001927000819270008192700081927000890
:100050001927000819270008192700081927000880
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build/adc.o: Core/Src/adc.c Core/Inc/adc.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/adc.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

529
build/adc.lst
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@ -1,529 +0,0 @@
ARM GAS /tmp/ccP0CRLP.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "adc.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.MX_ADC1_Init,"ax",%progbits
16 .align 1
17 .global MX_ADC1_Init
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 MX_ADC1_Init:
24 .LFB65:
25 .file 1 "Core/Src/adc.c"
1:Core/Src/adc.c **** /**
2:Core/Src/adc.c **** ******************************************************************************
3:Core/Src/adc.c **** * @file adc.c
4:Core/Src/adc.c **** * @brief This file provides code for the configuration
5:Core/Src/adc.c **** * of the ADC instances.
6:Core/Src/adc.c **** ******************************************************************************
7:Core/Src/adc.c **** * @attention
8:Core/Src/adc.c **** *
9:Core/Src/adc.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/adc.c **** * All rights reserved.</center></h2>
11:Core/Src/adc.c **** *
12:Core/Src/adc.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/adc.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/adc.c **** * License. You may obtain a copy of the License at:
15:Core/Src/adc.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/adc.c **** *
17:Core/Src/adc.c **** ******************************************************************************
18:Core/Src/adc.c **** */
19:Core/Src/adc.c ****
20:Core/Src/adc.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/adc.c **** #include "adc.h"
22:Core/Src/adc.c ****
23:Core/Src/adc.c **** /* USER CODE BEGIN 0 */
24:Core/Src/adc.c ****
25:Core/Src/adc.c **** /* USER CODE END 0 */
26:Core/Src/adc.c ****
27:Core/Src/adc.c **** ADC_HandleTypeDef hadc1;
28:Core/Src/adc.c ****
29:Core/Src/adc.c **** /* ADC1 init function */
30:Core/Src/adc.c **** void MX_ADC1_Init(void)
31:Core/Src/adc.c **** {
26 .loc 1 31 0
27 .cfi_startproc
ARM GAS /tmp/ccP0CRLP.s page 2
28 @ args = 0, pretend = 0, frame = 16
29 @ frame_needed = 0, uses_anonymous_args = 0
30 0000 00B5 push {lr}
31 .LCFI0:
32 .cfi_def_cfa_offset 4
33 .cfi_offset 14, -4
34 0002 85B0 sub sp, sp, #20
35 .LCFI1:
36 .cfi_def_cfa_offset 24
32:Core/Src/adc.c ****
33:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_Init 0 */
34:Core/Src/adc.c ****
35:Core/Src/adc.c **** /* USER CODE END ADC1_Init 0 */
36:Core/Src/adc.c ****
37:Core/Src/adc.c **** ADC_ChannelConfTypeDef sConfig = {0};
37 .loc 1 37 0
38 0004 0023 movs r3, #0
39 0006 0193 str r3, [sp, #4]
40 0008 0293 str r3, [sp, #8]
41 000a 0393 str r3, [sp, #12]
38:Core/Src/adc.c ****
39:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_Init 1 */
40:Core/Src/adc.c ****
41:Core/Src/adc.c **** /* USER CODE END ADC1_Init 1 */
42:Core/Src/adc.c **** /** Common config
43:Core/Src/adc.c **** */
44:Core/Src/adc.c **** hadc1.Instance = ADC1;
42 .loc 1 44 0
43 000c 1048 ldr r0, .L7
44 000e 114A ldr r2, .L7+4
45 0010 0260 str r2, [r0]
45:Core/Src/adc.c **** hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
46 .loc 1 45 0
47 0012 8360 str r3, [r0, #8]
46:Core/Src/adc.c **** hadc1.Init.ContinuousConvMode = DISABLE;
48 .loc 1 46 0
49 0014 0373 strb r3, [r0, #12]
47:Core/Src/adc.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
50 .loc 1 47 0
51 0016 0375 strb r3, [r0, #20]
48:Core/Src/adc.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
52 .loc 1 48 0
53 0018 4FF46022 mov r2, #917504
54 001c C261 str r2, [r0, #28]
49:Core/Src/adc.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
55 .loc 1 49 0
56 001e 4360 str r3, [r0, #4]
50:Core/Src/adc.c **** hadc1.Init.NbrOfConversion = 1;
57 .loc 1 50 0
58 0020 0123 movs r3, #1
59 0022 0361 str r3, [r0, #16]
51:Core/Src/adc.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
60 .loc 1 51 0
61 0024 FFF7FEFF bl HAL_ADC_Init
62 .LVL0:
63 0028 60B9 cbnz r0, .L5
64 .L2:
ARM GAS /tmp/ccP0CRLP.s page 3
52:Core/Src/adc.c **** {
53:Core/Src/adc.c **** Error_Handler();
54:Core/Src/adc.c **** }
55:Core/Src/adc.c **** /** Configure Regular Channel
56:Core/Src/adc.c **** */
57:Core/Src/adc.c **** sConfig.Channel = ADC_CHANNEL_0;
65 .loc 1 57 0
66 002a 0023 movs r3, #0
67 002c 0193 str r3, [sp, #4]
58:Core/Src/adc.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
68 .loc 1 58 0
69 002e 0122 movs r2, #1
70 0030 0292 str r2, [sp, #8]
59:Core/Src/adc.c **** sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
71 .loc 1 59 0
72 0032 0393 str r3, [sp, #12]
60:Core/Src/adc.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
73 .loc 1 60 0
74 0034 01A9 add r1, sp, #4
75 0036 0648 ldr r0, .L7
76 0038 FFF7FEFF bl HAL_ADC_ConfigChannel
77 .LVL1:
78 003c 28B9 cbnz r0, .L6
79 .L1:
61:Core/Src/adc.c **** {
62:Core/Src/adc.c **** Error_Handler();
63:Core/Src/adc.c **** }
64:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_Init 2 */
65:Core/Src/adc.c ****
66:Core/Src/adc.c **** /* USER CODE END ADC1_Init 2 */
67:Core/Src/adc.c ****
68:Core/Src/adc.c **** }
80 .loc 1 68 0
81 003e 05B0 add sp, sp, #20
82 .LCFI2:
83 .cfi_remember_state
84 .cfi_def_cfa_offset 4
85 @ sp needed
86 0040 5DF804FB ldr pc, [sp], #4
87 .L5:
88 .LCFI3:
89 .cfi_restore_state
53:Core/Src/adc.c **** }
90 .loc 1 53 0
91 0044 FFF7FEFF bl Error_Handler
92 .LVL2:
93 0048 EFE7 b .L2
94 .L6:
62:Core/Src/adc.c **** }
95 .loc 1 62 0
96 004a FFF7FEFF bl Error_Handler
97 .LVL3:
98 .loc 1 68 0
99 004e F6E7 b .L1
100 .L8:
101 .align 2
102 .L7:
ARM GAS /tmp/ccP0CRLP.s page 4
103 0050 00000000 .word hadc1
104 0054 00240140 .word 1073816576
105 .cfi_endproc
106 .LFE65:
108 .section .text.HAL_ADC_MspInit,"ax",%progbits
109 .align 1
110 .global HAL_ADC_MspInit
111 .syntax unified
112 .thumb
113 .thumb_func
114 .fpu softvfp
116 HAL_ADC_MspInit:
117 .LFB66:
69:Core/Src/adc.c ****
70:Core/Src/adc.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
71:Core/Src/adc.c **** {
118 .loc 1 71 0
119 .cfi_startproc
120 @ args = 0, pretend = 0, frame = 32
121 @ frame_needed = 0, uses_anonymous_args = 0
122 .LVL4:
123 0000 10B5 push {r4, lr}
124 .LCFI4:
125 .cfi_def_cfa_offset 8
126 .cfi_offset 4, -8
127 .cfi_offset 14, -4
128 0002 88B0 sub sp, sp, #32
129 .LCFI5:
130 .cfi_def_cfa_offset 40
72:Core/Src/adc.c ****
73:Core/Src/adc.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
131 .loc 1 73 0
132 0004 0023 movs r3, #0
133 0006 0493 str r3, [sp, #16]
134 0008 0593 str r3, [sp, #20]
135 000a 0693 str r3, [sp, #24]
136 000c 0793 str r3, [sp, #28]
74:Core/Src/adc.c **** if(adcHandle->Instance==ADC1)
137 .loc 1 74 0
138 000e 0268 ldr r2, [r0]
139 0010 204B ldr r3, .L13
140 0012 9A42 cmp r2, r3
141 0014 01D0 beq .L12
142 .LVL5:
143 .L9:
75:Core/Src/adc.c **** {
76:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_MspInit 0 */
77:Core/Src/adc.c ****
78:Core/Src/adc.c **** /* USER CODE END ADC1_MspInit 0 */
79:Core/Src/adc.c **** /* ADC1 clock enable */
80:Core/Src/adc.c **** __HAL_RCC_ADC1_CLK_ENABLE();
81:Core/Src/adc.c ****
82:Core/Src/adc.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
83:Core/Src/adc.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
84:Core/Src/adc.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
85:Core/Src/adc.c **** /**ADC1 GPIO Configuration
86:Core/Src/adc.c **** PC2 ------> ADC1_IN12
ARM GAS /tmp/ccP0CRLP.s page 5
87:Core/Src/adc.c **** PA0-WKUP ------> ADC1_IN0
88:Core/Src/adc.c **** PA1 ------> ADC1_IN1
89:Core/Src/adc.c **** PA2 ------> ADC1_IN2
90:Core/Src/adc.c **** PA3 ------> ADC1_IN3
91:Core/Src/adc.c **** PA6 ------> ADC1_IN6
92:Core/Src/adc.c **** PA7 ------> ADC1_IN7
93:Core/Src/adc.c **** PC4 ------> ADC1_IN14
94:Core/Src/adc.c **** PC5 ------> ADC1_IN15
95:Core/Src/adc.c **** PB0 ------> ADC1_IN8
96:Core/Src/adc.c **** PB1 ------> ADC1_IN9
97:Core/Src/adc.c **** */
98:Core/Src/adc.c **** GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5;
99:Core/Src/adc.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
100:Core/Src/adc.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
101:Core/Src/adc.c ****
102:Core/Src/adc.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
103:Core/Src/adc.c **** |GPIO_PIN_6|GPIO_PIN_7;
104:Core/Src/adc.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
105:Core/Src/adc.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
106:Core/Src/adc.c ****
107:Core/Src/adc.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
108:Core/Src/adc.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
109:Core/Src/adc.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
110:Core/Src/adc.c ****
111:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_MspInit 1 */
112:Core/Src/adc.c ****
113:Core/Src/adc.c **** /* USER CODE END ADC1_MspInit 1 */
114:Core/Src/adc.c **** }
115:Core/Src/adc.c **** }
144 .loc 1 115 0
145 0016 08B0 add sp, sp, #32
146 .LCFI6:
147 .cfi_remember_state
148 .cfi_def_cfa_offset 8
149 @ sp needed
150 0018 10BD pop {r4, pc}
151 .LVL6:
152 .L12:
153 .LCFI7:
154 .cfi_restore_state
155 .LBB2:
80:Core/Src/adc.c ****
156 .loc 1 80 0
157 001a 03F56C43 add r3, r3, #60416
158 001e 9A69 ldr r2, [r3, #24]
159 0020 42F40072 orr r2, r2, #512
160 0024 9A61 str r2, [r3, #24]
161 0026 9A69 ldr r2, [r3, #24]
162 0028 02F40072 and r2, r2, #512
163 002c 0092 str r2, [sp]
164 002e 009A ldr r2, [sp]
165 .LBE2:
166 .LBB3:
82:Core/Src/adc.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
167 .loc 1 82 0
168 0030 9A69 ldr r2, [r3, #24]
169 0032 42F01002 orr r2, r2, #16
ARM GAS /tmp/ccP0CRLP.s page 6
170 0036 9A61 str r2, [r3, #24]
171 0038 9A69 ldr r2, [r3, #24]
172 003a 02F01002 and r2, r2, #16
173 003e 0192 str r2, [sp, #4]
174 0040 019A ldr r2, [sp, #4]
175 .LBE3:
176 .LBB4:
83:Core/Src/adc.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
177 .loc 1 83 0
178 0042 9A69 ldr r2, [r3, #24]
179 0044 42F00402 orr r2, r2, #4
180 0048 9A61 str r2, [r3, #24]
181 004a 9A69 ldr r2, [r3, #24]
182 004c 02F00402 and r2, r2, #4
183 0050 0292 str r2, [sp, #8]
184 0052 029A ldr r2, [sp, #8]
185 .LBE4:
186 .LBB5:
84:Core/Src/adc.c **** /**ADC1 GPIO Configuration
187 .loc 1 84 0
188 0054 9A69 ldr r2, [r3, #24]
189 0056 42F00802 orr r2, r2, #8
190 005a 9A61 str r2, [r3, #24]
191 005c 9B69 ldr r3, [r3, #24]
192 005e 03F00803 and r3, r3, #8
193 0062 0393 str r3, [sp, #12]
194 0064 039B ldr r3, [sp, #12]
195 .LBE5:
98:Core/Src/adc.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
196 .loc 1 98 0
197 0066 3423 movs r3, #52
198 0068 0493 str r3, [sp, #16]
99:Core/Src/adc.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
199 .loc 1 99 0
200 006a 0324 movs r4, #3
201 006c 0594 str r4, [sp, #20]
100:Core/Src/adc.c ****
202 .loc 1 100 0
203 006e 04A9 add r1, sp, #16
204 0070 0948 ldr r0, .L13+4
205 .LVL7:
206 0072 FFF7FEFF bl HAL_GPIO_Init
207 .LVL8:
102:Core/Src/adc.c **** |GPIO_PIN_6|GPIO_PIN_7;
208 .loc 1 102 0
209 0076 CF23 movs r3, #207
210 0078 0493 str r3, [sp, #16]
104:Core/Src/adc.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
211 .loc 1 104 0
212 007a 0594 str r4, [sp, #20]
105:Core/Src/adc.c ****
213 .loc 1 105 0
214 007c 04A9 add r1, sp, #16
215 007e 0748 ldr r0, .L13+8
216 0080 FFF7FEFF bl HAL_GPIO_Init
217 .LVL9:
107:Core/Src/adc.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
ARM GAS /tmp/ccP0CRLP.s page 7
218 .loc 1 107 0
219 0084 0494 str r4, [sp, #16]
108:Core/Src/adc.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
220 .loc 1 108 0
221 0086 0594 str r4, [sp, #20]
109:Core/Src/adc.c ****
222 .loc 1 109 0
223 0088 04A9 add r1, sp, #16
224 008a 0548 ldr r0, .L13+12
225 008c FFF7FEFF bl HAL_GPIO_Init
226 .LVL10:
227 .loc 1 115 0
228 0090 C1E7 b .L9
229 .L14:
230 0092 00BF .align 2
231 .L13:
232 0094 00240140 .word 1073816576
233 0098 00100140 .word 1073811456
234 009c 00080140 .word 1073809408
235 00a0 000C0140 .word 1073810432
236 .cfi_endproc
237 .LFE66:
239 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
240 .align 1
241 .global HAL_ADC_MspDeInit
242 .syntax unified
243 .thumb
244 .thumb_func
245 .fpu softvfp
247 HAL_ADC_MspDeInit:
248 .LFB67:
116:Core/Src/adc.c ****
117:Core/Src/adc.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
118:Core/Src/adc.c **** {
249 .loc 1 118 0
250 .cfi_startproc
251 @ args = 0, pretend = 0, frame = 0
252 @ frame_needed = 0, uses_anonymous_args = 0
253 .LVL11:
254 0000 08B5 push {r3, lr}
255 .LCFI8:
256 .cfi_def_cfa_offset 8
257 .cfi_offset 3, -8
258 .cfi_offset 14, -4
119:Core/Src/adc.c ****
120:Core/Src/adc.c **** if(adcHandle->Instance==ADC1)
259 .loc 1 120 0
260 0002 0268 ldr r2, [r0]
261 0004 0A4B ldr r3, .L19
262 0006 9A42 cmp r2, r3
263 0008 00D0 beq .L18
264 .LVL12:
265 .L15:
266 000a 08BD pop {r3, pc}
267 .LVL13:
268 .L18:
121:Core/Src/adc.c **** {
ARM GAS /tmp/ccP0CRLP.s page 8
122:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */
123:Core/Src/adc.c ****
124:Core/Src/adc.c **** /* USER CODE END ADC1_MspDeInit 0 */
125:Core/Src/adc.c **** /* Peripheral clock disable */
126:Core/Src/adc.c **** __HAL_RCC_ADC1_CLK_DISABLE();
269 .loc 1 126 0
270 000c 094A ldr r2, .L19+4
271 000e 9369 ldr r3, [r2, #24]
272 0010 23F40073 bic r3, r3, #512
273 0014 9361 str r3, [r2, #24]
127:Core/Src/adc.c ****
128:Core/Src/adc.c **** /**ADC1 GPIO Configuration
129:Core/Src/adc.c **** PC2 ------> ADC1_IN12
130:Core/Src/adc.c **** PA0-WKUP ------> ADC1_IN0
131:Core/Src/adc.c **** PA1 ------> ADC1_IN1
132:Core/Src/adc.c **** PA2 ------> ADC1_IN2
133:Core/Src/adc.c **** PA3 ------> ADC1_IN3
134:Core/Src/adc.c **** PA6 ------> ADC1_IN6
135:Core/Src/adc.c **** PA7 ------> ADC1_IN7
136:Core/Src/adc.c **** PC4 ------> ADC1_IN14
137:Core/Src/adc.c **** PC5 ------> ADC1_IN15
138:Core/Src/adc.c **** PB0 ------> ADC1_IN8
139:Core/Src/adc.c **** PB1 ------> ADC1_IN9
140:Core/Src/adc.c **** */
141:Core/Src/adc.c **** HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_4|GPIO_PIN_5);
274 .loc 1 141 0
275 0016 3421 movs r1, #52
276 0018 0748 ldr r0, .L19+8
277 .LVL14:
278 001a FFF7FEFF bl HAL_GPIO_DeInit
279 .LVL15:
142:Core/Src/adc.c ****
143:Core/Src/adc.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
280 .loc 1 143 0
281 001e CF21 movs r1, #207
282 0020 0648 ldr r0, .L19+12
283 0022 FFF7FEFF bl HAL_GPIO_DeInit
284 .LVL16:
144:Core/Src/adc.c **** |GPIO_PIN_6|GPIO_PIN_7);
145:Core/Src/adc.c ****
146:Core/Src/adc.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0|GPIO_PIN_1);
285 .loc 1 146 0
286 0026 0321 movs r1, #3
287 0028 0548 ldr r0, .L19+16
288 002a FFF7FEFF bl HAL_GPIO_DeInit
289 .LVL17:
147:Core/Src/adc.c ****
148:Core/Src/adc.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */
149:Core/Src/adc.c ****
150:Core/Src/adc.c **** /* USER CODE END ADC1_MspDeInit 1 */
151:Core/Src/adc.c **** }
152:Core/Src/adc.c **** }
290 .loc 1 152 0
291 002e ECE7 b .L15
292 .L20:
293 .align 2
294 .L19:
ARM GAS /tmp/ccP0CRLP.s page 9
295 0030 00240140 .word 1073816576
296 0034 00100240 .word 1073876992
297 0038 00100140 .word 1073811456
298 003c 00080140 .word 1073809408
299 0040 000C0140 .word 1073810432
300 .cfi_endproc
301 .LFE67:
303 .comm hadc1,48,4
304 .text
305 .Letext0:
306 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
307 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
308 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
309 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
310 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
311 .file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h"
312 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
313 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
314 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
315 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h"
316 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
317 .file 13 "Core/Inc/adc.h"
318 .file 14 "Core/Inc/main.h"
ARM GAS /tmp/ccP0CRLP.s page 10
DEFINED SYMBOLS
*ABS*:0000000000000000 adc.c
/tmp/ccP0CRLP.s:16 .text.MX_ADC1_Init:0000000000000000 $t
/tmp/ccP0CRLP.s:23 .text.MX_ADC1_Init:0000000000000000 MX_ADC1_Init
/tmp/ccP0CRLP.s:103 .text.MX_ADC1_Init:0000000000000050 $d
*COM*:0000000000000030 hadc1
/tmp/ccP0CRLP.s:109 .text.HAL_ADC_MspInit:0000000000000000 $t
/tmp/ccP0CRLP.s:116 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
/tmp/ccP0CRLP.s:232 .text.HAL_ADC_MspInit:0000000000000094 $d
/tmp/ccP0CRLP.s:240 .text.HAL_ADC_MspDeInit:0000000000000000 $t
/tmp/ccP0CRLP.s:247 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
/tmp/ccP0CRLP.s:295 .text.HAL_ADC_MspDeInit:0000000000000030 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_ADC_Init
HAL_ADC_ConfigChannel
Error_Handler
HAL_GPIO_Init
HAL_GPIO_DeInit

BIN
build/adc.o
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96
build/dac.d
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@ -1,96 +0,0 @@
build/dac.o: Core/Src/dac.c Core/Inc/dac.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/dac.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

421
build/dac.lst
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@ -1,421 +0,0 @@
ARM GAS /tmp/ccOso6GW.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "dac.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.MX_DAC_Init,"ax",%progbits
16 .align 1
17 .global MX_DAC_Init
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 MX_DAC_Init:
24 .LFB65:
25 .file 1 "Core/Src/dac.c"
1:Core/Src/dac.c **** /**
2:Core/Src/dac.c **** ******************************************************************************
3:Core/Src/dac.c **** * @file dac.c
4:Core/Src/dac.c **** * @brief This file provides code for the configuration
5:Core/Src/dac.c **** * of the DAC instances.
6:Core/Src/dac.c **** ******************************************************************************
7:Core/Src/dac.c **** * @attention
8:Core/Src/dac.c **** *
9:Core/Src/dac.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/dac.c **** * All rights reserved.</center></h2>
11:Core/Src/dac.c **** *
12:Core/Src/dac.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/dac.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/dac.c **** * License. You may obtain a copy of the License at:
15:Core/Src/dac.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/dac.c **** *
17:Core/Src/dac.c **** ******************************************************************************
18:Core/Src/dac.c **** */
19:Core/Src/dac.c ****
20:Core/Src/dac.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/dac.c **** #include "dac.h"
22:Core/Src/dac.c ****
23:Core/Src/dac.c **** /* USER CODE BEGIN 0 */
24:Core/Src/dac.c ****
25:Core/Src/dac.c **** /* USER CODE END 0 */
26:Core/Src/dac.c ****
27:Core/Src/dac.c **** DAC_HandleTypeDef hdac;
28:Core/Src/dac.c ****
29:Core/Src/dac.c **** /* DAC init function */
30:Core/Src/dac.c **** void MX_DAC_Init(void)
31:Core/Src/dac.c **** {
26 .loc 1 31 0
27 .cfi_startproc
ARM GAS /tmp/ccOso6GW.s page 2
28 @ args = 0, pretend = 0, frame = 8
29 @ frame_needed = 0, uses_anonymous_args = 0
30 0000 00B5 push {lr}
31 .LCFI0:
32 .cfi_def_cfa_offset 4
33 .cfi_offset 14, -4
34 0002 83B0 sub sp, sp, #12
35 .LCFI1:
36 .cfi_def_cfa_offset 16
32:Core/Src/dac.c ****
33:Core/Src/dac.c **** /* USER CODE BEGIN DAC_Init 0 */
34:Core/Src/dac.c ****
35:Core/Src/dac.c **** /* USER CODE END DAC_Init 0 */
36:Core/Src/dac.c ****
37:Core/Src/dac.c **** DAC_ChannelConfTypeDef sConfig = {0};
37 .loc 1 37 0
38 0004 0023 movs r3, #0
39 0006 0093 str r3, [sp]
40 0008 0193 str r3, [sp, #4]
38:Core/Src/dac.c ****
39:Core/Src/dac.c **** /* USER CODE BEGIN DAC_Init 1 */
40:Core/Src/dac.c ****
41:Core/Src/dac.c **** /* USER CODE END DAC_Init 1 */
42:Core/Src/dac.c **** /** DAC Initialization
43:Core/Src/dac.c **** */
44:Core/Src/dac.c **** hdac.Instance = DAC;
41 .loc 1 44 0
42 000a 1048 ldr r0, .L9
43 000c 104B ldr r3, .L9+4
44 000e 0360 str r3, [r0]
45:Core/Src/dac.c **** if (HAL_DAC_Init(&hdac) != HAL_OK)
45 .loc 1 45 0
46 0010 FFF7FEFF bl HAL_DAC_Init
47 .LVL0:
48 0014 80B9 cbnz r0, .L6
49 .L2:
46:Core/Src/dac.c **** {
47:Core/Src/dac.c **** Error_Handler();
48:Core/Src/dac.c **** }
49:Core/Src/dac.c **** /** DAC channel OUT1 config
50:Core/Src/dac.c **** */
51:Core/Src/dac.c **** sConfig.DAC_Trigger = DAC_TRIGGER_NONE;
50 .loc 1 51 0
51 0016 0022 movs r2, #0
52 0018 0092 str r2, [sp]
52:Core/Src/dac.c **** sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
53 .loc 1 52 0
54 001a 0192 str r2, [sp, #4]
53:Core/Src/dac.c **** if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_1) != HAL_OK)
55 .loc 1 53 0
56 001c 6946 mov r1, sp
57 001e 0B48 ldr r0, .L9
58 0020 FFF7FEFF bl HAL_DAC_ConfigChannel
59 .LVL1:
60 0024 58B9 cbnz r0, .L7
61 .L3:
54:Core/Src/dac.c **** {
ARM GAS /tmp/ccOso6GW.s page 3
55:Core/Src/dac.c **** Error_Handler();
56:Core/Src/dac.c **** }
57:Core/Src/dac.c **** /** DAC channel OUT2 config
58:Core/Src/dac.c **** */
59:Core/Src/dac.c **** if (HAL_DAC_ConfigChannel(&hdac, &sConfig, DAC_CHANNEL_2) != HAL_OK)
62 .loc 1 59 0
63 0026 1022 movs r2, #16
64 0028 6946 mov r1, sp
65 002a 0848 ldr r0, .L9
66 002c FFF7FEFF bl HAL_DAC_ConfigChannel
67 .LVL2:
68 0030 40B9 cbnz r0, .L8
69 .L1:
60:Core/Src/dac.c **** {
61:Core/Src/dac.c **** Error_Handler();
62:Core/Src/dac.c **** }
63:Core/Src/dac.c **** /* USER CODE BEGIN DAC_Init 2 */
64:Core/Src/dac.c ****
65:Core/Src/dac.c **** /* USER CODE END DAC_Init 2 */
66:Core/Src/dac.c ****
67:Core/Src/dac.c **** }
70 .loc 1 67 0
71 0032 03B0 add sp, sp, #12
72 .LCFI2:
73 .cfi_remember_state
74 .cfi_def_cfa_offset 4
75 @ sp needed
76 0034 5DF804FB ldr pc, [sp], #4
77 .L6:
78 .LCFI3:
79 .cfi_restore_state
47:Core/Src/dac.c **** }
80 .loc 1 47 0
81 0038 FFF7FEFF bl Error_Handler
82 .LVL3:
83 003c EBE7 b .L2
84 .L7:
55:Core/Src/dac.c **** }
85 .loc 1 55 0
86 003e FFF7FEFF bl Error_Handler
87 .LVL4:
88 0042 F0E7 b .L3
89 .L8:
61:Core/Src/dac.c **** }
90 .loc 1 61 0
91 0044 FFF7FEFF bl Error_Handler
92 .LVL5:
93 .loc 1 67 0
94 0048 F3E7 b .L1
95 .L10:
96 004a 00BF .align 2
97 .L9:
98 004c 00000000 .word hdac
99 0050 00740040 .word 1073771520
100 .cfi_endproc
101 .LFE65:
103 .section .text.HAL_DAC_MspInit,"ax",%progbits
ARM GAS /tmp/ccOso6GW.s page 4
104 .align 1
105 .global HAL_DAC_MspInit
106 .syntax unified
107 .thumb
108 .thumb_func
109 .fpu softvfp
111 HAL_DAC_MspInit:
112 .LFB66:
68:Core/Src/dac.c ****
69:Core/Src/dac.c **** void HAL_DAC_MspInit(DAC_HandleTypeDef* dacHandle)
70:Core/Src/dac.c **** {
113 .loc 1 70 0
114 .cfi_startproc
115 @ args = 0, pretend = 0, frame = 24
116 @ frame_needed = 0, uses_anonymous_args = 0
117 .LVL6:
118 0000 00B5 push {lr}
119 .LCFI4:
120 .cfi_def_cfa_offset 4
121 .cfi_offset 14, -4
122 0002 87B0 sub sp, sp, #28
123 .LCFI5:
124 .cfi_def_cfa_offset 32
71:Core/Src/dac.c ****
72:Core/Src/dac.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
125 .loc 1 72 0
126 0004 0023 movs r3, #0
127 0006 0293 str r3, [sp, #8]
128 0008 0393 str r3, [sp, #12]
129 000a 0493 str r3, [sp, #16]
130 000c 0593 str r3, [sp, #20]
73:Core/Src/dac.c **** if(dacHandle->Instance==DAC)
131 .loc 1 73 0
132 000e 0268 ldr r2, [r0]
133 0010 114B ldr r3, .L15
134 0012 9A42 cmp r2, r3
135 0014 02D0 beq .L14
136 .LVL7:
137 .L11:
74:Core/Src/dac.c **** {
75:Core/Src/dac.c **** /* USER CODE BEGIN DAC_MspInit 0 */
76:Core/Src/dac.c ****
77:Core/Src/dac.c **** /* USER CODE END DAC_MspInit 0 */
78:Core/Src/dac.c **** /* DAC clock enable */
79:Core/Src/dac.c **** __HAL_RCC_DAC_CLK_ENABLE();
80:Core/Src/dac.c ****
81:Core/Src/dac.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
82:Core/Src/dac.c **** /**DAC GPIO Configuration
83:Core/Src/dac.c **** PA4 ------> DAC_OUT1
84:Core/Src/dac.c **** PA5 ------> DAC_OUT2
85:Core/Src/dac.c **** */
86:Core/Src/dac.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
87:Core/Src/dac.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
88:Core/Src/dac.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
89:Core/Src/dac.c ****
90:Core/Src/dac.c **** /* USER CODE BEGIN DAC_MspInit 1 */
91:Core/Src/dac.c ****
ARM GAS /tmp/ccOso6GW.s page 5
92:Core/Src/dac.c **** /* USER CODE END DAC_MspInit 1 */
93:Core/Src/dac.c **** }
94:Core/Src/dac.c **** }
138 .loc 1 94 0
139 0016 07B0 add sp, sp, #28
140 .LCFI6:
141 .cfi_remember_state
142 .cfi_def_cfa_offset 4
143 @ sp needed
144 0018 5DF804FB ldr pc, [sp], #4
145 .LVL8:
146 .L14:
147 .LCFI7:
148 .cfi_restore_state
149 .LBB2:
79:Core/Src/dac.c ****
150 .loc 1 79 0
151 001c 03F5CE33 add r3, r3, #105472
152 0020 DA69 ldr r2, [r3, #28]
153 0022 42F00052 orr r2, r2, #536870912
154 0026 DA61 str r2, [r3, #28]
155 0028 DA69 ldr r2, [r3, #28]
156 002a 02F00052 and r2, r2, #536870912
157 002e 0092 str r2, [sp]
158 0030 009A ldr r2, [sp]
159 .LBE2:
160 .LBB3:
81:Core/Src/dac.c **** /**DAC GPIO Configuration
161 .loc 1 81 0
162 0032 9A69 ldr r2, [r3, #24]
163 0034 42F00402 orr r2, r2, #4
164 0038 9A61 str r2, [r3, #24]
165 003a 9B69 ldr r3, [r3, #24]
166 003c 03F00403 and r3, r3, #4
167 0040 0193 str r3, [sp, #4]
168 0042 019B ldr r3, [sp, #4]
169 .LBE3:
86:Core/Src/dac.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
170 .loc 1 86 0
171 0044 3023 movs r3, #48
172 0046 0293 str r3, [sp, #8]
87:Core/Src/dac.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
173 .loc 1 87 0
174 0048 0323 movs r3, #3
175 004a 0393 str r3, [sp, #12]
88:Core/Src/dac.c ****
176 .loc 1 88 0
177 004c 02A9 add r1, sp, #8
178 004e 0348 ldr r0, .L15+4
179 .LVL9:
180 0050 FFF7FEFF bl HAL_GPIO_Init
181 .LVL10:
182 .loc 1 94 0
183 0054 DFE7 b .L11
184 .L16:
185 0056 00BF .align 2
186 .L15:
ARM GAS /tmp/ccOso6GW.s page 6
187 0058 00740040 .word 1073771520
188 005c 00080140 .word 1073809408
189 .cfi_endproc
190 .LFE66:
192 .section .text.HAL_DAC_MspDeInit,"ax",%progbits
193 .align 1
194 .global HAL_DAC_MspDeInit
195 .syntax unified
196 .thumb
197 .thumb_func
198 .fpu softvfp
200 HAL_DAC_MspDeInit:
201 .LFB67:
95:Core/Src/dac.c ****
96:Core/Src/dac.c **** void HAL_DAC_MspDeInit(DAC_HandleTypeDef* dacHandle)
97:Core/Src/dac.c **** {
202 .loc 1 97 0
203 .cfi_startproc
204 @ args = 0, pretend = 0, frame = 0
205 @ frame_needed = 0, uses_anonymous_args = 0
206 .LVL11:
207 0000 08B5 push {r3, lr}
208 .LCFI8:
209 .cfi_def_cfa_offset 8
210 .cfi_offset 3, -8
211 .cfi_offset 14, -4
98:Core/Src/dac.c ****
99:Core/Src/dac.c **** if(dacHandle->Instance==DAC)
212 .loc 1 99 0
213 0002 0268 ldr r2, [r0]
214 0004 064B ldr r3, .L21
215 0006 9A42 cmp r2, r3
216 0008 00D0 beq .L20
217 .LVL12:
218 .L17:
219 000a 08BD pop {r3, pc}
220 .LVL13:
221 .L20:
100:Core/Src/dac.c **** {
101:Core/Src/dac.c **** /* USER CODE BEGIN DAC_MspDeInit 0 */
102:Core/Src/dac.c ****
103:Core/Src/dac.c **** /* USER CODE END DAC_MspDeInit 0 */
104:Core/Src/dac.c **** /* Peripheral clock disable */
105:Core/Src/dac.c **** __HAL_RCC_DAC_CLK_DISABLE();
222 .loc 1 105 0
223 000c 054A ldr r2, .L21+4
224 000e D369 ldr r3, [r2, #28]
225 0010 23F00053 bic r3, r3, #536870912
226 0014 D361 str r3, [r2, #28]
106:Core/Src/dac.c ****
107:Core/Src/dac.c **** /**DAC GPIO Configuration
108:Core/Src/dac.c **** PA4 ------> DAC_OUT1
109:Core/Src/dac.c **** PA5 ------> DAC_OUT2
110:Core/Src/dac.c **** */
111:Core/Src/dac.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5);
227 .loc 1 111 0
228 0016 3021 movs r1, #48
ARM GAS /tmp/ccOso6GW.s page 7
229 0018 0348 ldr r0, .L21+8
230 .LVL14:
231 001a FFF7FEFF bl HAL_GPIO_DeInit
232 .LVL15:
112:Core/Src/dac.c ****
113:Core/Src/dac.c **** /* USER CODE BEGIN DAC_MspDeInit 1 */
114:Core/Src/dac.c ****
115:Core/Src/dac.c **** /* USER CODE END DAC_MspDeInit 1 */
116:Core/Src/dac.c **** }
117:Core/Src/dac.c **** }
233 .loc 1 117 0
234 001e F4E7 b .L17
235 .L22:
236 .align 2
237 .L21:
238 0020 00740040 .word 1073771520
239 0024 00100240 .word 1073876992
240 0028 00080140 .word 1073809408
241 .cfi_endproc
242 .LFE67:
244 .comm hdac,20,4
245 .text
246 .Letext0:
247 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
248 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
249 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
250 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
251 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
252 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
253 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
254 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
255 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h"
256 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
257 .file 12 "Core/Inc/dac.h"
258 .file 13 "Core/Inc/main.h"
ARM GAS /tmp/ccOso6GW.s page 8
DEFINED SYMBOLS
*ABS*:0000000000000000 dac.c
/tmp/ccOso6GW.s:16 .text.MX_DAC_Init:0000000000000000 $t
/tmp/ccOso6GW.s:23 .text.MX_DAC_Init:0000000000000000 MX_DAC_Init
/tmp/ccOso6GW.s:98 .text.MX_DAC_Init:000000000000004c $d
*COM*:0000000000000014 hdac
/tmp/ccOso6GW.s:104 .text.HAL_DAC_MspInit:0000000000000000 $t
/tmp/ccOso6GW.s:111 .text.HAL_DAC_MspInit:0000000000000000 HAL_DAC_MspInit
/tmp/ccOso6GW.s:187 .text.HAL_DAC_MspInit:0000000000000058 $d
/tmp/ccOso6GW.s:193 .text.HAL_DAC_MspDeInit:0000000000000000 $t
/tmp/ccOso6GW.s:200 .text.HAL_DAC_MspDeInit:0000000000000000 HAL_DAC_MspDeInit
/tmp/ccOso6GW.s:238 .text.HAL_DAC_MspDeInit:0000000000000020 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_DAC_Init
HAL_DAC_ConfigChannel
Error_Handler
HAL_GPIO_Init
HAL_GPIO_DeInit

BIN
build/dac.o
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Binary file not shown.

102
build/fsmc.d
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@ -1,102 +0,0 @@
build/fsmc.o: Core/Src/fsmc.c Core/Inc/fsmc.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/fsmc.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

737
build/fsmc.lst
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@ -1,737 +0,0 @@
ARM GAS /tmp/cc5v6Cmy.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "fsmc.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_FSMC_MspInit,"ax",%progbits
16 .align 1
17 .syntax unified
18 .thumb
19 .thumb_func
20 .fpu softvfp
22 HAL_FSMC_MspInit:
23 .LFB66:
24 .file 1 "Core/Src/fsmc.c"
1:Core/Src/fsmc.c **** /**
2:Core/Src/fsmc.c **** ******************************************************************************
3:Core/Src/fsmc.c **** * File Name : FSMC.c
4:Core/Src/fsmc.c **** * Description : This file provides code for the configuration
5:Core/Src/fsmc.c **** * of the FSMC peripheral.
6:Core/Src/fsmc.c **** ******************************************************************************
7:Core/Src/fsmc.c **** * @attention
8:Core/Src/fsmc.c **** *
9:Core/Src/fsmc.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/fsmc.c **** * All rights reserved.</center></h2>
11:Core/Src/fsmc.c **** *
12:Core/Src/fsmc.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/fsmc.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/fsmc.c **** * License. You may obtain a copy of the License at:
15:Core/Src/fsmc.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/fsmc.c **** *
17:Core/Src/fsmc.c **** ******************************************************************************
18:Core/Src/fsmc.c **** */
19:Core/Src/fsmc.c ****
20:Core/Src/fsmc.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/fsmc.c **** #include "fsmc.h"
22:Core/Src/fsmc.c ****
23:Core/Src/fsmc.c **** /* USER CODE BEGIN 0 */
24:Core/Src/fsmc.c ****
25:Core/Src/fsmc.c **** /* USER CODE END 0 */
26:Core/Src/fsmc.c ****
27:Core/Src/fsmc.c **** SRAM_HandleTypeDef hsram1;
28:Core/Src/fsmc.c ****
29:Core/Src/fsmc.c **** /* FSMC initialization function */
30:Core/Src/fsmc.c **** void MX_FSMC_Init(void)
31:Core/Src/fsmc.c **** {
32:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_Init 0 */
33:Core/Src/fsmc.c ****
34:Core/Src/fsmc.c **** /* USER CODE END FSMC_Init 0 */
ARM GAS /tmp/cc5v6Cmy.s page 2
35:Core/Src/fsmc.c ****
36:Core/Src/fsmc.c **** FSMC_NORSRAM_TimingTypeDef Timing = {0};
37:Core/Src/fsmc.c ****
38:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_Init 1 */
39:Core/Src/fsmc.c ****
40:Core/Src/fsmc.c **** /* USER CODE END FSMC_Init 1 */
41:Core/Src/fsmc.c ****
42:Core/Src/fsmc.c **** /** Perform the SRAM1 memory initialization sequence
43:Core/Src/fsmc.c **** */
44:Core/Src/fsmc.c **** hsram1.Instance = FSMC_NORSRAM_DEVICE;
45:Core/Src/fsmc.c **** hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
46:Core/Src/fsmc.c **** /* hsram1.Init */
47:Core/Src/fsmc.c **** hsram1.Init.NSBank = FSMC_NORSRAM_BANK1;
48:Core/Src/fsmc.c **** hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_ENABLE;
49:Core/Src/fsmc.c **** hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_PSRAM;
50:Core/Src/fsmc.c **** hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
51:Core/Src/fsmc.c **** hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_ENABLE;
52:Core/Src/fsmc.c **** hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
53:Core/Src/fsmc.c **** hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
54:Core/Src/fsmc.c **** hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
55:Core/Src/fsmc.c **** hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
56:Core/Src/fsmc.c **** hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_ENABLE;
57:Core/Src/fsmc.c **** hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
58:Core/Src/fsmc.c **** hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
59:Core/Src/fsmc.c **** hsram1.Init.WriteBurst = FSMC_WRITE_BURST_ENABLE;
60:Core/Src/fsmc.c **** /* Timing */
61:Core/Src/fsmc.c **** Timing.AddressSetupTime = 15;
62:Core/Src/fsmc.c **** Timing.AddressHoldTime = 15;
63:Core/Src/fsmc.c **** Timing.DataSetupTime = 255;
64:Core/Src/fsmc.c **** Timing.BusTurnAroundDuration = 15;
65:Core/Src/fsmc.c **** Timing.CLKDivision = 16;
66:Core/Src/fsmc.c **** Timing.DataLatency = 2;
67:Core/Src/fsmc.c **** Timing.AccessMode = FSMC_ACCESS_MODE_A;
68:Core/Src/fsmc.c **** /* ExtTiming */
69:Core/Src/fsmc.c ****
70:Core/Src/fsmc.c **** if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
71:Core/Src/fsmc.c **** {
72:Core/Src/fsmc.c **** Error_Handler( );
73:Core/Src/fsmc.c **** }
74:Core/Src/fsmc.c ****
75:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_Init 2 */
76:Core/Src/fsmc.c ****
77:Core/Src/fsmc.c **** /* USER CODE END FSMC_Init 2 */
78:Core/Src/fsmc.c **** }
79:Core/Src/fsmc.c ****
80:Core/Src/fsmc.c **** static uint32_t FSMC_Initialized = 0;
81:Core/Src/fsmc.c ****
82:Core/Src/fsmc.c **** static void HAL_FSMC_MspInit(void){
25 .loc 1 82 0
26 .cfi_startproc
27 @ args = 0, pretend = 0, frame = 24
28 @ frame_needed = 0, uses_anonymous_args = 0
29 0000 70B5 push {r4, r5, r6, lr}
30 .LCFI0:
31 .cfi_def_cfa_offset 16
32 .cfi_offset 4, -16
33 .cfi_offset 5, -12
ARM GAS /tmp/cc5v6Cmy.s page 3
34 .cfi_offset 6, -8
35 .cfi_offset 14, -4
36 0002 86B0 sub sp, sp, #24
37 .LCFI1:
38 .cfi_def_cfa_offset 40
83:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_MspInit 0 */
84:Core/Src/fsmc.c ****
85:Core/Src/fsmc.c **** /* USER CODE END FSMC_MspInit 0 */
86:Core/Src/fsmc.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
39 .loc 1 86 0
40 0004 0023 movs r3, #0
41 0006 0293 str r3, [sp, #8]
42 0008 0393 str r3, [sp, #12]
43 000a 0493 str r3, [sp, #16]
44 000c 0593 str r3, [sp, #20]
87:Core/Src/fsmc.c **** if (FSMC_Initialized) {
45 .loc 1 87 0
46 000e 1C4B ldr r3, .L6
47 0010 1B68 ldr r3, [r3]
48 0012 0BB1 cbz r3, .L5
49 .L1:
88:Core/Src/fsmc.c **** return;
89:Core/Src/fsmc.c **** }
90:Core/Src/fsmc.c **** FSMC_Initialized = 1;
91:Core/Src/fsmc.c ****
92:Core/Src/fsmc.c **** /* Peripheral clock enable */
93:Core/Src/fsmc.c **** __HAL_RCC_FSMC_CLK_ENABLE();
94:Core/Src/fsmc.c ****
95:Core/Src/fsmc.c **** /** FSMC GPIO Configuration
96:Core/Src/fsmc.c **** PE2 ------> FSMC_A23
97:Core/Src/fsmc.c **** PE3 ------> FSMC_A19
98:Core/Src/fsmc.c **** PE4 ------> FSMC_A20
99:Core/Src/fsmc.c **** PE5 ------> FSMC_A21
100:Core/Src/fsmc.c **** PE6 ------> FSMC_A22
101:Core/Src/fsmc.c **** PE7 ------> FSMC_DA4
102:Core/Src/fsmc.c **** PE8 ------> FSMC_DA5
103:Core/Src/fsmc.c **** PE9 ------> FSMC_DA6
104:Core/Src/fsmc.c **** PE10 ------> FSMC_DA7
105:Core/Src/fsmc.c **** PE11 ------> FSMC_DA8
106:Core/Src/fsmc.c **** PE12 ------> FSMC_DA9
107:Core/Src/fsmc.c **** PE13 ------> FSMC_DA10
108:Core/Src/fsmc.c **** PE14 ------> FSMC_DA11
109:Core/Src/fsmc.c **** PE15 ------> FSMC_DA12
110:Core/Src/fsmc.c **** PD8 ------> FSMC_DA13
111:Core/Src/fsmc.c **** PD9 ------> FSMC_DA14
112:Core/Src/fsmc.c **** PD10 ------> FSMC_DA15
113:Core/Src/fsmc.c **** PD11 ------> FSMC_A16
114:Core/Src/fsmc.c **** PD12 ------> FSMC_A17
115:Core/Src/fsmc.c **** PD13 ------> FSMC_A18
116:Core/Src/fsmc.c **** PD14 ------> FSMC_DA0
117:Core/Src/fsmc.c **** PD15 ------> FSMC_DA1
118:Core/Src/fsmc.c **** PD0 ------> FSMC_DA2
119:Core/Src/fsmc.c **** PD1 ------> FSMC_DA3
120:Core/Src/fsmc.c **** PD3 ------> FSMC_CLK
121:Core/Src/fsmc.c **** PD4 ------> FSMC_NOE
122:Core/Src/fsmc.c **** PD5 ------> FSMC_NWE
123:Core/Src/fsmc.c **** PD6 ------> FSMC_NWAIT
ARM GAS /tmp/cc5v6Cmy.s page 4
124:Core/Src/fsmc.c **** PD7 ------> FSMC_NE1
125:Core/Src/fsmc.c **** PB7 ------> FSMC_NL
126:Core/Src/fsmc.c **** PE0 ------> FSMC_NBL0
127:Core/Src/fsmc.c **** PE1 ------> FSMC_NBL1
128:Core/Src/fsmc.c **** */
129:Core/Src/fsmc.c **** /* GPIO_InitStruct */
130:Core/Src/fsmc.c **** GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
131:Core/Src/fsmc.c **** |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
132:Core/Src/fsmc.c **** |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
133:Core/Src/fsmc.c **** |GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1;
134:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
135:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
136:Core/Src/fsmc.c ****
137:Core/Src/fsmc.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
138:Core/Src/fsmc.c ****
139:Core/Src/fsmc.c **** /* GPIO_InitStruct */
140:Core/Src/fsmc.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
141:Core/Src/fsmc.c **** |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
142:Core/Src/fsmc.c **** |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4
143:Core/Src/fsmc.c **** |GPIO_PIN_5|GPIO_PIN_7;
144:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
145:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
146:Core/Src/fsmc.c ****
147:Core/Src/fsmc.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
148:Core/Src/fsmc.c ****
149:Core/Src/fsmc.c **** /* GPIO_InitStruct */
150:Core/Src/fsmc.c **** GPIO_InitStruct.Pin = GPIO_PIN_6;
151:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
152:Core/Src/fsmc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
153:Core/Src/fsmc.c ****
154:Core/Src/fsmc.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
155:Core/Src/fsmc.c ****
156:Core/Src/fsmc.c **** /* GPIO_InitStruct */
157:Core/Src/fsmc.c **** GPIO_InitStruct.Pin = GPIO_PIN_7;
158:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
159:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
160:Core/Src/fsmc.c ****
161:Core/Src/fsmc.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
162:Core/Src/fsmc.c ****
163:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_MspInit 1 */
164:Core/Src/fsmc.c ****
165:Core/Src/fsmc.c **** /* USER CODE END FSMC_MspInit 1 */
166:Core/Src/fsmc.c **** }
50 .loc 1 166 0
51 0014 06B0 add sp, sp, #24
52 .LCFI2:
53 .cfi_remember_state
54 .cfi_def_cfa_offset 16
55 @ sp needed
56 0016 70BD pop {r4, r5, r6, pc}
57 .L5:
58 .LCFI3:
59 .cfi_restore_state
90:Core/Src/fsmc.c ****
60 .loc 1 90 0
61 0018 0122 movs r2, #1
62 001a 194B ldr r3, .L6
ARM GAS /tmp/cc5v6Cmy.s page 5
63 001c 1A60 str r2, [r3]
64 .LBB2:
93:Core/Src/fsmc.c ****
65 .loc 1 93 0
66 001e 194B ldr r3, .L6+4
67 0020 5A69 ldr r2, [r3, #20]
68 0022 42F48072 orr r2, r2, #256
69 0026 5A61 str r2, [r3, #20]
70 0028 5B69 ldr r3, [r3, #20]
71 002a 03F48073 and r3, r3, #256
72 002e 0193 str r3, [sp, #4]
73 0030 019B ldr r3, [sp, #4]
74 .LBE2:
130:Core/Src/fsmc.c **** |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
75 .loc 1 130 0
76 0032 4FF6FF73 movw r3, #65535
77 0036 0293 str r3, [sp, #8]
134:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
78 .loc 1 134 0
79 0038 0225 movs r5, #2
80 003a 0395 str r5, [sp, #12]
135:Core/Src/fsmc.c ****
81 .loc 1 135 0
82 003c 0324 movs r4, #3
83 003e 0594 str r4, [sp, #20]
137:Core/Src/fsmc.c ****
84 .loc 1 137 0
85 0040 02A9 add r1, sp, #8
86 0042 1148 ldr r0, .L6+8
87 0044 FFF7FEFF bl HAL_GPIO_Init
88 .LVL0:
140:Core/Src/fsmc.c **** |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
89 .loc 1 140 0
90 0048 4FF6BB73 movw r3, #65467
91 004c 0293 str r3, [sp, #8]
144:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
92 .loc 1 144 0
93 004e 0395 str r5, [sp, #12]
145:Core/Src/fsmc.c ****
94 .loc 1 145 0
95 0050 0594 str r4, [sp, #20]
147:Core/Src/fsmc.c ****
96 .loc 1 147 0
97 0052 0E4E ldr r6, .L6+12
98 0054 02A9 add r1, sp, #8
99 0056 3046 mov r0, r6
100 0058 FFF7FEFF bl HAL_GPIO_Init
101 .LVL1:
150:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
102 .loc 1 150 0
103 005c 4023 movs r3, #64
104 005e 0293 str r3, [sp, #8]
151:Core/Src/fsmc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
105 .loc 1 151 0
106 0060 0023 movs r3, #0
107 0062 0393 str r3, [sp, #12]
152:Core/Src/fsmc.c ****
ARM GAS /tmp/cc5v6Cmy.s page 6
108 .loc 1 152 0
109 0064 0493 str r3, [sp, #16]
154:Core/Src/fsmc.c ****
110 .loc 1 154 0
111 0066 02A9 add r1, sp, #8
112 0068 3046 mov r0, r6
113 006a FFF7FEFF bl HAL_GPIO_Init
114 .LVL2:
157:Core/Src/fsmc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
115 .loc 1 157 0
116 006e 8023 movs r3, #128
117 0070 0293 str r3, [sp, #8]
158:Core/Src/fsmc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
118 .loc 1 158 0
119 0072 0395 str r5, [sp, #12]
159:Core/Src/fsmc.c ****
120 .loc 1 159 0
121 0074 0594 str r4, [sp, #20]
161:Core/Src/fsmc.c ****
122 .loc 1 161 0
123 0076 02A9 add r1, sp, #8
124 0078 0548 ldr r0, .L6+16
125 007a FFF7FEFF bl HAL_GPIO_Init
126 .LVL3:
127 007e C9E7 b .L1
128 .L7:
129 .align 2
130 .L6:
131 0080 00000000 .word .LANCHOR0
132 0084 00100240 .word 1073876992
133 0088 00180140 .word 1073813504
134 008c 00140140 .word 1073812480
135 0090 000C0140 .word 1073810432
136 .cfi_endproc
137 .LFE66:
139 .section .text.HAL_FSMC_MspDeInit,"ax",%progbits
140 .align 1
141 .syntax unified
142 .thumb
143 .thumb_func
144 .fpu softvfp
146 HAL_FSMC_MspDeInit:
147 .LFB68:
167:Core/Src/fsmc.c ****
168:Core/Src/fsmc.c **** void HAL_SRAM_MspInit(SRAM_HandleTypeDef* sramHandle){
169:Core/Src/fsmc.c **** /* USER CODE BEGIN SRAM_MspInit 0 */
170:Core/Src/fsmc.c ****
171:Core/Src/fsmc.c **** /* USER CODE END SRAM_MspInit 0 */
172:Core/Src/fsmc.c **** HAL_FSMC_MspInit();
173:Core/Src/fsmc.c **** /* USER CODE BEGIN SRAM_MspInit 1 */
174:Core/Src/fsmc.c ****
175:Core/Src/fsmc.c **** /* USER CODE END SRAM_MspInit 1 */
176:Core/Src/fsmc.c **** }
177:Core/Src/fsmc.c ****
178:Core/Src/fsmc.c **** static uint32_t FSMC_DeInitialized = 0;
179:Core/Src/fsmc.c ****
180:Core/Src/fsmc.c **** static void HAL_FSMC_MspDeInit(void){
ARM GAS /tmp/cc5v6Cmy.s page 7
148 .loc 1 180 0
149 .cfi_startproc
150 @ args = 0, pretend = 0, frame = 0
151 @ frame_needed = 0, uses_anonymous_args = 0
152 0000 08B5 push {r3, lr}
153 .LCFI4:
154 .cfi_def_cfa_offset 8
155 .cfi_offset 3, -8
156 .cfi_offset 14, -4
181:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_MspDeInit 0 */
182:Core/Src/fsmc.c ****
183:Core/Src/fsmc.c **** /* USER CODE END FSMC_MspDeInit 0 */
184:Core/Src/fsmc.c **** if (FSMC_DeInitialized) {
157 .loc 1 184 0
158 0002 0D4B ldr r3, .L12
159 0004 1B68 ldr r3, [r3]
160 0006 03B1 cbz r3, .L11
161 .L8:
162 0008 08BD pop {r3, pc}
163 .L11:
185:Core/Src/fsmc.c **** return;
186:Core/Src/fsmc.c **** }
187:Core/Src/fsmc.c **** FSMC_DeInitialized = 1;
164 .loc 1 187 0
165 000a 0122 movs r2, #1
166 000c 0A4B ldr r3, .L12
167 000e 1A60 str r2, [r3]
188:Core/Src/fsmc.c **** /* Peripheral clock enable */
189:Core/Src/fsmc.c **** __HAL_RCC_FSMC_CLK_DISABLE();
168 .loc 1 189 0
169 0010 0A4A ldr r2, .L12+4
170 0012 5369 ldr r3, [r2, #20]
171 0014 23F48073 bic r3, r3, #256
172 0018 5361 str r3, [r2, #20]
190:Core/Src/fsmc.c ****
191:Core/Src/fsmc.c **** /** FSMC GPIO Configuration
192:Core/Src/fsmc.c **** PE2 ------> FSMC_A23
193:Core/Src/fsmc.c **** PE3 ------> FSMC_A19
194:Core/Src/fsmc.c **** PE4 ------> FSMC_A20
195:Core/Src/fsmc.c **** PE5 ------> FSMC_A21
196:Core/Src/fsmc.c **** PE6 ------> FSMC_A22
197:Core/Src/fsmc.c **** PE7 ------> FSMC_DA4
198:Core/Src/fsmc.c **** PE8 ------> FSMC_DA5
199:Core/Src/fsmc.c **** PE9 ------> FSMC_DA6
200:Core/Src/fsmc.c **** PE10 ------> FSMC_DA7
201:Core/Src/fsmc.c **** PE11 ------> FSMC_DA8
202:Core/Src/fsmc.c **** PE12 ------> FSMC_DA9
203:Core/Src/fsmc.c **** PE13 ------> FSMC_DA10
204:Core/Src/fsmc.c **** PE14 ------> FSMC_DA11
205:Core/Src/fsmc.c **** PE15 ------> FSMC_DA12
206:Core/Src/fsmc.c **** PD8 ------> FSMC_DA13
207:Core/Src/fsmc.c **** PD9 ------> FSMC_DA14
208:Core/Src/fsmc.c **** PD10 ------> FSMC_DA15
209:Core/Src/fsmc.c **** PD11 ------> FSMC_A16
210:Core/Src/fsmc.c **** PD12 ------> FSMC_A17
211:Core/Src/fsmc.c **** PD13 ------> FSMC_A18
212:Core/Src/fsmc.c **** PD14 ------> FSMC_DA0
ARM GAS /tmp/cc5v6Cmy.s page 8
213:Core/Src/fsmc.c **** PD15 ------> FSMC_DA1
214:Core/Src/fsmc.c **** PD0 ------> FSMC_DA2
215:Core/Src/fsmc.c **** PD1 ------> FSMC_DA3
216:Core/Src/fsmc.c **** PD3 ------> FSMC_CLK
217:Core/Src/fsmc.c **** PD4 ------> FSMC_NOE
218:Core/Src/fsmc.c **** PD5 ------> FSMC_NWE
219:Core/Src/fsmc.c **** PD6 ------> FSMC_NWAIT
220:Core/Src/fsmc.c **** PD7 ------> FSMC_NE1
221:Core/Src/fsmc.c **** PB7 ------> FSMC_NL
222:Core/Src/fsmc.c **** PE0 ------> FSMC_NBL0
223:Core/Src/fsmc.c **** PE1 ------> FSMC_NBL1
224:Core/Src/fsmc.c **** */
225:Core/Src/fsmc.c ****
226:Core/Src/fsmc.c **** HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5
173 .loc 1 226 0
174 001a 4FF6FF71 movw r1, #65535
175 001e 0848 ldr r0, .L12+8
176 0020 FFF7FEFF bl HAL_GPIO_DeInit
177 .LVL4:
227:Core/Src/fsmc.c **** |GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9
228:Core/Src/fsmc.c **** |GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_13
229:Core/Src/fsmc.c **** |GPIO_PIN_14|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1);
230:Core/Src/fsmc.c ****
231:Core/Src/fsmc.c **** HAL_GPIO_DeInit(GPIOD, GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
178 .loc 1 231 0
179 0024 4FF6FB71 movw r1, #65531
180 0028 0648 ldr r0, .L12+12
181 002a FFF7FEFF bl HAL_GPIO_DeInit
182 .LVL5:
232:Core/Src/fsmc.c **** |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
233:Core/Src/fsmc.c **** |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4
234:Core/Src/fsmc.c **** |GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
235:Core/Src/fsmc.c ****
236:Core/Src/fsmc.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
183 .loc 1 236 0
184 002e 8021 movs r1, #128
185 0030 0548 ldr r0, .L12+16
186 0032 FFF7FEFF bl HAL_GPIO_DeInit
187 .LVL6:
188 0036 E7E7 b .L8
189 .L13:
190 .align 2
191 .L12:
192 0038 00000000 .word .LANCHOR1
193 003c 00100240 .word 1073876992
194 0040 00180140 .word 1073813504
195 0044 00140140 .word 1073812480
196 0048 000C0140 .word 1073810432
197 .cfi_endproc
198 .LFE68:
200 .section .text.MX_FSMC_Init,"ax",%progbits
201 .align 1
202 .global MX_FSMC_Init
203 .syntax unified
204 .thumb
205 .thumb_func
206 .fpu softvfp
ARM GAS /tmp/cc5v6Cmy.s page 9
208 MX_FSMC_Init:
209 .LFB65:
31:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_Init 0 */
210 .loc 1 31 0
211 .cfi_startproc
212 @ args = 0, pretend = 0, frame = 32
213 @ frame_needed = 0, uses_anonymous_args = 0
214 0000 30B5 push {r4, r5, lr}
215 .LCFI5:
216 .cfi_def_cfa_offset 12
217 .cfi_offset 4, -12
218 .cfi_offset 5, -8
219 .cfi_offset 14, -4
220 0002 89B0 sub sp, sp, #36
221 .LCFI6:
222 .cfi_def_cfa_offset 48
36:Core/Src/fsmc.c ****
223 .loc 1 36 0
224 0004 0022 movs r2, #0
225 0006 0792 str r2, [sp, #28]
44:Core/Src/fsmc.c **** hsram1.Extended = FSMC_NORSRAM_EXTENDED_DEVICE;
226 .loc 1 44 0
227 0008 1748 ldr r0, .L18
228 000a 4FF02043 mov r3, #-1610612736
229 000e 0360 str r3, [r0]
45:Core/Src/fsmc.c **** /* hsram1.Init */
230 .loc 1 45 0
231 0010 03F58273 add r3, r3, #260
232 0014 4360 str r3, [r0, #4]
47:Core/Src/fsmc.c **** hsram1.Init.DataAddressMux = FSMC_DATA_ADDRESS_MUX_ENABLE;
233 .loc 1 47 0
234 0016 8260 str r2, [r0, #8]
48:Core/Src/fsmc.c **** hsram1.Init.MemoryType = FSMC_MEMORY_TYPE_PSRAM;
235 .loc 1 48 0
236 0018 0221 movs r1, #2
237 001a C160 str r1, [r0, #12]
49:Core/Src/fsmc.c **** hsram1.Init.MemoryDataWidth = FSMC_NORSRAM_MEM_BUS_WIDTH_16;
238 .loc 1 49 0
239 001c 0423 movs r3, #4
240 001e 0361 str r3, [r0, #16]
50:Core/Src/fsmc.c **** hsram1.Init.BurstAccessMode = FSMC_BURST_ACCESS_MODE_ENABLE;
241 .loc 1 50 0
242 0020 1024 movs r4, #16
243 0022 4461 str r4, [r0, #20]
51:Core/Src/fsmc.c **** hsram1.Init.WaitSignalPolarity = FSMC_WAIT_SIGNAL_POLARITY_LOW;
244 .loc 1 51 0
245 0024 4FF48073 mov r3, #256
246 0028 8361 str r3, [r0, #24]
52:Core/Src/fsmc.c **** hsram1.Init.WrapMode = FSMC_WRAP_MODE_DISABLE;
247 .loc 1 52 0
248 002a C261 str r2, [r0, #28]
53:Core/Src/fsmc.c **** hsram1.Init.WaitSignalActive = FSMC_WAIT_TIMING_BEFORE_WS;
249 .loc 1 53 0
250 002c 0262 str r2, [r0, #32]
54:Core/Src/fsmc.c **** hsram1.Init.WriteOperation = FSMC_WRITE_OPERATION_ENABLE;
251 .loc 1 54 0
252 002e 4262 str r2, [r0, #36]
ARM GAS /tmp/cc5v6Cmy.s page 10
55:Core/Src/fsmc.c **** hsram1.Init.WaitSignal = FSMC_WAIT_SIGNAL_ENABLE;
253 .loc 1 55 0
254 0030 4FF48053 mov r3, #4096
255 0034 8362 str r3, [r0, #40]
56:Core/Src/fsmc.c **** hsram1.Init.ExtendedMode = FSMC_EXTENDED_MODE_DISABLE;
256 .loc 1 56 0
257 0036 4FF40053 mov r3, #8192
258 003a C362 str r3, [r0, #44]
57:Core/Src/fsmc.c **** hsram1.Init.AsynchronousWait = FSMC_ASYNCHRONOUS_WAIT_DISABLE;
259 .loc 1 57 0
260 003c 0263 str r2, [r0, #48]
58:Core/Src/fsmc.c **** hsram1.Init.WriteBurst = FSMC_WRITE_BURST_ENABLE;
261 .loc 1 58 0
262 003e 4263 str r2, [r0, #52]
59:Core/Src/fsmc.c **** /* Timing */
263 .loc 1 59 0
264 0040 4FF40023 mov r3, #524288
265 0044 8363 str r3, [r0, #56]
61:Core/Src/fsmc.c **** Timing.AddressHoldTime = 15;
266 .loc 1 61 0
267 0046 0F23 movs r3, #15
268 0048 0193 str r3, [sp, #4]
62:Core/Src/fsmc.c **** Timing.DataSetupTime = 255;
269 .loc 1 62 0
270 004a 0293 str r3, [sp, #8]
63:Core/Src/fsmc.c **** Timing.BusTurnAroundDuration = 15;
271 .loc 1 63 0
272 004c FF25 movs r5, #255
273 004e 0395 str r5, [sp, #12]
64:Core/Src/fsmc.c **** Timing.CLKDivision = 16;
274 .loc 1 64 0
275 0050 0493 str r3, [sp, #16]
65:Core/Src/fsmc.c **** Timing.DataLatency = 2;
276 .loc 1 65 0
277 0052 0594 str r4, [sp, #20]
66:Core/Src/fsmc.c **** Timing.AccessMode = FSMC_ACCESS_MODE_A;
278 .loc 1 66 0
279 0054 0691 str r1, [sp, #24]
70:Core/Src/fsmc.c **** {
280 .loc 1 70 0
281 0056 01A9 add r1, sp, #4
282 0058 FFF7FEFF bl HAL_SRAM_Init
283 .LVL7:
284 005c 08B9 cbnz r0, .L17
285 .L14:
78:Core/Src/fsmc.c ****
286 .loc 1 78 0
287 005e 09B0 add sp, sp, #36
288 .LCFI7:
289 .cfi_remember_state
290 .cfi_def_cfa_offset 12
291 @ sp needed
292 0060 30BD pop {r4, r5, pc}
293 .L17:
294 .LCFI8:
295 .cfi_restore_state
72:Core/Src/fsmc.c **** }
ARM GAS /tmp/cc5v6Cmy.s page 11
296 .loc 1 72 0
297 0062 FFF7FEFF bl Error_Handler
298 .LVL8:
78:Core/Src/fsmc.c ****
299 .loc 1 78 0
300 0066 FAE7 b .L14
301 .L19:
302 .align 2
303 .L18:
304 0068 00000000 .word hsram1
305 .cfi_endproc
306 .LFE65:
308 .section .text.HAL_SRAM_MspInit,"ax",%progbits
309 .align 1
310 .global HAL_SRAM_MspInit
311 .syntax unified
312 .thumb
313 .thumb_func
314 .fpu softvfp
316 HAL_SRAM_MspInit:
317 .LFB67:
168:Core/Src/fsmc.c **** /* USER CODE BEGIN SRAM_MspInit 0 */
318 .loc 1 168 0
319 .cfi_startproc
320 @ args = 0, pretend = 0, frame = 0
321 @ frame_needed = 0, uses_anonymous_args = 0
322 .LVL9:
323 0000 08B5 push {r3, lr}
324 .LCFI9:
325 .cfi_def_cfa_offset 8
326 .cfi_offset 3, -8
327 .cfi_offset 14, -4
172:Core/Src/fsmc.c **** /* USER CODE BEGIN SRAM_MspInit 1 */
328 .loc 1 172 0
329 0002 FFF7FEFF bl HAL_FSMC_MspInit
330 .LVL10:
331 0006 08BD pop {r3, pc}
332 .cfi_endproc
333 .LFE67:
335 .section .text.HAL_SRAM_MspDeInit,"ax",%progbits
336 .align 1
337 .global HAL_SRAM_MspDeInit
338 .syntax unified
339 .thumb
340 .thumb_func
341 .fpu softvfp
343 HAL_SRAM_MspDeInit:
344 .LFB69:
237:Core/Src/fsmc.c ****
238:Core/Src/fsmc.c **** /* USER CODE BEGIN FSMC_MspDeInit 1 */
239:Core/Src/fsmc.c ****
240:Core/Src/fsmc.c **** /* USER CODE END FSMC_MspDeInit 1 */
241:Core/Src/fsmc.c **** }
242:Core/Src/fsmc.c ****
243:Core/Src/fsmc.c **** void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* sramHandle){
345 .loc 1 243 0
346 .cfi_startproc
ARM GAS /tmp/cc5v6Cmy.s page 12
347 @ args = 0, pretend = 0, frame = 0
348 @ frame_needed = 0, uses_anonymous_args = 0
349 .LVL11:
350 0000 08B5 push {r3, lr}
351 .LCFI10:
352 .cfi_def_cfa_offset 8
353 .cfi_offset 3, -8
354 .cfi_offset 14, -4
244:Core/Src/fsmc.c **** /* USER CODE BEGIN SRAM_MspDeInit 0 */
245:Core/Src/fsmc.c ****
246:Core/Src/fsmc.c **** /* USER CODE END SRAM_MspDeInit 0 */
247:Core/Src/fsmc.c **** HAL_FSMC_MspDeInit();
355 .loc 1 247 0
356 0002 FFF7FEFF bl HAL_FSMC_MspDeInit
357 .LVL12:
358 0006 08BD pop {r3, pc}
359 .cfi_endproc
360 .LFE69:
362 .comm hsram1,72,4
363 .section .bss.FSMC_DeInitialized,"aw",%nobits
364 .align 2
365 .set .LANCHOR1,. + 0
368 FSMC_DeInitialized:
369 0000 00000000 .space 4
370 .section .bss.FSMC_Initialized,"aw",%nobits
371 .align 2
372 .set .LANCHOR0,. + 0
375 FSMC_Initialized:
376 0000 00000000 .space 4
377 .text
378 .Letext0:
379 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
380 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
381 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
382 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
383 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
384 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
385 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
386 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
387 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_fsmc.h"
388 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_sram.h"
389 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
390 .file 13 "Core/Inc/fsmc.h"
391 .file 14 "Core/Inc/main.h"
ARM GAS /tmp/cc5v6Cmy.s page 13
DEFINED SYMBOLS
*ABS*:0000000000000000 fsmc.c
/tmp/cc5v6Cmy.s:16 .text.HAL_FSMC_MspInit:0000000000000000 $t
/tmp/cc5v6Cmy.s:22 .text.HAL_FSMC_MspInit:0000000000000000 HAL_FSMC_MspInit
/tmp/cc5v6Cmy.s:131 .text.HAL_FSMC_MspInit:0000000000000080 $d
/tmp/cc5v6Cmy.s:140 .text.HAL_FSMC_MspDeInit:0000000000000000 $t
/tmp/cc5v6Cmy.s:146 .text.HAL_FSMC_MspDeInit:0000000000000000 HAL_FSMC_MspDeInit
/tmp/cc5v6Cmy.s:192 .text.HAL_FSMC_MspDeInit:0000000000000038 $d
/tmp/cc5v6Cmy.s:201 .text.MX_FSMC_Init:0000000000000000 $t
/tmp/cc5v6Cmy.s:208 .text.MX_FSMC_Init:0000000000000000 MX_FSMC_Init
/tmp/cc5v6Cmy.s:304 .text.MX_FSMC_Init:0000000000000068 $d
*COM*:0000000000000048 hsram1
/tmp/cc5v6Cmy.s:309 .text.HAL_SRAM_MspInit:0000000000000000 $t
/tmp/cc5v6Cmy.s:316 .text.HAL_SRAM_MspInit:0000000000000000 HAL_SRAM_MspInit
/tmp/cc5v6Cmy.s:336 .text.HAL_SRAM_MspDeInit:0000000000000000 $t
/tmp/cc5v6Cmy.s:343 .text.HAL_SRAM_MspDeInit:0000000000000000 HAL_SRAM_MspDeInit
/tmp/cc5v6Cmy.s:364 .bss.FSMC_DeInitialized:0000000000000000 $d
/tmp/cc5v6Cmy.s:368 .bss.FSMC_DeInitialized:0000000000000000 FSMC_DeInitialized
/tmp/cc5v6Cmy.s:371 .bss.FSMC_Initialized:0000000000000000 $d
/tmp/cc5v6Cmy.s:375 .bss.FSMC_Initialized:0000000000000000 FSMC_Initialized
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init
HAL_GPIO_DeInit
HAL_SRAM_Init
Error_Handler

BIN
build/fsmc.o
View File

Binary file not shown.

96
build/gpio.d
View File

@ -1,96 +0,0 @@
build/gpio.o: Core/Src/gpio.c Core/Inc/gpio.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/gpio.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

378
build/gpio.lst
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@ -1,378 +0,0 @@
ARM GAS /tmp/ccbteiYB.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "gpio.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.MX_GPIO_Init,"ax",%progbits
16 .align 1
17 .global MX_GPIO_Init
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 MX_GPIO_Init:
24 .LFB65:
25 .file 1 "Core/Src/gpio.c"
1:Core/Src/gpio.c **** /**
2:Core/Src/gpio.c **** ******************************************************************************
3:Core/Src/gpio.c **** * @file gpio.c
4:Core/Src/gpio.c **** * @brief This file provides code for the configuration
5:Core/Src/gpio.c **** * of all used GPIO pins.
6:Core/Src/gpio.c **** ******************************************************************************
7:Core/Src/gpio.c **** * @attention
8:Core/Src/gpio.c **** *
9:Core/Src/gpio.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/gpio.c **** * All rights reserved.</center></h2>
11:Core/Src/gpio.c **** *
12:Core/Src/gpio.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/gpio.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/gpio.c **** * License. You may obtain a copy of the License at:
15:Core/Src/gpio.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/gpio.c **** *
17:Core/Src/gpio.c **** ******************************************************************************
18:Core/Src/gpio.c **** */
19:Core/Src/gpio.c ****
20:Core/Src/gpio.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/gpio.c **** #include "gpio.h"
22:Core/Src/gpio.c ****
23:Core/Src/gpio.c **** /* USER CODE BEGIN 0 */
24:Core/Src/gpio.c ****
25:Core/Src/gpio.c **** /* USER CODE END 0 */
26:Core/Src/gpio.c ****
27:Core/Src/gpio.c **** /*----------------------------------------------------------------------------*/
28:Core/Src/gpio.c **** /* Configure GPIO */
29:Core/Src/gpio.c **** /*----------------------------------------------------------------------------*/
30:Core/Src/gpio.c **** /* USER CODE BEGIN 1 */
31:Core/Src/gpio.c ****
32:Core/Src/gpio.c **** /* USER CODE END 1 */
33:Core/Src/gpio.c ****
ARM GAS /tmp/ccbteiYB.s page 2
34:Core/Src/gpio.c **** /** Configure pins as
35:Core/Src/gpio.c **** * Analog
36:Core/Src/gpio.c **** * Input
37:Core/Src/gpio.c **** * Output
38:Core/Src/gpio.c **** * EVENT_OUT
39:Core/Src/gpio.c **** * EXTI
40:Core/Src/gpio.c **** */
41:Core/Src/gpio.c **** void MX_GPIO_Init(void)
42:Core/Src/gpio.c **** {
26 .loc 1 42 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 32
29 @ frame_needed = 0, uses_anonymous_args = 0
30 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr}
31 .LCFI0:
32 .cfi_def_cfa_offset 32
33 .cfi_offset 4, -32
34 .cfi_offset 5, -28
35 .cfi_offset 6, -24
36 .cfi_offset 7, -20
37 .cfi_offset 8, -16
38 .cfi_offset 9, -12
39 .cfi_offset 10, -8
40 .cfi_offset 14, -4
41 0004 88B0 sub sp, sp, #32
42 .LCFI1:
43 .cfi_def_cfa_offset 64
43:Core/Src/gpio.c ****
44:Core/Src/gpio.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
44 .loc 1 44 0
45 0006 0024 movs r4, #0
46 0008 0494 str r4, [sp, #16]
47 000a 0594 str r4, [sp, #20]
48 000c 0694 str r4, [sp, #24]
49 000e 0794 str r4, [sp, #28]
50 .LBB2:
45:Core/Src/gpio.c ****
46:Core/Src/gpio.c **** /* GPIO Ports Clock Enable */
47:Core/Src/gpio.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
51 .loc 1 47 0
52 0010 414B ldr r3, .L3
53 0012 9A69 ldr r2, [r3, #24]
54 0014 42F01002 orr r2, r2, #16
55 0018 9A61 str r2, [r3, #24]
56 001a 9A69 ldr r2, [r3, #24]
57 001c 02F01002 and r2, r2, #16
58 0020 0192 str r2, [sp, #4]
59 0022 019A ldr r2, [sp, #4]
60 .LBE2:
61 .LBB3:
48:Core/Src/gpio.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
62 .loc 1 48 0
63 0024 9A69 ldr r2, [r3, #24]
64 0026 42F00402 orr r2, r2, #4
65 002a 9A61 str r2, [r3, #24]
66 002c 9A69 ldr r2, [r3, #24]
67 002e 02F00402 and r2, r2, #4
ARM GAS /tmp/ccbteiYB.s page 3
68 0032 0292 str r2, [sp, #8]
69 0034 029A ldr r2, [sp, #8]
70 .LBE3:
71 .LBB4:
49:Core/Src/gpio.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
72 .loc 1 49 0
73 0036 9A69 ldr r2, [r3, #24]
74 0038 42F00802 orr r2, r2, #8
75 003c 9A61 str r2, [r3, #24]
76 003e 9B69 ldr r3, [r3, #24]
77 0040 03F00803 and r3, r3, #8
78 0044 0393 str r3, [sp, #12]
79 0046 039B ldr r3, [sp, #12]
80 .LBE4:
50:Core/Src/gpio.c ****
51:Core/Src/gpio.c **** /*Configure GPIO pin Output Level */
52:Core/Src/gpio.c **** HAL_GPIO_WritePin(SPI_ENC_CS_GPIO_Port, SPI_ENC_CS_Pin, GPIO_PIN_SET);
81 .loc 1 52 0
82 0048 344E ldr r6, .L3+4
83 004a 0122 movs r2, #1
84 004c 4FF40051 mov r1, #8192
85 0050 3046 mov r0, r6
86 0052 FFF7FEFF bl HAL_GPIO_WritePin
87 .LVL0:
53:Core/Src/gpio.c ****
54:Core/Src/gpio.c **** /*Configure GPIO pin Output Level */
55:Core/Src/gpio.c **** HAL_GPIO_WritePin(LED_GPIO_Port, LED_Pin, GPIO_PIN_RESET);
88 .loc 1 55 0
89 0056 2246 mov r2, r4
90 0058 0121 movs r1, #1
91 005a 3046 mov r0, r6
92 005c FFF7FEFF bl HAL_GPIO_WritePin
93 .LVL1:
56:Core/Src/gpio.c ****
57:Core/Src/gpio.c **** /*Configure GPIO pin Output Level */
58:Core/Src/gpio.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8|GPIO_PIN_11|GPIO_PIN_12, GPIO_PIN_RESET);
94 .loc 1 58 0
95 0060 DFF8BC80 ldr r8, .L3+8
96 0064 2246 mov r2, r4
97 0066 4FF4C851 mov r1, #6400
98 006a 4046 mov r0, r8
99 006c FFF7FEFF bl HAL_GPIO_WritePin
100 .LVL2:
59:Core/Src/gpio.c ****
60:Core/Src/gpio.c **** /*Configure GPIO pin Output Level */
61:Core/Src/gpio.c **** HAL_GPIO_WritePin(SPI_FPGA_CS_GPIO_Port, SPI_FPGA_CS_Pin, GPIO_PIN_SET);
101 .loc 1 61 0
102 0070 0122 movs r2, #1
103 0072 4FF40041 mov r1, #32768
104 0076 4046 mov r0, r8
105 0078 FFF7FEFF bl HAL_GPIO_WritePin
106 .LVL3:
62:Core/Src/gpio.c ****
63:Core/Src/gpio.c **** /*Configure GPIO pin Output Level */
64:Core/Src/gpio.c **** HAL_GPIO_WritePin(SW_12V_GPIO_Port, SW_12V_Pin, GPIO_PIN_SET);
107 .loc 1 64 0
108 007c DFF8A490 ldr r9, .L3+12
ARM GAS /tmp/ccbteiYB.s page 4
109 0080 0122 movs r2, #1
110 0082 4021 movs r1, #64
111 0084 4846 mov r0, r9
112 0086 FFF7FEFF bl HAL_GPIO_WritePin
113 .LVL4:
65:Core/Src/gpio.c ****
66:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
67:Core/Src/gpio.c **** GPIO_InitStruct.Pin = SPI_ENC_CS_Pin;
114 .loc 1 67 0
115 008a 4FF40053 mov r3, #8192
116 008e 0493 str r3, [sp, #16]
68:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
117 .loc 1 68 0
118 0090 0125 movs r5, #1
119 0092 0595 str r5, [sp, #20]
69:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
120 .loc 1 69 0
121 0094 0694 str r4, [sp, #24]
70:Core/Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
122 .loc 1 70 0
123 0096 4FF0030A mov r10, #3
124 009a CDF81CA0 str r10, [sp, #28]
71:Core/Src/gpio.c **** HAL_GPIO_Init(SPI_ENC_CS_GPIO_Port, &GPIO_InitStruct);
125 .loc 1 71 0
126 009e 04A9 add r1, sp, #16
127 00a0 3046 mov r0, r6
128 00a2 FFF7FEFF bl HAL_GPIO_Init
129 .LVL5:
72:Core/Src/gpio.c ****
73:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
74:Core/Src/gpio.c **** GPIO_InitStruct.Pin = LED_Pin;
130 .loc 1 74 0
131 00a6 0495 str r5, [sp, #16]
75:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
132 .loc 1 75 0
133 00a8 0595 str r5, [sp, #20]
76:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
134 .loc 1 76 0
135 00aa 0694 str r4, [sp, #24]
77:Core/Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
136 .loc 1 77 0
137 00ac 0227 movs r7, #2
138 00ae 0797 str r7, [sp, #28]
78:Core/Src/gpio.c **** HAL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct);
139 .loc 1 78 0
140 00b0 04A9 add r1, sp, #16
141 00b2 3046 mov r0, r6
142 00b4 FFF7FEFF bl HAL_GPIO_Init
143 .LVL6:
79:Core/Src/gpio.c ****
80:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
81:Core/Src/gpio.c **** GPIO_InitStruct.Pin = KEY_Pin;
144 .loc 1 81 0
145 00b8 0497 str r7, [sp, #16]
82:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
146 .loc 1 82 0
147 00ba 0594 str r4, [sp, #20]
ARM GAS /tmp/ccbteiYB.s page 5
83:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
148 .loc 1 83 0
149 00bc 0695 str r5, [sp, #24]
84:Core/Src/gpio.c **** HAL_GPIO_Init(KEY_GPIO_Port, &GPIO_InitStruct);
150 .loc 1 84 0
151 00be 04A9 add r1, sp, #16
152 00c0 3046 mov r0, r6
153 00c2 FFF7FEFF bl HAL_GPIO_Init
154 .LVL7:
85:Core/Src/gpio.c ****
86:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
87:Core/Src/gpio.c **** GPIO_InitStruct.Pin = Fault_12V_Pin;
155 .loc 1 87 0
156 00c6 0423 movs r3, #4
157 00c8 0493 str r3, [sp, #16]
88:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
158 .loc 1 88 0
159 00ca 0594 str r4, [sp, #20]
89:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
160 .loc 1 89 0
161 00cc 0695 str r5, [sp, #24]
90:Core/Src/gpio.c **** HAL_GPIO_Init(Fault_12V_GPIO_Port, &GPIO_InitStruct);
162 .loc 1 90 0
163 00ce 04A9 add r1, sp, #16
164 00d0 4846 mov r0, r9
165 00d2 FFF7FEFF bl HAL_GPIO_Init
166 .LVL8:
91:Core/Src/gpio.c ****
92:Core/Src/gpio.c **** /*Configure GPIO pins : PA8 PA11 PA12 */
93:Core/Src/gpio.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_11|GPIO_PIN_12;
167 .loc 1 93 0
168 00d6 4FF4C853 mov r3, #6400
169 00da 0493 str r3, [sp, #16]
94:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
170 .loc 1 94 0
171 00dc 0595 str r5, [sp, #20]
95:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
172 .loc 1 95 0
173 00de 0694 str r4, [sp, #24]
96:Core/Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
174 .loc 1 96 0
175 00e0 0797 str r7, [sp, #28]
97:Core/Src/gpio.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
176 .loc 1 97 0
177 00e2 04A9 add r1, sp, #16
178 00e4 4046 mov r0, r8
179 00e6 FFF7FEFF bl HAL_GPIO_Init
180 .LVL9:
98:Core/Src/gpio.c ****
99:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
100:Core/Src/gpio.c **** GPIO_InitStruct.Pin = SPI_FPGA_CS_Pin;
181 .loc 1 100 0
182 00ea 4FF40043 mov r3, #32768
183 00ee 0493 str r3, [sp, #16]
101:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
184 .loc 1 101 0
185 00f0 0595 str r5, [sp, #20]
ARM GAS /tmp/ccbteiYB.s page 6
102:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
186 .loc 1 102 0
187 00f2 0694 str r4, [sp, #24]
103:Core/Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
188 .loc 1 103 0
189 00f4 CDF81CA0 str r10, [sp, #28]
104:Core/Src/gpio.c **** HAL_GPIO_Init(SPI_FPGA_CS_GPIO_Port, &GPIO_InitStruct);
190 .loc 1 104 0
191 00f8 04A9 add r1, sp, #16
192 00fa 4046 mov r0, r8
193 00fc FFF7FEFF bl HAL_GPIO_Init
194 .LVL10:
105:Core/Src/gpio.c ****
106:Core/Src/gpio.c **** /*Configure GPIO pin : PtPin */
107:Core/Src/gpio.c **** GPIO_InitStruct.Pin = SW_12V_Pin;
195 .loc 1 107 0
196 0100 4023 movs r3, #64
197 0102 0493 str r3, [sp, #16]
108:Core/Src/gpio.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
198 .loc 1 108 0
199 0104 0595 str r5, [sp, #20]
109:Core/Src/gpio.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
200 .loc 1 109 0
201 0106 0694 str r4, [sp, #24]
110:Core/Src/gpio.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
202 .loc 1 110 0
203 0108 0797 str r7, [sp, #28]
111:Core/Src/gpio.c **** HAL_GPIO_Init(SW_12V_GPIO_Port, &GPIO_InitStruct);
204 .loc 1 111 0
205 010a 04A9 add r1, sp, #16
206 010c 4846 mov r0, r9
207 010e FFF7FEFF bl HAL_GPIO_Init
208 .LVL11:
112:Core/Src/gpio.c ****
113:Core/Src/gpio.c **** }
209 .loc 1 113 0
210 0112 08B0 add sp, sp, #32
211 .LCFI2:
212 .cfi_def_cfa_offset 32
213 @ sp needed
214 0114 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc}
215 .L4:
216 .align 2
217 .L3:
218 0118 00100240 .word 1073876992
219 011c 00100140 .word 1073811456
220 0120 00080140 .word 1073809408
221 0124 000C0140 .word 1073810432
222 .cfi_endproc
223 .LFE65:
225 .text
226 .Letext0:
227 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
228 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
229 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
230 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
231 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
ARM GAS /tmp/ccbteiYB.s page 7
232 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
233 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS /tmp/ccbteiYB.s page 8
DEFINED SYMBOLS
*ABS*:0000000000000000 gpio.c
/tmp/ccbteiYB.s:16 .text.MX_GPIO_Init:0000000000000000 $t
/tmp/ccbteiYB.s:23 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init
/tmp/ccbteiYB.s:218 .text.MX_GPIO_Init:0000000000000118 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_GPIO_WritePin
HAL_GPIO_Init

BIN
build/gpio.o
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Binary file not shown.

96
build/i2c.d
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@ -1,96 +0,0 @@
build/i2c.o: Core/Src/i2c.c Core/Inc/i2c.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/i2c.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

642
build/i2c.lst
View File

@ -1,642 +0,0 @@
ARM GAS /tmp/ccpJ3TPh.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "i2c.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.MX_I2C1_Init,"ax",%progbits
16 .align 1
17 .global MX_I2C1_Init
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 MX_I2C1_Init:
24 .LFB65:
25 .file 1 "Core/Src/i2c.c"
1:Core/Src/i2c.c **** /**
2:Core/Src/i2c.c **** ******************************************************************************
3:Core/Src/i2c.c **** * @file i2c.c
4:Core/Src/i2c.c **** * @brief This file provides code for the configuration
5:Core/Src/i2c.c **** * of the I2C instances.
6:Core/Src/i2c.c **** ******************************************************************************
7:Core/Src/i2c.c **** * @attention
8:Core/Src/i2c.c **** *
9:Core/Src/i2c.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/i2c.c **** * All rights reserved.</center></h2>
11:Core/Src/i2c.c **** *
12:Core/Src/i2c.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/i2c.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/i2c.c **** * License. You may obtain a copy of the License at:
15:Core/Src/i2c.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/i2c.c **** *
17:Core/Src/i2c.c **** ******************************************************************************
18:Core/Src/i2c.c **** */
19:Core/Src/i2c.c ****
20:Core/Src/i2c.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/i2c.c **** #include "i2c.h"
22:Core/Src/i2c.c ****
23:Core/Src/i2c.c **** /* USER CODE BEGIN 0 */
24:Core/Src/i2c.c ****
25:Core/Src/i2c.c **** /* USER CODE END 0 */
26:Core/Src/i2c.c ****
27:Core/Src/i2c.c **** I2C_HandleTypeDef hi2c1;
28:Core/Src/i2c.c **** I2C_HandleTypeDef hi2c2;
29:Core/Src/i2c.c ****
30:Core/Src/i2c.c **** /* I2C1 init function */
31:Core/Src/i2c.c **** void MX_I2C1_Init(void)
32:Core/Src/i2c.c **** {
26 .loc 1 32 0
ARM GAS /tmp/ccpJ3TPh.s page 2
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 0000 08B5 push {r3, lr}
31 .LCFI0:
32 .cfi_def_cfa_offset 8
33 .cfi_offset 3, -8
34 .cfi_offset 14, -4
33:Core/Src/i2c.c ****
34:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_Init 0 */
35:Core/Src/i2c.c ****
36:Core/Src/i2c.c **** /* USER CODE END I2C1_Init 0 */
37:Core/Src/i2c.c ****
38:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_Init 1 */
39:Core/Src/i2c.c ****
40:Core/Src/i2c.c **** /* USER CODE END I2C1_Init 1 */
41:Core/Src/i2c.c **** hi2c1.Instance = I2C1;
35 .loc 1 41 0
36 0002 0B48 ldr r0, .L5
37 0004 0B4B ldr r3, .L5+4
38 0006 0360 str r3, [r0]
42:Core/Src/i2c.c **** hi2c1.Init.ClockSpeed = 100000;
39 .loc 1 42 0
40 0008 0B4B ldr r3, .L5+8
41 000a 4360 str r3, [r0, #4]
43:Core/Src/i2c.c **** hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
42 .loc 1 43 0
43 000c 0023 movs r3, #0
44 000e 8360 str r3, [r0, #8]
44:Core/Src/i2c.c **** hi2c1.Init.OwnAddress1 = 0;
45 .loc 1 44 0
46 0010 C360 str r3, [r0, #12]
45:Core/Src/i2c.c **** hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
47 .loc 1 45 0
48 0012 4FF48042 mov r2, #16384
49 0016 0261 str r2, [r0, #16]
46:Core/Src/i2c.c **** hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
50 .loc 1 46 0
51 0018 4361 str r3, [r0, #20]
47:Core/Src/i2c.c **** hi2c1.Init.OwnAddress2 = 0;
52 .loc 1 47 0
53 001a 8361 str r3, [r0, #24]
48:Core/Src/i2c.c **** hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
54 .loc 1 48 0
55 001c C361 str r3, [r0, #28]
49:Core/Src/i2c.c **** hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
56 .loc 1 49 0
57 001e 0362 str r3, [r0, #32]
50:Core/Src/i2c.c **** if (HAL_I2C_Init(&hi2c1) != HAL_OK)
58 .loc 1 50 0
59 0020 FFF7FEFF bl HAL_I2C_Init
60 .LVL0:
61 0024 00B9 cbnz r0, .L4
62 .L1:
63 0026 08BD pop {r3, pc}
64 .L4:
51:Core/Src/i2c.c **** {
ARM GAS /tmp/ccpJ3TPh.s page 3
52:Core/Src/i2c.c **** Error_Handler();
65 .loc 1 52 0
66 0028 FFF7FEFF bl Error_Handler
67 .LVL1:
53:Core/Src/i2c.c **** }
54:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_Init 2 */
55:Core/Src/i2c.c ****
56:Core/Src/i2c.c **** /* USER CODE END I2C1_Init 2 */
57:Core/Src/i2c.c ****
58:Core/Src/i2c.c **** }
68 .loc 1 58 0
69 002c FBE7 b .L1
70 .L6:
71 002e 00BF .align 2
72 .L5:
73 0030 00000000 .word hi2c1
74 0034 00540040 .word 1073763328
75 0038 A0860100 .word 100000
76 .cfi_endproc
77 .LFE65:
79 .section .text.MX_I2C2_Init,"ax",%progbits
80 .align 1
81 .global MX_I2C2_Init
82 .syntax unified
83 .thumb
84 .thumb_func
85 .fpu softvfp
87 MX_I2C2_Init:
88 .LFB66:
59:Core/Src/i2c.c **** /* I2C2 init function */
60:Core/Src/i2c.c **** void MX_I2C2_Init(void)
61:Core/Src/i2c.c **** {
89 .loc 1 61 0
90 .cfi_startproc
91 @ args = 0, pretend = 0, frame = 0
92 @ frame_needed = 0, uses_anonymous_args = 0
93 0000 08B5 push {r3, lr}
94 .LCFI1:
95 .cfi_def_cfa_offset 8
96 .cfi_offset 3, -8
97 .cfi_offset 14, -4
62:Core/Src/i2c.c ****
63:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_Init 0 */
64:Core/Src/i2c.c ****
65:Core/Src/i2c.c **** /* USER CODE END I2C2_Init 0 */
66:Core/Src/i2c.c ****
67:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_Init 1 */
68:Core/Src/i2c.c ****
69:Core/Src/i2c.c **** /* USER CODE END I2C2_Init 1 */
70:Core/Src/i2c.c **** hi2c2.Instance = I2C2;
98 .loc 1 70 0
99 0002 0B48 ldr r0, .L11
100 0004 0B4B ldr r3, .L11+4
101 0006 0360 str r3, [r0]
71:Core/Src/i2c.c **** hi2c2.Init.ClockSpeed = 100000;
102 .loc 1 71 0
103 0008 0B4B ldr r3, .L11+8
ARM GAS /tmp/ccpJ3TPh.s page 4
104 000a 4360 str r3, [r0, #4]
72:Core/Src/i2c.c **** hi2c2.Init.DutyCycle = I2C_DUTYCYCLE_2;
105 .loc 1 72 0
106 000c 0023 movs r3, #0
107 000e 8360 str r3, [r0, #8]
73:Core/Src/i2c.c **** hi2c2.Init.OwnAddress1 = 0;
108 .loc 1 73 0
109 0010 C360 str r3, [r0, #12]
74:Core/Src/i2c.c **** hi2c2.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
110 .loc 1 74 0
111 0012 4FF48042 mov r2, #16384
112 0016 0261 str r2, [r0, #16]
75:Core/Src/i2c.c **** hi2c2.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
113 .loc 1 75 0
114 0018 4361 str r3, [r0, #20]
76:Core/Src/i2c.c **** hi2c2.Init.OwnAddress2 = 0;
115 .loc 1 76 0
116 001a 8361 str r3, [r0, #24]
77:Core/Src/i2c.c **** hi2c2.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
117 .loc 1 77 0
118 001c C361 str r3, [r0, #28]
78:Core/Src/i2c.c **** hi2c2.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
119 .loc 1 78 0
120 001e 0362 str r3, [r0, #32]
79:Core/Src/i2c.c **** if (HAL_I2C_Init(&hi2c2) != HAL_OK)
121 .loc 1 79 0
122 0020 FFF7FEFF bl HAL_I2C_Init
123 .LVL2:
124 0024 00B9 cbnz r0, .L10
125 .L7:
126 0026 08BD pop {r3, pc}
127 .L10:
80:Core/Src/i2c.c **** {
81:Core/Src/i2c.c **** Error_Handler();
128 .loc 1 81 0
129 0028 FFF7FEFF bl Error_Handler
130 .LVL3:
82:Core/Src/i2c.c **** }
83:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_Init 2 */
84:Core/Src/i2c.c ****
85:Core/Src/i2c.c **** /* USER CODE END I2C2_Init 2 */
86:Core/Src/i2c.c ****
87:Core/Src/i2c.c **** }
131 .loc 1 87 0
132 002c FBE7 b .L7
133 .L12:
134 002e 00BF .align 2
135 .L11:
136 0030 00000000 .word hi2c2
137 0034 00580040 .word 1073764352
138 0038 A0860100 .word 100000
139 .cfi_endproc
140 .LFE66:
142 .section .text.HAL_I2C_MspInit,"ax",%progbits
143 .align 1
144 .global HAL_I2C_MspInit
145 .syntax unified
ARM GAS /tmp/ccpJ3TPh.s page 5
146 .thumb
147 .thumb_func
148 .fpu softvfp
150 HAL_I2C_MspInit:
151 .LFB67:
88:Core/Src/i2c.c ****
89:Core/Src/i2c.c **** void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
90:Core/Src/i2c.c **** {
152 .loc 1 90 0
153 .cfi_startproc
154 @ args = 0, pretend = 0, frame = 32
155 @ frame_needed = 0, uses_anonymous_args = 0
156 .LVL4:
157 0000 10B5 push {r4, lr}
158 .LCFI2:
159 .cfi_def_cfa_offset 8
160 .cfi_offset 4, -8
161 .cfi_offset 14, -4
162 0002 88B0 sub sp, sp, #32
163 .LCFI3:
164 .cfi_def_cfa_offset 40
91:Core/Src/i2c.c ****
92:Core/Src/i2c.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
165 .loc 1 92 0
166 0004 0023 movs r3, #0
167 0006 0493 str r3, [sp, #16]
168 0008 0593 str r3, [sp, #20]
169 000a 0693 str r3, [sp, #24]
170 000c 0793 str r3, [sp, #28]
93:Core/Src/i2c.c **** if(i2cHandle->Instance==I2C1)
171 .loc 1 93 0
172 000e 0368 ldr r3, [r0]
173 0010 264A ldr r2, .L19
174 0012 9342 cmp r3, r2
175 0014 04D0 beq .L17
94:Core/Src/i2c.c **** {
95:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_MspInit 0 */
96:Core/Src/i2c.c ****
97:Core/Src/i2c.c **** /* USER CODE END I2C1_MspInit 0 */
98:Core/Src/i2c.c ****
99:Core/Src/i2c.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
100:Core/Src/i2c.c **** /**I2C1 GPIO Configuration
101:Core/Src/i2c.c **** PB8 ------> I2C1_SCL
102:Core/Src/i2c.c **** PB9 ------> I2C1_SDA
103:Core/Src/i2c.c **** */
104:Core/Src/i2c.c **** GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
105:Core/Src/i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
106:Core/Src/i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
107:Core/Src/i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
108:Core/Src/i2c.c ****
109:Core/Src/i2c.c **** __HAL_AFIO_REMAP_I2C1_ENABLE();
110:Core/Src/i2c.c ****
111:Core/Src/i2c.c **** /* I2C1 clock enable */
112:Core/Src/i2c.c **** __HAL_RCC_I2C1_CLK_ENABLE();
113:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
114:Core/Src/i2c.c ****
115:Core/Src/i2c.c **** /* USER CODE END I2C1_MspInit 1 */
ARM GAS /tmp/ccpJ3TPh.s page 6
116:Core/Src/i2c.c **** }
117:Core/Src/i2c.c **** else if(i2cHandle->Instance==I2C2)
176 .loc 1 117 0
177 0016 264A ldr r2, .L19+4
178 0018 9342 cmp r3, r2
179 001a 27D0 beq .L18
180 .LVL5:
181 .L13:
118:Core/Src/i2c.c **** {
119:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_MspInit 0 */
120:Core/Src/i2c.c ****
121:Core/Src/i2c.c **** /* USER CODE END I2C2_MspInit 0 */
122:Core/Src/i2c.c ****
123:Core/Src/i2c.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
124:Core/Src/i2c.c **** /**I2C2 GPIO Configuration
125:Core/Src/i2c.c **** PB10 ------> I2C2_SCL
126:Core/Src/i2c.c **** PB11 ------> I2C2_SDA
127:Core/Src/i2c.c **** */
128:Core/Src/i2c.c **** GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
129:Core/Src/i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
130:Core/Src/i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
131:Core/Src/i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
132:Core/Src/i2c.c ****
133:Core/Src/i2c.c **** /* I2C2 clock enable */
134:Core/Src/i2c.c **** __HAL_RCC_I2C2_CLK_ENABLE();
135:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_MspInit 1 */
136:Core/Src/i2c.c ****
137:Core/Src/i2c.c **** /* USER CODE END I2C2_MspInit 1 */
138:Core/Src/i2c.c **** }
139:Core/Src/i2c.c **** }
182 .loc 1 139 0
183 001c 08B0 add sp, sp, #32
184 .LCFI4:
185 .cfi_remember_state
186 .cfi_def_cfa_offset 8
187 @ sp needed
188 001e 10BD pop {r4, pc}
189 .LVL6:
190 .L17:
191 .LCFI5:
192 .cfi_restore_state
193 .LBB2:
99:Core/Src/i2c.c **** /**I2C1 GPIO Configuration
194 .loc 1 99 0
195 0020 244C ldr r4, .L19+8
196 0022 A369 ldr r3, [r4, #24]
197 0024 43F00803 orr r3, r3, #8
198 0028 A361 str r3, [r4, #24]
199 002a A369 ldr r3, [r4, #24]
200 002c 03F00803 and r3, r3, #8
201 0030 0093 str r3, [sp]
202 0032 009B ldr r3, [sp]
203 .LBE2:
104:Core/Src/i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
204 .loc 1 104 0
205 0034 4FF44073 mov r3, #768
206 0038 0493 str r3, [sp, #16]
ARM GAS /tmp/ccpJ3TPh.s page 7
105:Core/Src/i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
207 .loc 1 105 0
208 003a 1223 movs r3, #18
209 003c 0593 str r3, [sp, #20]
106:Core/Src/i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
210 .loc 1 106 0
211 003e 0323 movs r3, #3
212 0040 0793 str r3, [sp, #28]
107:Core/Src/i2c.c ****
213 .loc 1 107 0
214 0042 04A9 add r1, sp, #16
215 0044 1C48 ldr r0, .L19+12
216 .LVL7:
217 0046 FFF7FEFF bl HAL_GPIO_Init
218 .LVL8:
219 .LBB3:
109:Core/Src/i2c.c ****
220 .loc 1 109 0
221 004a 1C4A ldr r2, .L19+16
222 004c 5368 ldr r3, [r2, #4]
223 .LVL9:
224 004e 43F0E063 orr r3, r3, #117440512
225 .LVL10:
226 0052 43F00203 orr r3, r3, #2
227 .LVL11:
228 0056 5360 str r3, [r2, #4]
229 .LBE3:
230 .LBB4:
112:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_MspInit 1 */
231 .loc 1 112 0
232 0058 E369 ldr r3, [r4, #28]
233 .LVL12:
234 005a 43F40013 orr r3, r3, #2097152
235 005e E361 str r3, [r4, #28]
236 .LVL13:
237 0060 E369 ldr r3, [r4, #28]
238 0062 03F40013 and r3, r3, #2097152
239 0066 0193 str r3, [sp, #4]
240 0068 019B ldr r3, [sp, #4]
241 .LBE4:
242 006a D7E7 b .L13
243 .LVL14:
244 .L18:
245 .LBB5:
123:Core/Src/i2c.c **** /**I2C2 GPIO Configuration
246 .loc 1 123 0
247 006c 114C ldr r4, .L19+8
248 006e A369 ldr r3, [r4, #24]
249 0070 43F00803 orr r3, r3, #8
250 0074 A361 str r3, [r4, #24]
251 0076 A369 ldr r3, [r4, #24]
252 0078 03F00803 and r3, r3, #8
253 007c 0293 str r3, [sp, #8]
254 007e 029B ldr r3, [sp, #8]
255 .LBE5:
128:Core/Src/i2c.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
256 .loc 1 128 0
ARM GAS /tmp/ccpJ3TPh.s page 8
257 0080 4FF44063 mov r3, #3072
258 0084 0493 str r3, [sp, #16]
129:Core/Src/i2c.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
259 .loc 1 129 0
260 0086 1223 movs r3, #18
261 0088 0593 str r3, [sp, #20]
130:Core/Src/i2c.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
262 .loc 1 130 0
263 008a 0323 movs r3, #3
264 008c 0793 str r3, [sp, #28]
131:Core/Src/i2c.c ****
265 .loc 1 131 0
266 008e 04A9 add r1, sp, #16
267 0090 0948 ldr r0, .L19+12
268 .LVL15:
269 0092 FFF7FEFF bl HAL_GPIO_Init
270 .LVL16:
271 .LBB6:
134:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_MspInit 1 */
272 .loc 1 134 0
273 0096 E369 ldr r3, [r4, #28]
274 0098 43F48003 orr r3, r3, #4194304
275 009c E361 str r3, [r4, #28]
276 009e E369 ldr r3, [r4, #28]
277 00a0 03F48003 and r3, r3, #4194304
278 00a4 0393 str r3, [sp, #12]
279 00a6 039B ldr r3, [sp, #12]
280 .LBE6:
281 .loc 1 139 0
282 00a8 B8E7 b .L13
283 .L20:
284 00aa 00BF .align 2
285 .L19:
286 00ac 00540040 .word 1073763328
287 00b0 00580040 .word 1073764352
288 00b4 00100240 .word 1073876992
289 00b8 000C0140 .word 1073810432
290 00bc 00000140 .word 1073807360
291 .cfi_endproc
292 .LFE67:
294 .section .text.HAL_I2C_MspDeInit,"ax",%progbits
295 .align 1
296 .global HAL_I2C_MspDeInit
297 .syntax unified
298 .thumb
299 .thumb_func
300 .fpu softvfp
302 HAL_I2C_MspDeInit:
303 .LFB68:
140:Core/Src/i2c.c ****
141:Core/Src/i2c.c **** void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
142:Core/Src/i2c.c **** {
304 .loc 1 142 0
305 .cfi_startproc
306 @ args = 0, pretend = 0, frame = 0
307 @ frame_needed = 0, uses_anonymous_args = 0
308 .LVL17:
ARM GAS /tmp/ccpJ3TPh.s page 9
309 0000 10B5 push {r4, lr}
310 .LCFI6:
311 .cfi_def_cfa_offset 8
312 .cfi_offset 4, -8
313 .cfi_offset 14, -4
143:Core/Src/i2c.c ****
144:Core/Src/i2c.c **** if(i2cHandle->Instance==I2C1)
314 .loc 1 144 0
315 0002 0368 ldr r3, [r0]
316 0004 154A ldr r2, .L27
317 0006 9342 cmp r3, r2
318 0008 03D0 beq .L25
145:Core/Src/i2c.c **** {
146:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_MspDeInit 0 */
147:Core/Src/i2c.c ****
148:Core/Src/i2c.c **** /* USER CODE END I2C1_MspDeInit 0 */
149:Core/Src/i2c.c **** /* Peripheral clock disable */
150:Core/Src/i2c.c **** __HAL_RCC_I2C1_CLK_DISABLE();
151:Core/Src/i2c.c ****
152:Core/Src/i2c.c **** /**I2C1 GPIO Configuration
153:Core/Src/i2c.c **** PB8 ------> I2C1_SCL
154:Core/Src/i2c.c **** PB9 ------> I2C1_SDA
155:Core/Src/i2c.c **** */
156:Core/Src/i2c.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8);
157:Core/Src/i2c.c ****
158:Core/Src/i2c.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9);
159:Core/Src/i2c.c ****
160:Core/Src/i2c.c **** /* USER CODE BEGIN I2C1_MspDeInit 1 */
161:Core/Src/i2c.c ****
162:Core/Src/i2c.c **** /* USER CODE END I2C1_MspDeInit 1 */
163:Core/Src/i2c.c **** }
164:Core/Src/i2c.c **** else if(i2cHandle->Instance==I2C2)
319 .loc 1 164 0
320 000a 154A ldr r2, .L27+4
321 000c 9342 cmp r3, r2
322 000e 12D0 beq .L26
323 .LVL18:
324 .L21:
325 0010 10BD pop {r4, pc}
326 .LVL19:
327 .L25:
150:Core/Src/i2c.c ****
328 .loc 1 150 0
329 0012 02F5DE32 add r2, r2, #113664
330 0016 D369 ldr r3, [r2, #28]
331 0018 23F40013 bic r3, r3, #2097152
332 001c D361 str r3, [r2, #28]
156:Core/Src/i2c.c ****
333 .loc 1 156 0
334 001e 114C ldr r4, .L27+8
335 0020 4FF48071 mov r1, #256
336 0024 2046 mov r0, r4
337 .LVL20:
338 0026 FFF7FEFF bl HAL_GPIO_DeInit
339 .LVL21:
158:Core/Src/i2c.c ****
340 .loc 1 158 0
ARM GAS /tmp/ccpJ3TPh.s page 10
341 002a 4FF40071 mov r1, #512
342 002e 2046 mov r0, r4
343 0030 FFF7FEFF bl HAL_GPIO_DeInit
344 .LVL22:
345 0034 10BD pop {r4, pc}
346 .LVL23:
347 .L26:
165:Core/Src/i2c.c **** {
166:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_MspDeInit 0 */
167:Core/Src/i2c.c ****
168:Core/Src/i2c.c **** /* USER CODE END I2C2_MspDeInit 0 */
169:Core/Src/i2c.c **** /* Peripheral clock disable */
170:Core/Src/i2c.c **** __HAL_RCC_I2C2_CLK_DISABLE();
348 .loc 1 170 0
349 0036 02F5DC32 add r2, r2, #112640
350 003a D369 ldr r3, [r2, #28]
351 003c 23F48003 bic r3, r3, #4194304
352 0040 D361 str r3, [r2, #28]
171:Core/Src/i2c.c ****
172:Core/Src/i2c.c **** /**I2C2 GPIO Configuration
173:Core/Src/i2c.c **** PB10 ------> I2C2_SCL
174:Core/Src/i2c.c **** PB11 ------> I2C2_SDA
175:Core/Src/i2c.c **** */
176:Core/Src/i2c.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_10);
353 .loc 1 176 0
354 0042 084C ldr r4, .L27+8
355 0044 4FF48061 mov r1, #1024
356 0048 2046 mov r0, r4
357 .LVL24:
358 004a FFF7FEFF bl HAL_GPIO_DeInit
359 .LVL25:
177:Core/Src/i2c.c ****
178:Core/Src/i2c.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_11);
360 .loc 1 178 0
361 004e 4FF40061 mov r1, #2048
362 0052 2046 mov r0, r4
363 0054 FFF7FEFF bl HAL_GPIO_DeInit
364 .LVL26:
179:Core/Src/i2c.c ****
180:Core/Src/i2c.c **** /* USER CODE BEGIN I2C2_MspDeInit 1 */
181:Core/Src/i2c.c ****
182:Core/Src/i2c.c **** /* USER CODE END I2C2_MspDeInit 1 */
183:Core/Src/i2c.c **** }
184:Core/Src/i2c.c **** }
365 .loc 1 184 0
366 0058 DAE7 b .L21
367 .L28:
368 005a 00BF .align 2
369 .L27:
370 005c 00540040 .word 1073763328
371 0060 00580040 .word 1073764352
372 0064 000C0140 .word 1073810432
373 .cfi_endproc
374 .LFE68:
376 .comm hi2c2,84,4
377 .comm hi2c1,84,4
378 .text
ARM GAS /tmp/ccpJ3TPh.s page 11
379 .Letext0:
380 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
381 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
382 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
383 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
384 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
385 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
386 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
387 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
388 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
389 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
390 .file 12 "Core/Inc/i2c.h"
391 .file 13 "Core/Inc/main.h"
ARM GAS /tmp/ccpJ3TPh.s page 12
DEFINED SYMBOLS
*ABS*:0000000000000000 i2c.c
/tmp/ccpJ3TPh.s:16 .text.MX_I2C1_Init:0000000000000000 $t
/tmp/ccpJ3TPh.s:23 .text.MX_I2C1_Init:0000000000000000 MX_I2C1_Init
/tmp/ccpJ3TPh.s:73 .text.MX_I2C1_Init:0000000000000030 $d
*COM*:0000000000000054 hi2c1
/tmp/ccpJ3TPh.s:80 .text.MX_I2C2_Init:0000000000000000 $t
/tmp/ccpJ3TPh.s:87 .text.MX_I2C2_Init:0000000000000000 MX_I2C2_Init
/tmp/ccpJ3TPh.s:136 .text.MX_I2C2_Init:0000000000000030 $d
*COM*:0000000000000054 hi2c2
/tmp/ccpJ3TPh.s:143 .text.HAL_I2C_MspInit:0000000000000000 $t
/tmp/ccpJ3TPh.s:150 .text.HAL_I2C_MspInit:0000000000000000 HAL_I2C_MspInit
/tmp/ccpJ3TPh.s:286 .text.HAL_I2C_MspInit:00000000000000ac $d
/tmp/ccpJ3TPh.s:295 .text.HAL_I2C_MspDeInit:0000000000000000 $t
/tmp/ccpJ3TPh.s:302 .text.HAL_I2C_MspDeInit:0000000000000000 HAL_I2C_MspDeInit
/tmp/ccpJ3TPh.s:370 .text.HAL_I2C_MspDeInit:000000000000005c $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_I2C_Init
Error_Handler
HAL_GPIO_Init
HAL_GPIO_DeInit

BIN
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115
build/main.d
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build/main.o: Core/Src/main.c Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h Core/Inc/adc.h \
Core/Inc/main.h Core/Inc/dac.h Core/Inc/i2c.h Core/Inc/spi.h \
Core/Inc/tim.h Core/Inc/usart.h Core/Inc/gpio.h \
Core/Inc/User/user_main.h
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:
Core/Inc/adc.h:
Core/Inc/main.h:
Core/Inc/dac.h:
Core/Inc/i2c.h:
Core/Inc/spi.h:
Core/Inc/tim.h:
Core/Inc/usart.h:
Core/Inc/gpio.h:
Core/Inc/User/user_main.h:

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ARM GAS /tmp/ccmpSzyr.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "main.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.Error_Handler,"ax",%progbits
16 .align 1
17 .global Error_Handler
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 Error_Handler:
24 .LFB67:
25 .file 1 "Core/Src/main.c"
1:Core/Src/main.c **** /* USER CODE BEGIN Header */
2:Core/Src/main.c **** /**
3:Core/Src/main.c **** ******************************************************************************
4:Core/Src/main.c **** * @file : main.c
5:Core/Src/main.c **** * @brief : Main program body
6:Core/Src/main.c **** ******************************************************************************
7:Core/Src/main.c **** * @attention
8:Core/Src/main.c **** *
9:Core/Src/main.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/main.c **** * All rights reserved.</center></h2>
11:Core/Src/main.c **** *
12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/main.c **** * License. You may obtain a copy of the License at:
15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/main.c **** *
17:Core/Src/main.c **** ******************************************************************************
18:Core/Src/main.c **** */
19:Core/Src/main.c **** /* USER CODE END Header */
20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/main.c **** #include "main.h"
22:Core/Src/main.c **** #include "adc.h"
23:Core/Src/main.c **** #include "dac.h"
24:Core/Src/main.c **** #include "i2c.h"
25:Core/Src/main.c **** #include "spi.h"
26:Core/Src/main.c **** #include "tim.h"
27:Core/Src/main.c **** #include "usart.h"
28:Core/Src/main.c **** #include "gpio.h"
29:Core/Src/main.c ****
30:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/
31:Core/Src/main.c **** /* USER CODE BEGIN Includes */
32:Core/Src/main.c **** #include "user_main.h"
33:Core/Src/main.c **** /* USER CODE END Includes */
ARM GAS /tmp/ccmpSzyr.s page 2
34:Core/Src/main.c ****
35:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/
36:Core/Src/main.c **** /* USER CODE BEGIN PTD */
37:Core/Src/main.c ****
38:Core/Src/main.c **** /* USER CODE END PTD */
39:Core/Src/main.c ****
40:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/
41:Core/Src/main.c **** /* USER CODE BEGIN PD */
42:Core/Src/main.c **** /* USER CODE END PD */
43:Core/Src/main.c ****
44:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/
45:Core/Src/main.c **** /* USER CODE BEGIN PM */
46:Core/Src/main.c ****
47:Core/Src/main.c **** /* USER CODE END PM */
48:Core/Src/main.c ****
49:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/
50:Core/Src/main.c ****
51:Core/Src/main.c **** /* USER CODE BEGIN PV */
52:Core/Src/main.c ****
53:Core/Src/main.c **** /* USER CODE END PV */
54:Core/Src/main.c ****
55:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/
56:Core/Src/main.c **** void SystemClock_Config(void);
57:Core/Src/main.c **** /* USER CODE BEGIN PFP */
58:Core/Src/main.c ****
59:Core/Src/main.c **** /* USER CODE END PFP */
60:Core/Src/main.c ****
61:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/
62:Core/Src/main.c **** /* USER CODE BEGIN 0 */
63:Core/Src/main.c ****
64:Core/Src/main.c **** /* USER CODE END 0 */
65:Core/Src/main.c ****
66:Core/Src/main.c **** /**
67:Core/Src/main.c **** * @brief The application entry point.
68:Core/Src/main.c **** * @retval int
69:Core/Src/main.c **** */
70:Core/Src/main.c **** int main(void)
71:Core/Src/main.c **** {
72:Core/Src/main.c **** /* USER CODE BEGIN 1 */
73:Core/Src/main.c ****
74:Core/Src/main.c **** /* USER CODE END 1 */
75:Core/Src/main.c ****
76:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
77:Core/Src/main.c ****
78:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
79:Core/Src/main.c **** HAL_Init();
80:Core/Src/main.c ****
81:Core/Src/main.c **** /* USER CODE BEGIN Init */
82:Core/Src/main.c ****
83:Core/Src/main.c **** /* USER CODE END Init */
84:Core/Src/main.c ****
85:Core/Src/main.c **** /* Configure the system clock */
86:Core/Src/main.c **** SystemClock_Config();
87:Core/Src/main.c ****
88:Core/Src/main.c **** /* USER CODE BEGIN SysInit */
89:Core/Src/main.c ****
90:Core/Src/main.c **** /* USER CODE END SysInit */
ARM GAS /tmp/ccmpSzyr.s page 3
91:Core/Src/main.c ****
92:Core/Src/main.c **** /* Initialize all configured peripherals */
93:Core/Src/main.c **** MX_GPIO_Init();
94:Core/Src/main.c **** MX_DAC_Init();
95:Core/Src/main.c **** MX_I2C1_Init();
96:Core/Src/main.c **** MX_I2C2_Init();
97:Core/Src/main.c **** MX_SPI1_Init();
98:Core/Src/main.c **** MX_SPI2_Init();
99:Core/Src/main.c **** MX_UART4_Init();
100:Core/Src/main.c **** MX_ADC1_Init();
101:Core/Src/main.c **** MX_USART1_UART_Init();
102:Core/Src/main.c **** MX_TIM3_Init();
103:Core/Src/main.c **** MX_TIM8_Init();
104:Core/Src/main.c **** MX_TIM4_Init();
105:Core/Src/main.c **** /* USER CODE BEGIN 2 */
106:Core/Src/main.c **** user_setup();
107:Core/Src/main.c **** /* USER CODE END 2 */
108:Core/Src/main.c ****
109:Core/Src/main.c **** /* Infinite loop */
110:Core/Src/main.c **** /* USER CODE BEGIN WHILE */
111:Core/Src/main.c **** while (1)
112:Core/Src/main.c **** {
113:Core/Src/main.c **** user_loop();
114:Core/Src/main.c **** /* USER CODE END WHILE */
115:Core/Src/main.c ****
116:Core/Src/main.c **** /* USER CODE BEGIN 3 */
117:Core/Src/main.c **** }
118:Core/Src/main.c **** /* USER CODE END 3 */
119:Core/Src/main.c **** }
120:Core/Src/main.c ****
121:Core/Src/main.c **** /**
122:Core/Src/main.c **** * @brief System Clock Configuration
123:Core/Src/main.c **** * @retval None
124:Core/Src/main.c **** */
125:Core/Src/main.c **** void SystemClock_Config(void)
126:Core/Src/main.c **** {
127:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
128:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
129:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
130:Core/Src/main.c ****
131:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
132:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure.
133:Core/Src/main.c **** */
134:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
135:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
136:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
137:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON;
138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
140:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
141:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
142:Core/Src/main.c **** {
143:Core/Src/main.c **** Error_Handler();
144:Core/Src/main.c **** }
145:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
146:Core/Src/main.c **** */
147:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
ARM GAS /tmp/ccmpSzyr.s page 4
148:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
149:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
150:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
151:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
152:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
153:Core/Src/main.c ****
154:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
155:Core/Src/main.c **** {
156:Core/Src/main.c **** Error_Handler();
157:Core/Src/main.c **** }
158:Core/Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
159:Core/Src/main.c **** PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
160:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
161:Core/Src/main.c **** {
162:Core/Src/main.c **** Error_Handler();
163:Core/Src/main.c **** }
164:Core/Src/main.c **** }
165:Core/Src/main.c ****
166:Core/Src/main.c **** /* USER CODE BEGIN 4 */
167:Core/Src/main.c ****
168:Core/Src/main.c **** /* USER CODE END 4 */
169:Core/Src/main.c ****
170:Core/Src/main.c **** /**
171:Core/Src/main.c **** * @brief This function is executed in case of error occurrence.
172:Core/Src/main.c **** * @retval None
173:Core/Src/main.c **** */
174:Core/Src/main.c **** void Error_Handler(void)
175:Core/Src/main.c **** {
26 .loc 1 175 0
27 .cfi_startproc
28 @ Volatile: function does not return.
29 @ args = 0, pretend = 0, frame = 0
30 @ frame_needed = 0, uses_anonymous_args = 0
31 @ link register save eliminated.
32 .LBB4:
33 .LBB5:
34 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ARM GAS /tmp/ccmpSzyr.s page 5
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
24:Drivers/CMSIS/Include/cmsis_gcc.h ****
25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
27:Drivers/CMSIS/Include/cmsis_gcc.h ****
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
38:Drivers/CMSIS/Include/cmsis_gcc.h ****
39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
ARM GAS /tmp/ccmpSzyr.s page 6
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
ARM GAS /tmp/ccmpSzyr.s page 7
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
35 .loc 2 142 0
36 .syntax unified
37 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
38 0000 72B6 cpsid i
39 @ 0 "" 2
40 .thumb
41 .syntax unified
42 .L2:
43 0002 FEE7 b .L2
44 .LBE5:
45 .LBE4:
46 .cfi_endproc
47 .LFE67:
49 .section .text.SystemClock_Config,"ax",%progbits
50 .align 1
51 .global SystemClock_Config
52 .syntax unified
53 .thumb
54 .thumb_func
55 .fpu softvfp
57 SystemClock_Config:
58 .LFB66:
126:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
59 .loc 1 126 0
60 .cfi_startproc
61 @ args = 0, pretend = 0, frame = 88
62 @ frame_needed = 0, uses_anonymous_args = 0
63 0000 00B5 push {lr}
64 .LCFI0:
65 .cfi_def_cfa_offset 4
66 .cfi_offset 14, -4
67 0002 97B0 sub sp, sp, #92
68 .LCFI1:
69 .cfi_def_cfa_offset 96
127:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
70 .loc 1 127 0
71 0004 2822 movs r2, #40
72 0006 0021 movs r1, #0
73 0008 0CA8 add r0, sp, #48
74 000a FFF7FEFF bl memset
75 .LVL0:
128:Core/Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
76 .loc 1 128 0
77 000e 0023 movs r3, #0
78 0010 0793 str r3, [sp, #28]
79 0012 0893 str r3, [sp, #32]
80 0014 0993 str r3, [sp, #36]
81 0016 0A93 str r3, [sp, #40]
82 0018 0B93 str r3, [sp, #44]
ARM GAS /tmp/ccmpSzyr.s page 8
129:Core/Src/main.c ****
83 .loc 1 129 0
84 001a 0193 str r3, [sp, #4]
85 001c 0293 str r3, [sp, #8]
86 001e 0393 str r3, [sp, #12]
87 0020 0493 str r3, [sp, #16]
88 0022 0593 str r3, [sp, #20]
89 0024 0693 str r3, [sp, #24]
134:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
90 .loc 1 134 0
91 0026 0122 movs r2, #1
92 0028 0C92 str r2, [sp, #48]
135:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
93 .loc 1 135 0
94 002a 4FF48033 mov r3, #65536
95 002e 0D93 str r3, [sp, #52]
137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
96 .loc 1 137 0
97 0030 1092 str r2, [sp, #64]
138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
98 .loc 1 138 0
99 0032 0222 movs r2, #2
100 0034 1392 str r2, [sp, #76]
139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
101 .loc 1 139 0
102 0036 1493 str r3, [sp, #80]
140:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
103 .loc 1 140 0
104 0038 4FF4E013 mov r3, #1835008
105 003c 1593 str r3, [sp, #84]
141:Core/Src/main.c **** {
106 .loc 1 141 0
107 003e 0CA8 add r0, sp, #48
108 0040 FFF7FEFF bl HAL_RCC_OscConfig
109 .LVL1:
110 0044 C8B9 cbnz r0, .L8
147:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
111 .loc 1 147 0
112 0046 0F23 movs r3, #15
113 0048 0793 str r3, [sp, #28]
149:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
114 .loc 1 149 0
115 004a 0221 movs r1, #2
116 004c 0891 str r1, [sp, #32]
150:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
117 .loc 1 150 0
118 004e 0023 movs r3, #0
119 0050 0993 str r3, [sp, #36]
151:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
120 .loc 1 151 0
121 0052 4FF48062 mov r2, #1024
122 0056 0A92 str r2, [sp, #40]
152:Core/Src/main.c ****
123 .loc 1 152 0
124 0058 0B93 str r3, [sp, #44]
154:Core/Src/main.c **** {
125 .loc 1 154 0
ARM GAS /tmp/ccmpSzyr.s page 9
126 005a 07A8 add r0, sp, #28
127 005c FFF7FEFF bl HAL_RCC_ClockConfig
128 .LVL2:
129 0060 68B9 cbnz r0, .L9
158:Core/Src/main.c **** PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
130 .loc 1 158 0
131 0062 0223 movs r3, #2
132 0064 0193 str r3, [sp, #4]
159:Core/Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
133 .loc 1 159 0
134 0066 4FF40043 mov r3, #32768
135 006a 0393 str r3, [sp, #12]
160:Core/Src/main.c **** {
136 .loc 1 160 0
137 006c 01A8 add r0, sp, #4
138 006e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
139 .LVL3:
140 0072 30B9 cbnz r0, .L10
164:Core/Src/main.c ****
141 .loc 1 164 0
142 0074 17B0 add sp, sp, #92
143 .LCFI2:
144 .cfi_remember_state
145 .cfi_def_cfa_offset 4
146 @ sp needed
147 0076 5DF804FB ldr pc, [sp], #4
148 .L8:
149 .LCFI3:
150 .cfi_restore_state
143:Core/Src/main.c **** }
151 .loc 1 143 0
152 007a FFF7FEFF bl Error_Handler
153 .LVL4:
154 .L9:
156:Core/Src/main.c **** }
155 .loc 1 156 0
156 007e FFF7FEFF bl Error_Handler
157 .LVL5:
158 .L10:
162:Core/Src/main.c **** }
159 .loc 1 162 0
160 0082 FFF7FEFF bl Error_Handler
161 .LVL6:
162 .cfi_endproc
163 .LFE66:
165 .section .text.main,"ax",%progbits
166 .align 1
167 .global main
168 .syntax unified
169 .thumb
170 .thumb_func
171 .fpu softvfp
173 main:
174 .LFB65:
71:Core/Src/main.c **** /* USER CODE BEGIN 1 */
175 .loc 1 71 0
176 .cfi_startproc
ARM GAS /tmp/ccmpSzyr.s page 10
177 @ Volatile: function does not return.
178 @ args = 0, pretend = 0, frame = 0
179 @ frame_needed = 0, uses_anonymous_args = 0
180 0000 08B5 push {r3, lr}
181 .LCFI4:
182 .cfi_def_cfa_offset 8
183 .cfi_offset 3, -8
184 .cfi_offset 14, -4
79:Core/Src/main.c ****
185 .loc 1 79 0
186 0002 FFF7FEFF bl HAL_Init
187 .LVL7:
86:Core/Src/main.c ****
188 .loc 1 86 0
189 0006 FFF7FEFF bl SystemClock_Config
190 .LVL8:
93:Core/Src/main.c **** MX_DAC_Init();
191 .loc 1 93 0
192 000a FFF7FEFF bl MX_GPIO_Init
193 .LVL9:
94:Core/Src/main.c **** MX_I2C1_Init();
194 .loc 1 94 0
195 000e FFF7FEFF bl MX_DAC_Init
196 .LVL10:
95:Core/Src/main.c **** MX_I2C2_Init();
197 .loc 1 95 0
198 0012 FFF7FEFF bl MX_I2C1_Init
199 .LVL11:
96:Core/Src/main.c **** MX_SPI1_Init();
200 .loc 1 96 0
201 0016 FFF7FEFF bl MX_I2C2_Init
202 .LVL12:
97:Core/Src/main.c **** MX_SPI2_Init();
203 .loc 1 97 0
204 001a FFF7FEFF bl MX_SPI1_Init
205 .LVL13:
98:Core/Src/main.c **** MX_UART4_Init();
206 .loc 1 98 0
207 001e FFF7FEFF bl MX_SPI2_Init
208 .LVL14:
99:Core/Src/main.c **** MX_ADC1_Init();
209 .loc 1 99 0
210 0022 FFF7FEFF bl MX_UART4_Init
211 .LVL15:
100:Core/Src/main.c **** MX_USART1_UART_Init();
212 .loc 1 100 0
213 0026 FFF7FEFF bl MX_ADC1_Init
214 .LVL16:
101:Core/Src/main.c **** MX_TIM3_Init();
215 .loc 1 101 0
216 002a FFF7FEFF bl MX_USART1_UART_Init
217 .LVL17:
102:Core/Src/main.c **** MX_TIM8_Init();
218 .loc 1 102 0
219 002e FFF7FEFF bl MX_TIM3_Init
220 .LVL18:
103:Core/Src/main.c **** MX_TIM4_Init();
ARM GAS /tmp/ccmpSzyr.s page 11
221 .loc 1 103 0
222 0032 FFF7FEFF bl MX_TIM8_Init
223 .LVL19:
104:Core/Src/main.c **** /* USER CODE BEGIN 2 */
224 .loc 1 104 0
225 0036 FFF7FEFF bl MX_TIM4_Init
226 .LVL20:
106:Core/Src/main.c **** /* USER CODE END 2 */
227 .loc 1 106 0
228 003a FFF7FEFF bl user_setup
229 .LVL21:
230 .L12:
113:Core/Src/main.c **** /* USER CODE END WHILE */
231 .loc 1 113 0 discriminator 1
232 003e FFF7FEFF bl user_loop
233 .LVL22:
234 0042 FCE7 b .L12
235 .cfi_endproc
236 .LFE65:
238 .text
239 .Letext0:
240 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
241 .file 4 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
242 .file 5 "Drivers/CMSIS/Include/core_cm3.h"
243 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
244 .file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
245 .file 8 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h"
246 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
247 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h"
248 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h"
249 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
250 .file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h"
251 .file 14 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h"
252 .file 15 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h"
253 .file 16 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
254 .file 17 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h"
255 .file 18 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h"
256 .file 19 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
257 .file 20 "Core/Inc/adc.h"
258 .file 21 "Core/Inc/dac.h"
259 .file 22 "Core/Inc/i2c.h"
260 .file 23 "Core/Inc/spi.h"
261 .file 24 "Core/Inc/tim.h"
262 .file 25 "Core/Inc/usart.h"
263 .file 26 "Core/Inc/gpio.h"
264 .file 27 "Core/Inc/User/user_main.h"
ARM GAS /tmp/ccmpSzyr.s page 12
DEFINED SYMBOLS
*ABS*:0000000000000000 main.c
/tmp/ccmpSzyr.s:16 .text.Error_Handler:0000000000000000 $t
/tmp/ccmpSzyr.s:23 .text.Error_Handler:0000000000000000 Error_Handler
/tmp/ccmpSzyr.s:50 .text.SystemClock_Config:0000000000000000 $t
/tmp/ccmpSzyr.s:57 .text.SystemClock_Config:0000000000000000 SystemClock_Config
/tmp/ccmpSzyr.s:166 .text.main:0000000000000000 $t
/tmp/ccmpSzyr.s:173 .text.main:0000000000000000 main
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
memset
HAL_RCC_OscConfig
HAL_RCC_ClockConfig
HAL_RCCEx_PeriphCLKConfig
HAL_Init
MX_GPIO_Init
MX_DAC_Init
MX_I2C1_Init
MX_I2C2_Init
MX_SPI1_Init
MX_SPI2_Init
MX_UART4_Init
MX_ADC1_Init
MX_USART1_UART_Init
MX_TIM3_Init
MX_TIM8_Init
MX_TIM4_Init
user_setup
user_loop

BIN
build/main.o
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96
build/spi.d
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@ -1,96 +0,0 @@
build/spi.o: Core/Src/spi.c Core/Inc/spi.h Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/spi.h:
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

697
build/spi.lst
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@ -1,697 +0,0 @@
ARM GAS /tmp/ccLqZfGE.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "spi.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.MX_SPI1_Init,"ax",%progbits
16 .align 1
17 .global MX_SPI1_Init
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 MX_SPI1_Init:
24 .LFB65:
25 .file 1 "Core/Src/spi.c"
1:Core/Src/spi.c **** /**
2:Core/Src/spi.c **** ******************************************************************************
3:Core/Src/spi.c **** * @file spi.c
4:Core/Src/spi.c **** * @brief This file provides code for the configuration
5:Core/Src/spi.c **** * of the SPI instances.
6:Core/Src/spi.c **** ******************************************************************************
7:Core/Src/spi.c **** * @attention
8:Core/Src/spi.c **** *
9:Core/Src/spi.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
10:Core/Src/spi.c **** * All rights reserved.</center></h2>
11:Core/Src/spi.c **** *
12:Core/Src/spi.c **** * This software component is licensed by ST under BSD 3-Clause license,
13:Core/Src/spi.c **** * the "License"; You may not use this file except in compliance with the
14:Core/Src/spi.c **** * License. You may obtain a copy of the License at:
15:Core/Src/spi.c **** * opensource.org/licenses/BSD-3-Clause
16:Core/Src/spi.c **** *
17:Core/Src/spi.c **** ******************************************************************************
18:Core/Src/spi.c **** */
19:Core/Src/spi.c ****
20:Core/Src/spi.c **** /* Includes ------------------------------------------------------------------*/
21:Core/Src/spi.c **** #include "spi.h"
22:Core/Src/spi.c ****
23:Core/Src/spi.c **** /* USER CODE BEGIN 0 */
24:Core/Src/spi.c ****
25:Core/Src/spi.c **** /* USER CODE END 0 */
26:Core/Src/spi.c ****
27:Core/Src/spi.c **** SPI_HandleTypeDef hspi1;
28:Core/Src/spi.c **** SPI_HandleTypeDef hspi2;
29:Core/Src/spi.c ****
30:Core/Src/spi.c **** /* SPI1 init function */
31:Core/Src/spi.c **** void MX_SPI1_Init(void)
32:Core/Src/spi.c **** {
26 .loc 1 32 0
ARM GAS /tmp/ccLqZfGE.s page 2
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 0000 08B5 push {r3, lr}
31 .LCFI0:
32 .cfi_def_cfa_offset 8
33 .cfi_offset 3, -8
34 .cfi_offset 14, -4
33:Core/Src/spi.c ****
34:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_Init 0 */
35:Core/Src/spi.c ****
36:Core/Src/spi.c **** /* USER CODE END SPI1_Init 0 */
37:Core/Src/spi.c ****
38:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_Init 1 */
39:Core/Src/spi.c ****
40:Core/Src/spi.c **** /* USER CODE END SPI1_Init 1 */
41:Core/Src/spi.c **** hspi1.Instance = SPI1;
35 .loc 1 41 0
36 0002 0E48 ldr r0, .L5
37 0004 0E4B ldr r3, .L5+4
38 0006 0360 str r3, [r0]
42:Core/Src/spi.c **** hspi1.Init.Mode = SPI_MODE_MASTER;
39 .loc 1 42 0
40 0008 4FF48273 mov r3, #260
41 000c 4360 str r3, [r0, #4]
43:Core/Src/spi.c **** hspi1.Init.Direction = SPI_DIRECTION_2LINES;
42 .loc 1 43 0
43 000e 0023 movs r3, #0
44 0010 8360 str r3, [r0, #8]
44:Core/Src/spi.c **** hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
45 .loc 1 44 0
46 0012 C360 str r3, [r0, #12]
45:Core/Src/spi.c **** hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
47 .loc 1 45 0
48 0014 0361 str r3, [r0, #16]
46:Core/Src/spi.c **** hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
49 .loc 1 46 0
50 0016 4361 str r3, [r0, #20]
47:Core/Src/spi.c **** hspi1.Init.NSS = SPI_NSS_SOFT;
51 .loc 1 47 0
52 0018 4FF40072 mov r2, #512
53 001c 8261 str r2, [r0, #24]
48:Core/Src/spi.c **** hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_128;
54 .loc 1 48 0
55 001e 3022 movs r2, #48
56 0020 C261 str r2, [r0, #28]
49:Core/Src/spi.c **** hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
57 .loc 1 49 0
58 0022 0362 str r3, [r0, #32]
50:Core/Src/spi.c **** hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
59 .loc 1 50 0
60 0024 4362 str r3, [r0, #36]
51:Core/Src/spi.c **** hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
61 .loc 1 51 0
62 0026 8362 str r3, [r0, #40]
52:Core/Src/spi.c **** hspi1.Init.CRCPolynomial = 10;
63 .loc 1 52 0
ARM GAS /tmp/ccLqZfGE.s page 3
64 0028 0A23 movs r3, #10
65 002a C362 str r3, [r0, #44]
53:Core/Src/spi.c **** if (HAL_SPI_Init(&hspi1) != HAL_OK)
66 .loc 1 53 0
67 002c FFF7FEFF bl HAL_SPI_Init
68 .LVL0:
69 0030 00B9 cbnz r0, .L4
70 .L1:
71 0032 08BD pop {r3, pc}
72 .L4:
54:Core/Src/spi.c **** {
55:Core/Src/spi.c **** Error_Handler();
73 .loc 1 55 0
74 0034 FFF7FEFF bl Error_Handler
75 .LVL1:
56:Core/Src/spi.c **** }
57:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_Init 2 */
58:Core/Src/spi.c ****
59:Core/Src/spi.c **** /* USER CODE END SPI1_Init 2 */
60:Core/Src/spi.c ****
61:Core/Src/spi.c **** }
76 .loc 1 61 0
77 0038 FBE7 b .L1
78 .L6:
79 003a 00BF .align 2
80 .L5:
81 003c 00000000 .word hspi1
82 0040 00300140 .word 1073819648
83 .cfi_endproc
84 .LFE65:
86 .section .text.MX_SPI2_Init,"ax",%progbits
87 .align 1
88 .global MX_SPI2_Init
89 .syntax unified
90 .thumb
91 .thumb_func
92 .fpu softvfp
94 MX_SPI2_Init:
95 .LFB66:
62:Core/Src/spi.c **** /* SPI2 init function */
63:Core/Src/spi.c **** void MX_SPI2_Init(void)
64:Core/Src/spi.c **** {
96 .loc 1 64 0
97 .cfi_startproc
98 @ args = 0, pretend = 0, frame = 0
99 @ frame_needed = 0, uses_anonymous_args = 0
100 0000 08B5 push {r3, lr}
101 .LCFI1:
102 .cfi_def_cfa_offset 8
103 .cfi_offset 3, -8
104 .cfi_offset 14, -4
65:Core/Src/spi.c ****
66:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_Init 0 */
67:Core/Src/spi.c ****
68:Core/Src/spi.c **** /* USER CODE END SPI2_Init 0 */
69:Core/Src/spi.c ****
70:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_Init 1 */
ARM GAS /tmp/ccLqZfGE.s page 4
71:Core/Src/spi.c ****
72:Core/Src/spi.c **** /* USER CODE END SPI2_Init 1 */
73:Core/Src/spi.c **** hspi2.Instance = SPI2;
105 .loc 1 73 0
106 0002 0D48 ldr r0, .L11
107 0004 0D4B ldr r3, .L11+4
108 0006 0360 str r3, [r0]
74:Core/Src/spi.c **** hspi2.Init.Mode = SPI_MODE_MASTER;
109 .loc 1 74 0
110 0008 4FF48273 mov r3, #260
111 000c 4360 str r3, [r0, #4]
75:Core/Src/spi.c **** hspi2.Init.Direction = SPI_DIRECTION_2LINES;
112 .loc 1 75 0
113 000e 0023 movs r3, #0
114 0010 8360 str r3, [r0, #8]
76:Core/Src/spi.c **** hspi2.Init.DataSize = SPI_DATASIZE_8BIT;
115 .loc 1 76 0
116 0012 C360 str r3, [r0, #12]
77:Core/Src/spi.c **** hspi2.Init.CLKPolarity = SPI_POLARITY_LOW;
117 .loc 1 77 0
118 0014 0361 str r3, [r0, #16]
78:Core/Src/spi.c **** hspi2.Init.CLKPhase = SPI_PHASE_1EDGE;
119 .loc 1 78 0
120 0016 4361 str r3, [r0, #20]
79:Core/Src/spi.c **** hspi2.Init.NSS = SPI_NSS_HARD_OUTPUT;
121 .loc 1 79 0
122 0018 4FF48022 mov r2, #262144
123 001c 8261 str r2, [r0, #24]
80:Core/Src/spi.c **** hspi2.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
124 .loc 1 80 0
125 001e C361 str r3, [r0, #28]
81:Core/Src/spi.c **** hspi2.Init.FirstBit = SPI_FIRSTBIT_MSB;
126 .loc 1 81 0
127 0020 0362 str r3, [r0, #32]
82:Core/Src/spi.c **** hspi2.Init.TIMode = SPI_TIMODE_DISABLE;
128 .loc 1 82 0
129 0022 4362 str r3, [r0, #36]
83:Core/Src/spi.c **** hspi2.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
130 .loc 1 83 0
131 0024 8362 str r3, [r0, #40]
84:Core/Src/spi.c **** hspi2.Init.CRCPolynomial = 10;
132 .loc 1 84 0
133 0026 0A23 movs r3, #10
134 0028 C362 str r3, [r0, #44]
85:Core/Src/spi.c **** if (HAL_SPI_Init(&hspi2) != HAL_OK)
135 .loc 1 85 0
136 002a FFF7FEFF bl HAL_SPI_Init
137 .LVL2:
138 002e 00B9 cbnz r0, .L10
139 .L7:
140 0030 08BD pop {r3, pc}
141 .L10:
86:Core/Src/spi.c **** {
87:Core/Src/spi.c **** Error_Handler();
142 .loc 1 87 0
143 0032 FFF7FEFF bl Error_Handler
144 .LVL3:
ARM GAS /tmp/ccLqZfGE.s page 5
88:Core/Src/spi.c **** }
89:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_Init 2 */
90:Core/Src/spi.c ****
91:Core/Src/spi.c **** /* USER CODE END SPI2_Init 2 */
92:Core/Src/spi.c ****
93:Core/Src/spi.c **** }
145 .loc 1 93 0
146 0036 FBE7 b .L7
147 .L12:
148 .align 2
149 .L11:
150 0038 00000000 .word hspi2
151 003c 00380040 .word 1073756160
152 .cfi_endproc
153 .LFE66:
155 .section .text.HAL_SPI_MspInit,"ax",%progbits
156 .align 1
157 .global HAL_SPI_MspInit
158 .syntax unified
159 .thumb
160 .thumb_func
161 .fpu softvfp
163 HAL_SPI_MspInit:
164 .LFB67:
94:Core/Src/spi.c ****
95:Core/Src/spi.c **** void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
96:Core/Src/spi.c **** {
165 .loc 1 96 0
166 .cfi_startproc
167 @ args = 0, pretend = 0, frame = 32
168 @ frame_needed = 0, uses_anonymous_args = 0
169 .LVL4:
170 0000 10B5 push {r4, lr}
171 .LCFI2:
172 .cfi_def_cfa_offset 8
173 .cfi_offset 4, -8
174 .cfi_offset 14, -4
175 0002 88B0 sub sp, sp, #32
176 .LCFI3:
177 .cfi_def_cfa_offset 40
97:Core/Src/spi.c ****
98:Core/Src/spi.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
178 .loc 1 98 0
179 0004 0023 movs r3, #0
180 0006 0493 str r3, [sp, #16]
181 0008 0593 str r3, [sp, #20]
182 000a 0693 str r3, [sp, #24]
183 000c 0793 str r3, [sp, #28]
99:Core/Src/spi.c **** if(spiHandle->Instance==SPI1)
184 .loc 1 99 0
185 000e 0368 ldr r3, [r0]
186 0010 304A ldr r2, .L19
187 0012 9342 cmp r3, r2
188 0014 04D0 beq .L17
100:Core/Src/spi.c **** {
101:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_MspInit 0 */
102:Core/Src/spi.c ****
ARM GAS /tmp/ccLqZfGE.s page 6
103:Core/Src/spi.c **** /* USER CODE END SPI1_MspInit 0 */
104:Core/Src/spi.c **** /* SPI1 clock enable */
105:Core/Src/spi.c **** __HAL_RCC_SPI1_CLK_ENABLE();
106:Core/Src/spi.c ****
107:Core/Src/spi.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
108:Core/Src/spi.c **** /**SPI1 GPIO Configuration
109:Core/Src/spi.c **** PB3 ------> SPI1_SCK
110:Core/Src/spi.c **** PB4 ------> SPI1_MISO
111:Core/Src/spi.c **** PB5 ------> SPI1_MOSI
112:Core/Src/spi.c **** */
113:Core/Src/spi.c **** GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_5;
114:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
115:Core/Src/spi.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
116:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
117:Core/Src/spi.c ****
118:Core/Src/spi.c **** GPIO_InitStruct.Pin = GPIO_PIN_4;
119:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
120:Core/Src/spi.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
121:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
122:Core/Src/spi.c ****
123:Core/Src/spi.c **** __HAL_AFIO_REMAP_SPI1_ENABLE();
124:Core/Src/spi.c ****
125:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_MspInit 1 */
126:Core/Src/spi.c ****
127:Core/Src/spi.c **** /* USER CODE END SPI1_MspInit 1 */
128:Core/Src/spi.c **** }
129:Core/Src/spi.c **** else if(spiHandle->Instance==SPI2)
189 .loc 1 129 0
190 0016 304A ldr r2, .L19+4
191 0018 9342 cmp r3, r2
192 001a 30D0 beq .L18
193 .LVL5:
194 .L13:
130:Core/Src/spi.c **** {
131:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_MspInit 0 */
132:Core/Src/spi.c ****
133:Core/Src/spi.c **** /* USER CODE END SPI2_MspInit 0 */
134:Core/Src/spi.c **** /* SPI2 clock enable */
135:Core/Src/spi.c **** __HAL_RCC_SPI2_CLK_ENABLE();
136:Core/Src/spi.c ****
137:Core/Src/spi.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
138:Core/Src/spi.c **** /**SPI2 GPIO Configuration
139:Core/Src/spi.c **** PB12 ------> SPI2_NSS
140:Core/Src/spi.c **** PB13 ------> SPI2_SCK
141:Core/Src/spi.c **** PB14 ------> SPI2_MISO
142:Core/Src/spi.c **** PB15 ------> SPI2_MOSI
143:Core/Src/spi.c **** */
144:Core/Src/spi.c **** GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_15;
145:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
146:Core/Src/spi.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
147:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
148:Core/Src/spi.c ****
149:Core/Src/spi.c **** GPIO_InitStruct.Pin = GPIO_PIN_14;
150:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
151:Core/Src/spi.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
152:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
153:Core/Src/spi.c ****
ARM GAS /tmp/ccLqZfGE.s page 7
154:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_MspInit 1 */
155:Core/Src/spi.c ****
156:Core/Src/spi.c **** /* USER CODE END SPI2_MspInit 1 */
157:Core/Src/spi.c **** }
158:Core/Src/spi.c **** }
195 .loc 1 158 0
196 001c 08B0 add sp, sp, #32
197 .LCFI4:
198 .cfi_remember_state
199 .cfi_def_cfa_offset 8
200 @ sp needed
201 001e 10BD pop {r4, pc}
202 .LVL6:
203 .L17:
204 .LCFI5:
205 .cfi_restore_state
206 .LBB2:
105:Core/Src/spi.c ****
207 .loc 1 105 0
208 0020 2E4B ldr r3, .L19+8
209 0022 9A69 ldr r2, [r3, #24]
210 0024 42F48052 orr r2, r2, #4096
211 0028 9A61 str r2, [r3, #24]
212 002a 9A69 ldr r2, [r3, #24]
213 002c 02F48052 and r2, r2, #4096
214 0030 0092 str r2, [sp]
215 0032 009A ldr r2, [sp]
216 .LBE2:
217 .LBB3:
107:Core/Src/spi.c **** /**SPI1 GPIO Configuration
218 .loc 1 107 0
219 0034 9A69 ldr r2, [r3, #24]
220 0036 42F00802 orr r2, r2, #8
221 003a 9A61 str r2, [r3, #24]
222 003c 9B69 ldr r3, [r3, #24]
223 003e 03F00803 and r3, r3, #8
224 0042 0193 str r3, [sp, #4]
225 0044 019B ldr r3, [sp, #4]
226 .LBE3:
113:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
227 .loc 1 113 0
228 0046 2823 movs r3, #40
229 0048 0493 str r3, [sp, #16]
114:Core/Src/spi.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
230 .loc 1 114 0
231 004a 0223 movs r3, #2
232 004c 0593 str r3, [sp, #20]
115:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
233 .loc 1 115 0
234 004e 0323 movs r3, #3
235 0050 0793 str r3, [sp, #28]
116:Core/Src/spi.c ****
236 .loc 1 116 0
237 0052 234C ldr r4, .L19+12
238 0054 04A9 add r1, sp, #16
239 0056 2046 mov r0, r4
240 .LVL7:
ARM GAS /tmp/ccLqZfGE.s page 8
241 0058 FFF7FEFF bl HAL_GPIO_Init
242 .LVL8:
118:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
243 .loc 1 118 0
244 005c 1023 movs r3, #16
245 005e 0493 str r3, [sp, #16]
119:Core/Src/spi.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
246 .loc 1 119 0
247 0060 0023 movs r3, #0
248 0062 0593 str r3, [sp, #20]
120:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
249 .loc 1 120 0
250 0064 0693 str r3, [sp, #24]
121:Core/Src/spi.c ****
251 .loc 1 121 0
252 0066 04A9 add r1, sp, #16
253 0068 2046 mov r0, r4
254 006a FFF7FEFF bl HAL_GPIO_Init
255 .LVL9:
256 .LBB4:
123:Core/Src/spi.c ****
257 .loc 1 123 0
258 006e 1D4A ldr r2, .L19+16
259 0070 5368 ldr r3, [r2, #4]
260 .LVL10:
261 0072 43F0E063 orr r3, r3, #117440512
262 .LVL11:
263 0076 43F00103 orr r3, r3, #1
264 .LVL12:
265 007a 5360 str r3, [r2, #4]
266 .LBE4:
267 007c CEE7 b .L13
268 .LVL13:
269 .L18:
270 .LBB5:
135:Core/Src/spi.c ****
271 .loc 1 135 0
272 007e 174B ldr r3, .L19+8
273 0080 DA69 ldr r2, [r3, #28]
274 0082 42F48042 orr r2, r2, #16384
275 0086 DA61 str r2, [r3, #28]
276 0088 DA69 ldr r2, [r3, #28]
277 008a 02F48042 and r2, r2, #16384
278 008e 0292 str r2, [sp, #8]
279 0090 029A ldr r2, [sp, #8]
280 .LBE5:
281 .LBB6:
137:Core/Src/spi.c **** /**SPI2 GPIO Configuration
282 .loc 1 137 0
283 0092 9A69 ldr r2, [r3, #24]
284 0094 42F00802 orr r2, r2, #8
285 0098 9A61 str r2, [r3, #24]
286 009a 9B69 ldr r3, [r3, #24]
287 009c 03F00803 and r3, r3, #8
288 00a0 0393 str r3, [sp, #12]
289 00a2 039B ldr r3, [sp, #12]
290 .LBE6:
ARM GAS /tmp/ccLqZfGE.s page 9
144:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
291 .loc 1 144 0
292 00a4 4FF43043 mov r3, #45056
293 00a8 0493 str r3, [sp, #16]
145:Core/Src/spi.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
294 .loc 1 145 0
295 00aa 0223 movs r3, #2
296 00ac 0593 str r3, [sp, #20]
146:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
297 .loc 1 146 0
298 00ae 0323 movs r3, #3
299 00b0 0793 str r3, [sp, #28]
147:Core/Src/spi.c ****
300 .loc 1 147 0
301 00b2 0B4C ldr r4, .L19+12
302 00b4 04A9 add r1, sp, #16
303 00b6 2046 mov r0, r4
304 .LVL14:
305 00b8 FFF7FEFF bl HAL_GPIO_Init
306 .LVL15:
149:Core/Src/spi.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
307 .loc 1 149 0
308 00bc 4FF48043 mov r3, #16384
309 00c0 0493 str r3, [sp, #16]
150:Core/Src/spi.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
310 .loc 1 150 0
311 00c2 0023 movs r3, #0
312 00c4 0593 str r3, [sp, #20]
151:Core/Src/spi.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
313 .loc 1 151 0
314 00c6 0693 str r3, [sp, #24]
152:Core/Src/spi.c ****
315 .loc 1 152 0
316 00c8 04A9 add r1, sp, #16
317 00ca 2046 mov r0, r4
318 00cc FFF7FEFF bl HAL_GPIO_Init
319 .LVL16:
320 .loc 1 158 0
321 00d0 A4E7 b .L13
322 .L20:
323 00d2 00BF .align 2
324 .L19:
325 00d4 00300140 .word 1073819648
326 00d8 00380040 .word 1073756160
327 00dc 00100240 .word 1073876992
328 00e0 000C0140 .word 1073810432
329 00e4 00000140 .word 1073807360
330 .cfi_endproc
331 .LFE67:
333 .section .text.HAL_SPI_MspDeInit,"ax",%progbits
334 .align 1
335 .global HAL_SPI_MspDeInit
336 .syntax unified
337 .thumb
338 .thumb_func
339 .fpu softvfp
341 HAL_SPI_MspDeInit:
ARM GAS /tmp/ccLqZfGE.s page 10
342 .LFB68:
159:Core/Src/spi.c ****
160:Core/Src/spi.c **** void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
161:Core/Src/spi.c **** {
343 .loc 1 161 0
344 .cfi_startproc
345 @ args = 0, pretend = 0, frame = 0
346 @ frame_needed = 0, uses_anonymous_args = 0
347 .LVL17:
348 0000 08B5 push {r3, lr}
349 .LCFI6:
350 .cfi_def_cfa_offset 8
351 .cfi_offset 3, -8
352 .cfi_offset 14, -4
162:Core/Src/spi.c ****
163:Core/Src/spi.c **** if(spiHandle->Instance==SPI1)
353 .loc 1 163 0
354 0002 0368 ldr r3, [r0]
355 0004 0E4A ldr r2, .L27
356 0006 9342 cmp r3, r2
357 0008 03D0 beq .L25
164:Core/Src/spi.c **** {
165:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_MspDeInit 0 */
166:Core/Src/spi.c ****
167:Core/Src/spi.c **** /* USER CODE END SPI1_MspDeInit 0 */
168:Core/Src/spi.c **** /* Peripheral clock disable */
169:Core/Src/spi.c **** __HAL_RCC_SPI1_CLK_DISABLE();
170:Core/Src/spi.c ****
171:Core/Src/spi.c **** /**SPI1 GPIO Configuration
172:Core/Src/spi.c **** PB3 ------> SPI1_SCK
173:Core/Src/spi.c **** PB4 ------> SPI1_MISO
174:Core/Src/spi.c **** PB5 ------> SPI1_MOSI
175:Core/Src/spi.c **** */
176:Core/Src/spi.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5);
177:Core/Src/spi.c ****
178:Core/Src/spi.c **** /* USER CODE BEGIN SPI1_MspDeInit 1 */
179:Core/Src/spi.c ****
180:Core/Src/spi.c **** /* USER CODE END SPI1_MspDeInit 1 */
181:Core/Src/spi.c **** }
182:Core/Src/spi.c **** else if(spiHandle->Instance==SPI2)
358 .loc 1 182 0
359 000a 0E4A ldr r2, .L27+4
360 000c 9342 cmp r3, r2
361 000e 0BD0 beq .L26
362 .LVL18:
363 .L21:
364 0010 08BD pop {r3, pc}
365 .LVL19:
366 .L25:
169:Core/Src/spi.c ****
367 .loc 1 169 0
368 0012 02F56042 add r2, r2, #57344
369 0016 9369 ldr r3, [r2, #24]
370 0018 23F48053 bic r3, r3, #4096
371 001c 9361 str r3, [r2, #24]
176:Core/Src/spi.c ****
372 .loc 1 176 0
ARM GAS /tmp/ccLqZfGE.s page 11
373 001e 3821 movs r1, #56
374 0020 0948 ldr r0, .L27+8
375 .LVL20:
376 0022 FFF7FEFF bl HAL_GPIO_DeInit
377 .LVL21:
378 0026 08BD pop {r3, pc}
379 .LVL22:
380 .L26:
183:Core/Src/spi.c **** {
184:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_MspDeInit 0 */
185:Core/Src/spi.c ****
186:Core/Src/spi.c **** /* USER CODE END SPI2_MspDeInit 0 */
187:Core/Src/spi.c **** /* Peripheral clock disable */
188:Core/Src/spi.c **** __HAL_RCC_SPI2_CLK_DISABLE();
381 .loc 1 188 0
382 0028 02F5EC32 add r2, r2, #120832
383 002c D369 ldr r3, [r2, #28]
384 002e 23F48043 bic r3, r3, #16384
385 0032 D361 str r3, [r2, #28]
189:Core/Src/spi.c ****
190:Core/Src/spi.c **** /**SPI2 GPIO Configuration
191:Core/Src/spi.c **** PB12 ------> SPI2_NSS
192:Core/Src/spi.c **** PB13 ------> SPI2_SCK
193:Core/Src/spi.c **** PB14 ------> SPI2_MISO
194:Core/Src/spi.c **** PB15 ------> SPI2_MOSI
195:Core/Src/spi.c **** */
196:Core/Src/spi.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15);
386 .loc 1 196 0
387 0034 4FF47041 mov r1, #61440
388 0038 0348 ldr r0, .L27+8
389 .LVL23:
390 003a FFF7FEFF bl HAL_GPIO_DeInit
391 .LVL24:
197:Core/Src/spi.c ****
198:Core/Src/spi.c **** /* USER CODE BEGIN SPI2_MspDeInit 1 */
199:Core/Src/spi.c ****
200:Core/Src/spi.c **** /* USER CODE END SPI2_MspDeInit 1 */
201:Core/Src/spi.c **** }
202:Core/Src/spi.c **** }
392 .loc 1 202 0
393 003e E7E7 b .L21
394 .L28:
395 .align 2
396 .L27:
397 0040 00300140 .word 1073819648
398 0044 00380040 .word 1073756160
399 0048 000C0140 .word 1073810432
400 .cfi_endproc
401 .LFE68:
403 .comm hspi2,88,4
404 .comm hspi1,88,4
405 .text
406 .Letext0:
407 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
408 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
409 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
410 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
ARM GAS /tmp/ccLqZfGE.s page 12
411 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
412 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
413 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
414 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
415 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h"
416 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
417 .file 12 "Core/Inc/spi.h"
418 .file 13 "Core/Inc/main.h"
ARM GAS /tmp/ccLqZfGE.s page 13
DEFINED SYMBOLS
*ABS*:0000000000000000 spi.c
/tmp/ccLqZfGE.s:16 .text.MX_SPI1_Init:0000000000000000 $t
/tmp/ccLqZfGE.s:23 .text.MX_SPI1_Init:0000000000000000 MX_SPI1_Init
/tmp/ccLqZfGE.s:81 .text.MX_SPI1_Init:000000000000003c $d
*COM*:0000000000000058 hspi1
/tmp/ccLqZfGE.s:87 .text.MX_SPI2_Init:0000000000000000 $t
/tmp/ccLqZfGE.s:94 .text.MX_SPI2_Init:0000000000000000 MX_SPI2_Init
/tmp/ccLqZfGE.s:150 .text.MX_SPI2_Init:0000000000000038 $d
*COM*:0000000000000058 hspi2
/tmp/ccLqZfGE.s:156 .text.HAL_SPI_MspInit:0000000000000000 $t
/tmp/ccLqZfGE.s:163 .text.HAL_SPI_MspInit:0000000000000000 HAL_SPI_MspInit
/tmp/ccLqZfGE.s:325 .text.HAL_SPI_MspInit:00000000000000d4 $d
/tmp/ccLqZfGE.s:334 .text.HAL_SPI_MspDeInit:0000000000000000 $t
/tmp/ccLqZfGE.s:341 .text.HAL_SPI_MspDeInit:0000000000000000 HAL_SPI_MspDeInit
/tmp/ccLqZfGE.s:397 .text.HAL_SPI_MspDeInit:0000000000000040 $d
.debug_frame:0000000000000010 $d
UNDEFINED SYMBOLS
HAL_SPI_Init
Error_Handler
HAL_GPIO_Init
HAL_GPIO_DeInit

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build/startup_stm32f103xe.o: startup_stm32f103xe.s

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build/stm32f1xx_hal.o: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_adc.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
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build/stm32f1xx_hal_adc_ex.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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build/stm32f1xx_hal_cortex.o: \
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Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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build/stm32f1xx_hal_dac.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
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Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
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Drivers/CMSIS/Include/cmsis_gcc.h:
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build/stm32f1xx_hal_dac_ex.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_dac_ex.lst
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@ -1,885 +0,0 @@
ARM GAS /tmp/ccEpsZWs.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32f1xx_hal_dac_ex.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_DACEx_TriangleWaveGenerate,"ax",%progbits
16 .align 1
17 .global HAL_DACEx_TriangleWaveGenerate
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 HAL_DACEx_TriangleWaveGenerate:
24 .LFB65:
25 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c"
1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ******************************************************************************
3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @file stm32f1xx_hal_dac_ex.c
4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @author MCD Application Team
5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DAC HAL module driver.
6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This file provides firmware functions to manage the extended
7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * functionalities of the DAC peripheral.
8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @verbatim
11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ##### How to use this driver #####
13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** [..]
15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *** Dual mode IO operation ***
16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================
17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) :
18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** Use HAL_DACEx_DualGetValue() to get digital data to be converted and use
19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in
20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** Channel 1 and Channel 2.
21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *** Signal generation operation ***
23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ===================================
24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @endverbatim
28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ******************************************************************************
29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @attention
30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * All rights reserved.</center></h2>
33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
ARM GAS /tmp/ccEpsZWs.s page 2
34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the "License"; You may not use this file except in compliance with the
36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * License. You may obtain a copy of the License at:
37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * opensource.org/licenses/BSD-3-Clause
38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ******************************************************************************
40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Includes ------------------------------------------------------------------*/
44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #include "stm32f1xx_hal.h"
45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @addtogroup STM32F1xx_HAL_Driver
47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #ifdef HAL_DAC_MODULE_ENABLED
51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #if defined(DAC)
53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @defgroup DACEx DACEx
55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DAC Extended HAL module driver
56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private typedef -----------------------------------------------------------*/
60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private define ------------------------------------------------------------*/
61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private macro -------------------------------------------------------------*/
62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private variables ---------------------------------------------------------*/
63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private function prototypes -----------------------------------------------*/
64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Exported functions --------------------------------------------------------*/
65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @defgroup DACEx_Exported_Functions DACEx Exported Functions
67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Extended IO operation functions
72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @verbatim
74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ##### Extended features functions #####
76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** [..] This section provides functions allowing to:
78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Start conversion.
79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Stop conversion.
80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Start conversion and enable DMA transfer.
81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Stop conversion and disable DMA transfer.
82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Get result of conversion.
83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Get result of dual mode conversion.
84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @endverbatim
86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Enable or disable the selected DAC channel wave generation.
ARM GAS /tmp/ccEpsZWs.s page 3
91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Channel The selected DAC channel.
94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This parameter can be one of the following values:
95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_CHANNEL_1: DAC Channel1 selected
96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_CHANNEL_2: DAC Channel2 selected
97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Amplitude Select max triangle amplitude.
98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This parameter can be one of the following values:
99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval HAL status
112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_
114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
26 .loc 1 114 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 @ link register save eliminated.
31 .LVL0:
115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Check the parameters */
116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_CHANNEL(Channel));
117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Process locked */
120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __HAL_LOCK(hdac);
32 .loc 1 120 0
33 0000 4379 ldrb r3, [r0, #5] @ zero_extendqisi2
34 0002 012B cmp r3, #1
35 0004 18D0 beq .L3
114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Check the parameters */
36 .loc 1 114 0 discriminator 2
37 0006 70B4 push {r4, r5, r6}
38 .LCFI0:
39 .cfi_def_cfa_offset 12
40 .cfi_offset 4, -12
41 .cfi_offset 5, -8
42 .cfi_offset 6, -4
43 .loc 1 120 0 discriminator 2
44 0008 0125 movs r5, #1
45 000a 4571 strb r5, [r0, #5]
121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Change DAC state */
123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_BUSY;
46 .loc 1 123 0 discriminator 2
47 000c 0223 movs r3, #2
48 000e 0371 strb r3, [r0, #4]
ARM GAS /tmp/ccEpsZWs.s page 4
124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Enable the triangle wave generation for the selected DAC channel */
126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_W
49 .loc 1 126 0 discriminator 2
50 0010 0668 ldr r6, [r0]
51 0012 3368 ldr r3, [r6]
52 0014 01F01001 and r1, r1, #16
53 .LVL1:
54 0018 4FF47C64 mov r4, #4032
55 001c 8C40 lsls r4, r4, r1
56 001e 23EA0403 bic r3, r3, r4
57 0022 42F08002 orr r2, r2, #128
58 .LVL2:
59 0026 8A40 lsls r2, r2, r1
60 0028 1A43 orrs r2, r2, r3
61 002a 3260 str r2, [r6]
127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Change DAC state */
129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_READY;
62 .loc 1 129 0 discriminator 2
63 002c 0571 strb r5, [r0, #4]
130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Process unlocked */
132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __HAL_UNLOCK(hdac);
64 .loc 1 132 0 discriminator 2
65 002e 0023 movs r3, #0
66 0030 4371 strb r3, [r0, #5]
133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Return function status */
135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** return HAL_OK;
67 .loc 1 135 0 discriminator 2
68 0032 1846 mov r0, r3
69 .LVL3:
136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
70 .loc 1 136 0 discriminator 2
71 0034 70BC pop {r4, r5, r6}
72 .LCFI1:
73 .cfi_restore 6
74 .cfi_restore 5
75 .cfi_restore 4
76 .cfi_def_cfa_offset 0
77 0036 7047 bx lr
78 .LVL4:
79 .L3:
120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
80 .loc 1 120 0
81 0038 0220 movs r0, #2
82 .LVL5:
83 003a 7047 bx lr
84 .cfi_endproc
85 .LFE65:
87 .section .text.HAL_DACEx_NoiseWaveGenerate,"ax",%progbits
88 .align 1
89 .global HAL_DACEx_NoiseWaveGenerate
90 .syntax unified
91 .thumb
92 .thumb_func
ARM GAS /tmp/ccEpsZWs.s page 5
93 .fpu softvfp
95 HAL_DACEx_NoiseWaveGenerate:
96 .LFB66:
137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Enable or disable the selected DAC channel wave generation.
140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Channel The selected DAC channel.
143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This parameter can be one of the following values:
144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_CHANNEL_1: DAC Channel1 selected
145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_CHANNEL_2: DAC Channel2 selected
146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Amplitude Unmask DAC channel LFSR for noise wave generation.
147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This parameter can be one of the following values:
148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generat
150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generat
151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generat
152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generat
153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generat
154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generat
155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generat
156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generat
157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generat
158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave gener
159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave gener
160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval HAL status
161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t A
163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
97 .loc 1 163 0
98 .cfi_startproc
99 @ args = 0, pretend = 0, frame = 0
100 @ frame_needed = 0, uses_anonymous_args = 0
101 @ link register save eliminated.
102 .LVL6:
164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Check the parameters */
165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_CHANNEL(Channel));
166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Process locked */
169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __HAL_LOCK(hdac);
103 .loc 1 169 0
104 0000 4379 ldrb r3, [r0, #5] @ zero_extendqisi2
105 0002 012B cmp r3, #1
106 0004 18D0 beq .L10
163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Check the parameters */
107 .loc 1 163 0 discriminator 2
108 0006 70B4 push {r4, r5, r6}
109 .LCFI2:
110 .cfi_def_cfa_offset 12
111 .cfi_offset 4, -12
112 .cfi_offset 5, -8
113 .cfi_offset 6, -4
114 .loc 1 169 0 discriminator 2
115 0008 0125 movs r5, #1
116 000a 4571 strb r5, [r0, #5]
ARM GAS /tmp/ccEpsZWs.s page 6
170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Change DAC state */
172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_BUSY;
117 .loc 1 172 0 discriminator 2
118 000c 0223 movs r3, #2
119 000e 0371 strb r3, [r0, #4]
173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Enable the noise wave generation for the selected DAC channel */
175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL), (DAC_CR_W
120 .loc 1 175 0 discriminator 2
121 0010 0668 ldr r6, [r0]
122 0012 3368 ldr r3, [r6]
123 0014 01F01001 and r1, r1, #16
124 .LVL7:
125 0018 4FF47C64 mov r4, #4032
126 001c 8C40 lsls r4, r4, r1
127 001e 23EA0403 bic r3, r3, r4
128 0022 42F04002 orr r2, r2, #64
129 .LVL8:
130 0026 8A40 lsls r2, r2, r1
131 0028 1A43 orrs r2, r2, r3
132 002a 3260 str r2, [r6]
176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Change DAC state */
178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_READY;
133 .loc 1 178 0 discriminator 2
134 002c 0571 strb r5, [r0, #4]
179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Process unlocked */
181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __HAL_UNLOCK(hdac);
135 .loc 1 181 0 discriminator 2
136 002e 0023 movs r3, #0
137 0030 4371 strb r3, [r0, #5]
182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Return function status */
184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** return HAL_OK;
138 .loc 1 184 0 discriminator 2
139 0032 1846 mov r0, r3
140 .LVL9:
185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
141 .loc 1 185 0 discriminator 2
142 0034 70BC pop {r4, r5, r6}
143 .LCFI3:
144 .cfi_restore 6
145 .cfi_restore 5
146 .cfi_restore 4
147 .cfi_def_cfa_offset 0
148 0036 7047 bx lr
149 .LVL10:
150 .L10:
169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
151 .loc 1 169 0
152 0038 0220 movs r0, #2
153 .LVL11:
154 003a 7047 bx lr
155 .cfi_endproc
156 .LFE66:
ARM GAS /tmp/ccEpsZWs.s page 7
158 .section .text.HAL_DACEx_DualSetValue,"ax",%progbits
159 .align 1
160 .global HAL_DACEx_DualSetValue
161 .syntax unified
162 .thumb
163 .thumb_func
164 .fpu softvfp
166 HAL_DACEx_DualSetValue:
167 .LFB67:
186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Set the specified data holding register value for dual DAC channel.
189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Alignment Specifies the data alignment for dual channel DAC.
192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * This parameter can be one of the following values:
193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * DAC_ALIGN_8B_R: 8bit right data alignment selected
194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * DAC_ALIGN_12B_L: 12bit left data alignment selected
195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * DAC_ALIGN_12B_R: 12bit right data alignment selected
196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Data1 Data for DAC Channel1 to be loaded in the selected data holding register.
197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param Data2 Data for DAC Channel2 to be loaded in the selected data holding register.
198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @note In dual mode, a unique register access is required to write in both
199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * DAC channels at the same time.
200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval HAL status
201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef *hdac, uint32_t Alignment, uint32_t Data
203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
168 .loc 1 203 0
169 .cfi_startproc
170 @ args = 0, pretend = 0, frame = 0
171 @ frame_needed = 0, uses_anonymous_args = 0
172 @ link register save eliminated.
173 .LVL12:
204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** uint32_t data;
205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** uint32_t tmp;
206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Check the parameters */
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_ALIGN(Alignment));
209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_DATA(Data1));
210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** assert_param(IS_DAC_DATA(Data2));
211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Calculate and set dual DAC data holding register value */
213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** if (Alignment == DAC_ALIGN_8B_R)
174 .loc 1 213 0
175 0000 0829 cmp r1, #8
176 0002 06D0 beq .L18
214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** data = ((uint32_t)Data2 << 8U) | Data1;
216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** else
218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** data = ((uint32_t)Data2 << 16U) | Data1;
177 .loc 1 219 0
178 0004 42EA0342 orr r2, r2, r3, lsl #16
179 .LVL13:
180 .L17:
220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
ARM GAS /tmp/ccEpsZWs.s page 8
221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** tmp = (uint32_t)hdac->Instance;
181 .loc 1 222 0
182 0008 0368 ldr r3, [r0]
183 .LVL14:
223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** tmp += DAC_DHR12RD_ALIGNMENT(Alignment);
184 .loc 1 223 0
185 000a 1944 add r1, r1, r3
186 .LVL15:
224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Set the dual DAC selected data holding register */
226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *(__IO uint32_t *)tmp = data;
187 .loc 1 226 0
188 000c 0A62 str r2, [r1, #32]
227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Return function status */
229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** return HAL_OK;
230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
189 .loc 1 230 0
190 000e 0020 movs r0, #0
191 .LVL16:
192 0010 7047 bx lr
193 .LVL17:
194 .L18:
215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
195 .loc 1 215 0
196 0012 42EA0322 orr r2, r2, r3, lsl #8
197 .LVL18:
198 0016 F7E7 b .L17
199 .cfi_endproc
200 .LFE67:
202 .section .text.HAL_DACEx_ConvCpltCallbackCh2,"ax",%progbits
203 .align 1
204 .weak HAL_DACEx_ConvCpltCallbackCh2
205 .syntax unified
206 .thumb
207 .thumb_func
208 .fpu softvfp
210 HAL_DACEx_ConvCpltCallbackCh2:
211 .LFB68:
231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Conversion complete callback in non-blocking mode for Channel2.
234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef *hdac)
239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
212 .loc 1 239 0
213 .cfi_startproc
214 @ args = 0, pretend = 0, frame = 0
215 @ frame_needed = 0, uses_anonymous_args = 0
216 @ link register save eliminated.
217 .LVL19:
218 0000 7047 bx lr
219 .cfi_endproc
ARM GAS /tmp/ccEpsZWs.s page 9
220 .LFE68:
222 .section .text.HAL_DACEx_ConvHalfCpltCallbackCh2,"ax",%progbits
223 .align 1
224 .weak HAL_DACEx_ConvHalfCpltCallbackCh2
225 .syntax unified
226 .thumb
227 .thumb_func
228 .fpu softvfp
230 HAL_DACEx_ConvHalfCpltCallbackCh2:
231 .LFB69:
240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Prevent unused argument(s) compilation warning */
241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** UNUSED(hdac);
242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file
245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Conversion half DMA transfer callback in non-blocking mode for Channel2.
250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef *hdac)
255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
232 .loc 1 255 0
233 .cfi_startproc
234 @ args = 0, pretend = 0, frame = 0
235 @ frame_needed = 0, uses_anonymous_args = 0
236 @ link register save eliminated.
237 .LVL20:
238 0000 7047 bx lr
239 .cfi_endproc
240 .LFE69:
242 .section .text.HAL_DACEx_ErrorCallbackCh2,"ax",%progbits
243 .align 1
244 .weak HAL_DACEx_ErrorCallbackCh2
245 .syntax unified
246 .thumb
247 .thumb_func
248 .fpu softvfp
250 HAL_DACEx_ErrorCallbackCh2:
251 .LFB70:
256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Prevent unused argument(s) compilation warning */
257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** UNUSED(hdac);
258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file
261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Error DAC callback for Channel2.
266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
ARM GAS /tmp/ccEpsZWs.s page 10
269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac)
271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
252 .loc 1 271 0
253 .cfi_startproc
254 @ args = 0, pretend = 0, frame = 0
255 @ frame_needed = 0, uses_anonymous_args = 0
256 @ link register save eliminated.
257 .LVL21:
258 0000 7047 bx lr
259 .cfi_endproc
260 .LFE70:
262 .section .text.HAL_DACEx_DMAUnderrunCallbackCh2,"ax",%progbits
263 .align 1
264 .weak HAL_DACEx_DMAUnderrunCallbackCh2
265 .syntax unified
266 .thumb
267 .thumb_func
268 .fpu softvfp
270 HAL_DACEx_DMAUnderrunCallbackCh2:
271 .LFB71:
272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Prevent unused argument(s) compilation warning */
273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** UNUSED(hdac);
274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file
277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DMA underrun DAC callback for Channel2.
282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** __weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac)
287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
272 .loc 1 287 0
273 .cfi_startproc
274 @ args = 0, pretend = 0, frame = 0
275 @ frame_needed = 0, uses_anonymous_args = 0
276 @ link register save eliminated.
277 .LVL22:
278 0000 7047 bx lr
279 .cfi_endproc
280 .LFE71:
282 .section .text.HAL_DACEx_DualGetValue,"ax",%progbits
283 .align 1
284 .global HAL_DACEx_DualGetValue
285 .syntax unified
286 .thumb
287 .thumb_func
288 .fpu softvfp
290 HAL_DACEx_DualGetValue:
291 .LFB72:
288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Prevent unused argument(s) compilation warning */
289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** UNUSED(hdac);
ARM GAS /tmp/ccEpsZWs.s page 11
290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file
293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @}
298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions
301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Extended Peripheral Control functions
302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** *
303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @verbatim
304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ##### Peripheral Control functions #####
306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** ==============================================================================
307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** [..] This section provides functions allowing to:
308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** (+) Set the specified data holding register value for DAC channel.
309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** @endverbatim
311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Return the last data output value of the selected DAC channel.
316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdac pointer to a DAC_HandleTypeDef structure that contains
317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DAC.
318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval The selected DAC channel data output value.
319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef *hdac)
321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
292 .loc 1 321 0
293 .cfi_startproc
294 @ args = 0, pretend = 0, frame = 0
295 @ frame_needed = 0, uses_anonymous_args = 0
296 @ link register save eliminated.
297 .LVL23:
322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** uint32_t tmp = 0U;
323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** tmp |= hdac->Instance->DOR1;
298 .loc 1 324 0
299 0000 0368 ldr r3, [r0]
300 0002 DA6A ldr r2, [r3, #44]
301 .LVL24:
325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** tmp |= hdac->Instance->DOR2 << 16U;
302 .loc 1 326 0
303 0004 186B ldr r0, [r3, #48]
304 .LVL25:
327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Returns the DAC channel data output register value */
329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** return tmp;
330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
305 .loc 1 330 0
306 0006 42EA0040 orr r0, r2, r0, lsl #16
307 .LVL26:
ARM GAS /tmp/ccEpsZWs.s page 12
308 000a 7047 bx lr
309 .cfi_endproc
310 .LFE72:
312 .section .text.DAC_DMAConvCpltCh2,"ax",%progbits
313 .align 1
314 .global DAC_DMAConvCpltCh2
315 .syntax unified
316 .thumb
317 .thumb_func
318 .fpu softvfp
320 DAC_DMAConvCpltCh2:
321 .LFB73:
331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @}
334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @}
338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Private functions ---------------------------------------------------------*/
341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /** @defgroup DACEx_Private_Functions DACEx private functions
342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief Extended private functions
343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @{
344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DMA conversion complete callback.
348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DMA module.
350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma)
353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
322 .loc 1 353 0
323 .cfi_startproc
324 @ args = 0, pretend = 0, frame = 0
325 @ frame_needed = 0, uses_anonymous_args = 0
326 .LVL27:
327 0000 10B5 push {r4, lr}
328 .LCFI4:
329 .cfi_def_cfa_offset 8
330 .cfi_offset 4, -8
331 .cfi_offset 14, -4
354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
332 .loc 1 354 0
333 0002 446A ldr r4, [r0, #36]
334 .LVL28:
355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->ConvCpltCallbackCh2(hdac);
358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #else
359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_DACEx_ConvCpltCallbackCh2(hdac);
335 .loc 1 359 0
336 0004 2046 mov r0, r4
337 .LVL29:
ARM GAS /tmp/ccEpsZWs.s page 13
338 0006 FFF7FEFF bl HAL_DACEx_ConvCpltCallbackCh2
339 .LVL30:
360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_READY;
340 .loc 1 362 0
341 000a 0123 movs r3, #1
342 000c 2371 strb r3, [r4, #4]
343 000e 10BD pop {r4, pc}
344 .cfi_endproc
345 .LFE73:
347 .section .text.DAC_DMAHalfConvCpltCh2,"ax",%progbits
348 .align 1
349 .global DAC_DMAHalfConvCpltCh2
350 .syntax unified
351 .thumb
352 .thumb_func
353 .fpu softvfp
355 DAC_DMAHalfConvCpltCh2:
356 .LFB74:
363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DMA half transfer complete callback.
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DMA module.
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma)
372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
357 .loc 1 372 0
358 .cfi_startproc
359 @ args = 0, pretend = 0, frame = 0
360 @ frame_needed = 0, uses_anonymous_args = 0
361 .LVL31:
362 0000 08B5 push {r3, lr}
363 .LCFI5:
364 .cfi_def_cfa_offset 8
365 .cfi_offset 3, -8
366 .cfi_offset 14, -4
367 .LVL32:
373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Conversion complete callback */
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->ConvHalfCpltCallbackCh2(hdac);
377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #else
378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_DACEx_ConvHalfCpltCallbackCh2(hdac);
368 .loc 1 378 0
369 0002 406A ldr r0, [r0, #36]
370 .LVL33:
371 0004 FFF7FEFF bl HAL_DACEx_ConvHalfCpltCallbackCh2
372 .LVL34:
373 0008 08BD pop {r3, pc}
374 .cfi_endproc
375 .LFE74:
377 .section .text.DAC_DMAErrorCh2,"ax",%progbits
378 .align 1
ARM GAS /tmp/ccEpsZWs.s page 14
379 .global DAC_DMAErrorCh2
380 .syntax unified
381 .thumb
382 .thumb_func
383 .fpu softvfp
385 DAC_DMAErrorCh2:
386 .LFB75:
379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** }
381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /**
383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @brief DMA error callback.
384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains
385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * the configuration information for the specified DMA module.
386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** * @retval None
387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** */
388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma)
389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** {
387 .loc 1 389 0
388 .cfi_startproc
389 @ args = 0, pretend = 0, frame = 0
390 @ frame_needed = 0, uses_anonymous_args = 0
391 .LVL35:
392 0000 10B5 push {r4, lr}
393 .LCFI6:
394 .cfi_def_cfa_offset 8
395 .cfi_offset 4, -8
396 .cfi_offset 14, -4
390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
397 .loc 1 390 0
398 0002 446A ldr r4, [r0, #36]
399 .LVL36:
391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** /* Set DAC error code to DMA error */
393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
400 .loc 1 393 0
401 0004 2369 ldr r3, [r4, #16]
402 0006 43F00403 orr r3, r3, #4
403 000a 2361 str r3, [r4, #16]
394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->ErrorCallbackCh2(hdac);
397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #else
398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** HAL_DACEx_ErrorCallbackCh2(hdac);
404 .loc 1 398 0
405 000c 2046 mov r0, r4
406 .LVL37:
407 000e FFF7FEFF bl HAL_DACEx_ErrorCallbackCh2
408 .LVL38:
399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c ****
401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dac_ex.c **** hdac->State = HAL_DAC_STATE_READY;
409 .loc 1 401 0
410 0012 0123 movs r3, #1
411 0014 2371 strb r3, [r4, #4]
412 0016 10BD pop {r4, pc}
413 .cfi_endproc
ARM GAS /tmp/ccEpsZWs.s page 15
414 .LFE75:
416 .text
417 .Letext0:
418 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
419 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
420 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
421 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
422 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
423 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
424 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h"
425 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h"
426 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS /tmp/ccEpsZWs.s page 16
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f1xx_hal_dac_ex.c
/tmp/ccEpsZWs.s:16 .text.HAL_DACEx_TriangleWaveGenerate:0000000000000000 $t
/tmp/ccEpsZWs.s:23 .text.HAL_DACEx_TriangleWaveGenerate:0000000000000000 HAL_DACEx_TriangleWaveGenerate
/tmp/ccEpsZWs.s:88 .text.HAL_DACEx_NoiseWaveGenerate:0000000000000000 $t
/tmp/ccEpsZWs.s:95 .text.HAL_DACEx_NoiseWaveGenerate:0000000000000000 HAL_DACEx_NoiseWaveGenerate
/tmp/ccEpsZWs.s:159 .text.HAL_DACEx_DualSetValue:0000000000000000 $t
/tmp/ccEpsZWs.s:166 .text.HAL_DACEx_DualSetValue:0000000000000000 HAL_DACEx_DualSetValue
/tmp/ccEpsZWs.s:203 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:210 .text.HAL_DACEx_ConvCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvCpltCallbackCh2
/tmp/ccEpsZWs.s:223 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:230 .text.HAL_DACEx_ConvHalfCpltCallbackCh2:0000000000000000 HAL_DACEx_ConvHalfCpltCallbackCh2
/tmp/ccEpsZWs.s:243 .text.HAL_DACEx_ErrorCallbackCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:250 .text.HAL_DACEx_ErrorCallbackCh2:0000000000000000 HAL_DACEx_ErrorCallbackCh2
/tmp/ccEpsZWs.s:263 .text.HAL_DACEx_DMAUnderrunCallbackCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:270 .text.HAL_DACEx_DMAUnderrunCallbackCh2:0000000000000000 HAL_DACEx_DMAUnderrunCallbackCh2
/tmp/ccEpsZWs.s:283 .text.HAL_DACEx_DualGetValue:0000000000000000 $t
/tmp/ccEpsZWs.s:290 .text.HAL_DACEx_DualGetValue:0000000000000000 HAL_DACEx_DualGetValue
/tmp/ccEpsZWs.s:313 .text.DAC_DMAConvCpltCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:320 .text.DAC_DMAConvCpltCh2:0000000000000000 DAC_DMAConvCpltCh2
/tmp/ccEpsZWs.s:348 .text.DAC_DMAHalfConvCpltCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:355 .text.DAC_DMAHalfConvCpltCh2:0000000000000000 DAC_DMAHalfConvCpltCh2
/tmp/ccEpsZWs.s:378 .text.DAC_DMAErrorCh2:0000000000000000 $t
/tmp/ccEpsZWs.s:385 .text.DAC_DMAErrorCh2:0000000000000000 DAC_DMAErrorCh2
.debug_frame:0000000000000010 $d
NO UNDEFINED SYMBOLS

BIN
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build/stm32f1xx_hal_dma.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
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build/stm32f1xx_hal_exti.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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build/stm32f1xx_hal_flash.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
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Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
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Drivers/CMSIS/Include/cmsis_gcc.h:
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build/stm32f1xx_hal_flash_ex.o: \
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Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
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Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
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build/stm32f1xx_hal_gpio.o: \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
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Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
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Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_gpio_ex.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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ARM GAS /tmp/ccPZWbN4.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32f1xx_hal_gpio_ex.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_GPIOEx_ConfigEventout,"ax",%progbits
16 .align 1
17 .global HAL_GPIOEx_ConfigEventout
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 HAL_GPIOEx_ConfigEventout:
24 .LFB65:
25 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c"
1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /**
2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ******************************************************************************
3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @file stm32f1xx_hal_gpio_ex.c
4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @author MCD Application Team
5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief GPIO Extension HAL module driver.
6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * functionalities of the General Purpose Input/Output (GPIO) extension peripheral.
8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * + Extended features functions
9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** *
10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** @verbatim
11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ==============================================================================
12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ##### GPIO Peripheral extension features #####
13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ==============================================================================
14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** [..] GPIO module on STM32F1 family, manage also the AFIO register:
15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (+) Possibility to use the EVENTOUT Cortex feature
16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ##### How to use this driver #####
18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ==============================================================================
19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** [..] This driver provides functions to use EVENTOUT Cortex feature
20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (#) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout()
21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (#) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout()
22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (#) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout()
23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** @endverbatim
25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ******************************************************************************
26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @attention
27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** *
28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * All rights reserved.</center></h2>
30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** *
31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * the "License"; You may not use this file except in compliance with the
33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * License. You may obtain a copy of the License at:
ARM GAS /tmp/ccPZWbN4.s page 2
34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * opensource.org/licenses/BSD-3-Clause
35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** *
36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ******************************************************************************
37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /* Includes ------------------------------------------------------------------*/
40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** #include "stm32f1xx_hal.h"
41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /** @addtogroup STM32F1xx_HAL_Driver
43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @{
44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /** @defgroup GPIOEx GPIOEx
47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief GPIO HAL module driver
48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @{
49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** #ifdef HAL_GPIO_MODULE_ENABLED
52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /** @defgroup GPIOEx_Exported_Functions GPIOEx Exported Functions
54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @{
55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /** @defgroup GPIOEx_Exported_Functions_Group1 Extended features functions
58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief Extended features functions
59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** *
60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** @verbatim
61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ==============================================================================
62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ##### Extended features functions #####
63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** ==============================================================================
64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** [..] This section provides functions allowing to:
65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (+) Configure EVENTOUT Cortex feature using the function HAL_GPIOEx_ConfigEventout()
66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (+) Activate EVENTOUT Cortex feature using the HAL_GPIOEx_EnableEventout()
67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** (+) Deactivate EVENTOUT Cortex feature using the HAL_GPIOEx_DisableEventout()
68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** @endverbatim
70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @{
71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /**
74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief Configures the port and pin on which the EVENTOUT Cortex signal will be connected.
75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @param GPIO_PortSource Select the port used to output the Cortex EVENTOUT signal.
76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * This parameter can be a value of @ref GPIOEx_EVENTOUT_PORT.
77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @param GPIO_PinSource Select the pin used to output the Cortex EVENTOUT signal.
78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * This parameter can be a value of @ref GPIOEx_EVENTOUT_PIN.
79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @retval None
80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource)
82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** {
26 .loc 1 82 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 0
29 @ frame_needed = 0, uses_anonymous_args = 0
30 @ link register save eliminated.
31 .LVL0:
83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /* Verify the parameters */
84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** assert_param(IS_AFIO_EVENTOUT_PORT(GPIO_PortSource));
ARM GAS /tmp/ccPZWbN4.s page 3
85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** assert_param(IS_AFIO_EVENTOUT_PIN(GPIO_PinSource));
86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /* Apply the new configuration */
88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** MODIFY_REG(AFIO->EVCR, (AFIO_EVCR_PORT) | (AFIO_EVCR_PIN), (GPIO_PortSource) | (GPIO_PinSource));
32 .loc 1 88 0
33 0000 034A ldr r2, .L2
34 0002 1368 ldr r3, [r2]
35 0004 23F07F03 bic r3, r3, #127
36 0008 0143 orrs r1, r1, r0
37 .LVL1:
38 000a 0B43 orrs r3, r3, r1
39 000c 1360 str r3, [r2]
40 000e 7047 bx lr
41 .L3:
42 .align 2
43 .L2:
44 0010 00000140 .word 1073807360
45 .cfi_endproc
46 .LFE65:
48 .section .text.HAL_GPIOEx_EnableEventout,"ax",%progbits
49 .align 1
50 .global HAL_GPIOEx_EnableEventout
51 .syntax unified
52 .thumb
53 .thumb_func
54 .fpu softvfp
56 HAL_GPIOEx_EnableEventout:
57 .LFB66:
89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** }
90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /**
92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief Enables the Event Output.
93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @retval None
94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** void HAL_GPIOEx_EnableEventout(void)
96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** {
58 .loc 1 96 0
59 .cfi_startproc
60 @ args = 0, pretend = 0, frame = 0
61 @ frame_needed = 0, uses_anonymous_args = 0
62 @ link register save eliminated.
97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** SET_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
63 .loc 1 97 0
64 0000 024A ldr r2, .L5
65 0002 1368 ldr r3, [r2]
66 0004 43F08003 orr r3, r3, #128
67 0008 1360 str r3, [r2]
68 000a 7047 bx lr
69 .L6:
70 .align 2
71 .L5:
72 000c 00000140 .word 1073807360
73 .cfi_endproc
74 .LFE66:
76 .section .text.HAL_GPIOEx_DisableEventout,"ax",%progbits
77 .align 1
78 .global HAL_GPIOEx_DisableEventout
ARM GAS /tmp/ccPZWbN4.s page 4
79 .syntax unified
80 .thumb
81 .thumb_func
82 .fpu softvfp
84 HAL_GPIOEx_DisableEventout:
85 .LFB67:
98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** }
99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c ****
100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** /**
101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @brief Disables the Event Output.
102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** * @retval None
103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** */
104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** void HAL_GPIOEx_DisableEventout(void)
105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** {
86 .loc 1 105 0
87 .cfi_startproc
88 @ args = 0, pretend = 0, frame = 0
89 @ frame_needed = 0, uses_anonymous_args = 0
90 @ link register save eliminated.
106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c **** CLEAR_BIT(AFIO->EVCR, AFIO_EVCR_EVOE);
91 .loc 1 106 0
92 0000 024A ldr r2, .L8
93 0002 1368 ldr r3, [r2]
94 0004 23F08003 bic r3, r3, #128
95 0008 1360 str r3, [r2]
96 000a 7047 bx lr
97 .L9:
98 .align 2
99 .L8:
100 000c 00000140 .word 1073807360
101 .cfi_endproc
102 .LFE67:
104 .text
105 .Letext0:
106 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
107 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
108 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
109 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
110 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
111 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS /tmp/ccPZWbN4.s page 5
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f1xx_hal_gpio_ex.c
/tmp/ccPZWbN4.s:16 .text.HAL_GPIOEx_ConfigEventout:0000000000000000 $t
/tmp/ccPZWbN4.s:23 .text.HAL_GPIOEx_ConfigEventout:0000000000000000 HAL_GPIOEx_ConfigEventout
/tmp/ccPZWbN4.s:44 .text.HAL_GPIOEx_ConfigEventout:0000000000000010 $d
/tmp/ccPZWbN4.s:49 .text.HAL_GPIOEx_EnableEventout:0000000000000000 $t
/tmp/ccPZWbN4.s:56 .text.HAL_GPIOEx_EnableEventout:0000000000000000 HAL_GPIOEx_EnableEventout
/tmp/ccPZWbN4.s:72 .text.HAL_GPIOEx_EnableEventout:000000000000000c $d
/tmp/ccPZWbN4.s:77 .text.HAL_GPIOEx_DisableEventout:0000000000000000 $t
/tmp/ccPZWbN4.s:84 .text.HAL_GPIOEx_DisableEventout:0000000000000000 HAL_GPIOEx_DisableEventout
/tmp/ccPZWbN4.s:100 .text.HAL_GPIOEx_DisableEventout:000000000000000c $d
.debug_frame:0000000000000010 $d
NO UNDEFINED SYMBOLS

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build/stm32f1xx_hal_i2c.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_msp.o: Core/Src/stm32f1xx_hal_msp.c Core/Inc/main.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Core/Inc/main.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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ARM GAS /tmp/ccvcMfVV.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32f1xx_hal_msp.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_MspInit,"ax",%progbits
16 .align 1
17 .global HAL_MspInit
18 .syntax unified
19 .thumb
20 .thumb_func
21 .fpu softvfp
23 HAL_MspInit:
24 .LFB65:
25 .file 1 "Core/Src/stm32f1xx_hal_msp.c"
1:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Header */
2:Core/Src/stm32f1xx_hal_msp.c **** /**
3:Core/Src/stm32f1xx_hal_msp.c **** ******************************************************************************
4:Core/Src/stm32f1xx_hal_msp.c **** * @file stm32f1xx_hal_msp.c
5:Core/Src/stm32f1xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization
6:Core/Src/stm32f1xx_hal_msp.c **** * and de-Initialization codes.
7:Core/Src/stm32f1xx_hal_msp.c **** ******************************************************************************
8:Core/Src/stm32f1xx_hal_msp.c **** * @attention
9:Core/Src/stm32f1xx_hal_msp.c **** *
10:Core/Src/stm32f1xx_hal_msp.c **** * <h2><center>&copy; Copyright (c) 2021 STMicroelectronics.
11:Core/Src/stm32f1xx_hal_msp.c **** * All rights reserved.</center></h2>
12:Core/Src/stm32f1xx_hal_msp.c **** *
13:Core/Src/stm32f1xx_hal_msp.c **** * This software component is licensed by ST under BSD 3-Clause license,
14:Core/Src/stm32f1xx_hal_msp.c **** * the "License"; You may not use this file except in compliance with the
15:Core/Src/stm32f1xx_hal_msp.c **** * License. You may obtain a copy of the License at:
16:Core/Src/stm32f1xx_hal_msp.c **** * opensource.org/licenses/BSD-3-Clause
17:Core/Src/stm32f1xx_hal_msp.c **** *
18:Core/Src/stm32f1xx_hal_msp.c **** ******************************************************************************
19:Core/Src/stm32f1xx_hal_msp.c **** */
20:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END Header */
21:Core/Src/stm32f1xx_hal_msp.c ****
22:Core/Src/stm32f1xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
23:Core/Src/stm32f1xx_hal_msp.c **** #include "main.h"
24:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Includes */
25:Core/Src/stm32f1xx_hal_msp.c ****
26:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END Includes */
27:Core/Src/stm32f1xx_hal_msp.c ****
28:Core/Src/stm32f1xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
29:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN TD */
30:Core/Src/stm32f1xx_hal_msp.c ****
31:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END TD */
32:Core/Src/stm32f1xx_hal_msp.c ****
33:Core/Src/stm32f1xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
ARM GAS /tmp/ccvcMfVV.s page 2
34:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Define */
35:Core/Src/stm32f1xx_hal_msp.c ****
36:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END Define */
37:Core/Src/stm32f1xx_hal_msp.c ****
38:Core/Src/stm32f1xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
39:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN Macro */
40:Core/Src/stm32f1xx_hal_msp.c ****
41:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END Macro */
42:Core/Src/stm32f1xx_hal_msp.c ****
43:Core/Src/stm32f1xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
44:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN PV */
45:Core/Src/stm32f1xx_hal_msp.c ****
46:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END PV */
47:Core/Src/stm32f1xx_hal_msp.c ****
48:Core/Src/stm32f1xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
49:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN PFP */
50:Core/Src/stm32f1xx_hal_msp.c ****
51:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END PFP */
52:Core/Src/stm32f1xx_hal_msp.c ****
53:Core/Src/stm32f1xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
54:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
55:Core/Src/stm32f1xx_hal_msp.c ****
56:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
57:Core/Src/stm32f1xx_hal_msp.c ****
58:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN 0 */
59:Core/Src/stm32f1xx_hal_msp.c ****
60:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END 0 */
61:Core/Src/stm32f1xx_hal_msp.c **** /**
62:Core/Src/stm32f1xx_hal_msp.c **** * Initializes the Global MSP.
63:Core/Src/stm32f1xx_hal_msp.c **** */
64:Core/Src/stm32f1xx_hal_msp.c **** void HAL_MspInit(void)
65:Core/Src/stm32f1xx_hal_msp.c **** {
26 .loc 1 65 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 8
29 @ frame_needed = 0, uses_anonymous_args = 0
30 @ link register save eliminated.
31 0000 82B0 sub sp, sp, #8
32 .LCFI0:
33 .cfi_def_cfa_offset 8
34 .LBB2:
66:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */
67:Core/Src/stm32f1xx_hal_msp.c ****
68:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END MspInit 0 */
69:Core/Src/stm32f1xx_hal_msp.c ****
70:Core/Src/stm32f1xx_hal_msp.c **** __HAL_RCC_AFIO_CLK_ENABLE();
35 .loc 1 70 0
36 0002 0E4B ldr r3, .L3
37 0004 9A69 ldr r2, [r3, #24]
38 0006 42F00102 orr r2, r2, #1
39 000a 9A61 str r2, [r3, #24]
40 000c 9A69 ldr r2, [r3, #24]
41 000e 02F00102 and r2, r2, #1
42 0012 0092 str r2, [sp]
43 0014 009A ldr r2, [sp]
44 .LBE2:
45 .LBB3:
ARM GAS /tmp/ccvcMfVV.s page 3
71:Core/Src/stm32f1xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE();
46 .loc 1 71 0
47 0016 DA69 ldr r2, [r3, #28]
48 0018 42F08052 orr r2, r2, #268435456
49 001c DA61 str r2, [r3, #28]
50 001e DB69 ldr r3, [r3, #28]
51 0020 03F08053 and r3, r3, #268435456
52 0024 0193 str r3, [sp, #4]
53 0026 019B ldr r3, [sp, #4]
54 .LBE3:
55 .LBB4:
72:Core/Src/stm32f1xx_hal_msp.c ****
73:Core/Src/stm32f1xx_hal_msp.c **** /* System interrupt init*/
74:Core/Src/stm32f1xx_hal_msp.c ****
75:Core/Src/stm32f1xx_hal_msp.c **** /** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
76:Core/Src/stm32f1xx_hal_msp.c **** */
77:Core/Src/stm32f1xx_hal_msp.c **** __HAL_AFIO_REMAP_SWJ_NOJTAG();
56 .loc 1 77 0
57 0028 054A ldr r2, .L3+4
58 002a 5368 ldr r3, [r2, #4]
59 .LVL0:
60 002c 23F0E063 bic r3, r3, #117440512
61 .LVL1:
62 0030 43F00073 orr r3, r3, #33554432
63 .LVL2:
64 0034 5360 str r3, [r2, #4]
65 .LBE4:
78:Core/Src/stm32f1xx_hal_msp.c ****
79:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */
80:Core/Src/stm32f1xx_hal_msp.c ****
81:Core/Src/stm32f1xx_hal_msp.c **** /* USER CODE END MspInit 1 */
82:Core/Src/stm32f1xx_hal_msp.c **** }
66 .loc 1 82 0
67 0036 02B0 add sp, sp, #8
68 .LCFI1:
69 .cfi_def_cfa_offset 0
70 @ sp needed
71 0038 7047 bx lr
72 .L4:
73 003a 00BF .align 2
74 .L3:
75 003c 00100240 .word 1073876992
76 0040 00000140 .word 1073807360
77 .cfi_endproc
78 .LFE65:
80 .text
81 .Letext0:
82 .file 2 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/machine/_defau
83 .file 3 "/home/geekzjk/opt/gcc-arm-none-eabi-6-2017-q2-update/arm-none-eabi/include/sys/_stdint.h"
84 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
85 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
86 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h"
87 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS /tmp/ccvcMfVV.s page 4
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f1xx_hal_msp.c
/tmp/ccvcMfVV.s:16 .text.HAL_MspInit:0000000000000000 $t
/tmp/ccvcMfVV.s:23 .text.HAL_MspInit:0000000000000000 HAL_MspInit
/tmp/ccvcMfVV.s:75 .text.HAL_MspInit:000000000000003c $d
.debug_frame:0000000000000010 $d
NO UNDEFINED SYMBOLS

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build/stm32f1xx_hal_pwr.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_rcc.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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build/stm32f1xx_hal_rcc_ex.o: \
Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h \
Core/Inc/stm32f1xx_hal_conf.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h \
Drivers/CMSIS/Include/core_cm3.h Drivers/CMSIS/Include/cmsis_version.h \
Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h \
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h \
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h:
Core/Inc/stm32f1xx_hal_conf.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xe.h:
Drivers/CMSIS/Include/core_cm3.h:
Drivers/CMSIS/Include/cmsis_version.h:
Drivers/CMSIS/Include/cmsis_compiler.h:
Drivers/CMSIS/Include/cmsis_gcc.h:
Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h:
Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_exti.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_adc_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dac_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_i2c.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_spi.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h:
Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_uart.h:

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