forked from M-Labs/artiq-zynq
fix RTIO reset
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904ee3e730
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@ -53,5 +53,9 @@ pub fn main_core0() {
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info!("Detected gateware: {}", identifier_read(&mut [0; 64]));
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unsafe {
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pl::csr::rtio_core::reset_phy_write(1);
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}
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comms::main(timer);
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}
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@ -19,12 +19,8 @@ pub struct TimestampedData {
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}
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pub extern fn init() {
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// TODO
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unsafe {
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csr::rtio_core::reset_write(1);
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csr::rtio_core::reset_phy_write(1);
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csr::rtio_core::reset_write(0);
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csr::rtio_core::reset_phy_write(0);
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}
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}
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