Remove cortex-m dependencies for delay #2
|
@ -0,0 +1,33 @@
|
||||||
|
use embedded_hal::blocking::delay::{DelayMs, DelayUs};
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||||||
|
|
||||||
|
pub struct AsmDelay {
|
||||||
|
frequency_us: u32,
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||||||
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frequency_ms: u32,
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||||||
|
}
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||||||
|
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||||||
|
impl AsmDelay {
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||||||
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pub fn new(freq: u32) -> AsmDelay {
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||||||
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|||||||
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AsmDelay {
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||||||
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frequency_us: (freq / 1_000_000),
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||||||
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frequency_ms: (freq / 1_000),
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||||||
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}
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||||||
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}
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||||||
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}
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||||||
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||||||
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impl<U> DelayUs<U> for AsmDelay
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||||||
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where
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||||||
|
U: Into<u32>,
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||||||
|
{
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||||||
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fn delay_us(&mut self, us: U) {
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||||||
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cortex_m::asm::delay(self.frequency_us * us.into())
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}
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||||||
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}
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||||||
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||||||
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impl<U> DelayMs<U> for AsmDelay
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||||||
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where
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|
U: Into<u32>,
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||||||
|
{
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||||||
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fn delay_ms(&mut self, ms: U) {
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cortex_m::asm::delay(self.frequency_ms * ms.into())
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}
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}
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@ -28,6 +28,9 @@ use smoltcp::socket::{SocketSet, TcpSocket, TcpSocketBuffer};
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use core::str;
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use core::str;
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use core::fmt::Write;
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use core::fmt::Write;
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|
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||||||
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mod delay;
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||||||
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use delay::AsmDelay;
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||||||
|
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||||||
/// Timer
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/// Timer
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use core::cell::RefCell;
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use core::cell::RefCell;
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||||||
use cortex_m::interrupt::Mutex;
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use cortex_m::interrupt::Mutex;
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||||||
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@ -80,7 +83,9 @@ use stm32f4xx_hal::{
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||||||
};
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};
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||||||
type BoosterSpiEth = enc424j600::SpiEth<
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type BoosterSpiEth = enc424j600::SpiEth<
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Spi<SPI1, (PA5<Alternate<AF5>>, PA6<Alternate<AF5>>, PA7<Alternate<AF5>>)>,
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Spi<SPI1, (PA5<Alternate<AF5>>, PA6<Alternate<AF5>>, PA7<Alternate<AF5>>)>,
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||||||
PA4<Output<PushPull>>>;
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PA4<Output<PushPull>>,
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AsmDelay
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||||||
|
>;
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||||||
|
|
||||||
pub struct NetStorage {
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pub struct NetStorage {
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ip_addrs: [IpCidr; 1],
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ip_addrs: [IpCidr; 1],
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@ -122,7 +127,8 @@ const APP: () = {
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.pclk1(42.mhz())
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.pclk1(42.mhz())
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.require_pll48clk()
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.require_pll48clk()
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||||||
.freeze();
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.freeze();
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let mut delay = Delay::new(c.core.SYST, clocks);
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let asm_delay = AsmDelay::new(clocks.sysclk().0);
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let mut hal_delay = Delay::new(c.core.SYST, clocks);
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|
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||||||
// Init ITM
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// Init ITM
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let mut itm = c.core.ITM;
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let mut itm = c.core.ITM;
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||||||
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@ -142,7 +148,7 @@ const APP: () = {
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// Map SPISEL: see Table 1, NIC100 Manual
|
// Map SPISEL: see Table 1, NIC100 Manual
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let mut spisel = gpioa.pa1.into_push_pull_output();
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let mut spisel = gpioa.pa1.into_push_pull_output();
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spisel.set_high().unwrap();
|
spisel.set_high().unwrap();
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||||||
delay.delay_ms(1_u32);
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hal_delay.delay_ms(1_u32);
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spisel.set_low().unwrap();
|
spisel.set_low().unwrap();
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||||||
|
|
||||||
// Create SPI1 for HAL
|
// Create SPI1 for HAL
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|
@ -153,11 +159,11 @@ const APP: () = {
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enc424j600::spi::interfaces::SPI_MODE,
|
enc424j600::spi::interfaces::SPI_MODE,
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Hertz(enc424j600::spi::interfaces::SPI_CLOCK_FREQ),
|
Hertz(enc424j600::spi::interfaces::SPI_CLOCK_FREQ),
|
||||||
clocks);
|
clocks);
|
||||||
enc424j600::SpiEth::new(spi_eth_port, spi1_nss)
|
enc424j600::SpiEth::new(spi_eth_port, spi1_nss, asm_delay)
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};
|
};
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|
|
||||||
// Init controller
|
// Init controller
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||||||
sb10q
commented
fp? fp?
occheung
commented
I meant function pointer. I meant function pointer.
Changed to `delay_ns`.
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|||||||
match spi_eth.init_dev(&mut delay) {
|
match spi_eth.init_dev() {
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Ok(_) => {
|
Ok(_) => {
|
||||||
iprintln!(stim0, "Initializing Ethernet...")
|
iprintln!(stim0, "Initializing Ethernet...")
|
||||||
}
|
}
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||||||
|
@ -168,7 +174,7 @@ const APP: () = {
|
||||||
|
|
||||||
// Read MAC
|
// Read MAC
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||||||
let mut eth_mac_addr: [u8; 6] = [0; 6];
|
let mut eth_mac_addr: [u8; 6] = [0; 6];
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spi_eth.read_from_mac(&mut eth_mac_addr);
|
spi_eth.read_from_mac(&mut eth_mac_addr).unwrap();
|
||||||
for i in 0..6 {
|
for i in 0..6 {
|
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let byte = eth_mac_addr[i];
|
let byte = eth_mac_addr[i];
|
||||||
match i {
|
match i {
|
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|
@ -180,8 +186,8 @@ const APP: () = {
|
||||||
}
|
}
|
||||||
|
|
||||||
// Init Rx/Tx buffers
|
// Init Rx/Tx buffers
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||||||
spi_eth.init_rxbuf();
|
spi_eth.init_rxbuf().unwrap();
|
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spi_eth.init_txbuf();
|
spi_eth.init_txbuf().unwrap();
|
||||||
iprintln!(stim0, "Ethernet controller initialized");
|
iprintln!(stim0, "Ethernet controller initialized");
|
||||||
|
|
||||||
// Init smoltcp interface
|
// Init smoltcp interface
|
||||||
|
@ -205,7 +211,7 @@ const APP: () = {
|
||||||
|
|
||||||
// Setup SysTick after releasing SYST from Delay
|
// Setup SysTick after releasing SYST from Delay
|
||||||
// Reference to stm32-eth:examples/ip.rs
|
// Reference to stm32-eth:examples/ip.rs
|
||||||
timer_setup(delay.free(), clocks);
|
timer_setup(hal_delay.free(), clocks);
|
||||||
iprintln!(stim0, "Timer initialized");
|
iprintln!(stim0, "Timer initialized");
|
||||||
|
|
||||||
init::LateResources {
|
init::LateResources {
|
||||||
|
|
|
@ -20,6 +20,9 @@ use stm32f4xx_hal::{
|
||||||
use enc424j600;
|
use enc424j600;
|
||||||
use enc424j600::EthController;
|
use enc424j600::EthController;
|
||||||
|
|
||||||
|
mod delay;
|
||||||
|
use delay::AsmDelay;
|
||||||
|
|
||||||
///
|
///
|
||||||
use stm32f4xx_hal::{
|
use stm32f4xx_hal::{
|
||||||
stm32::SPI1,
|
stm32::SPI1,
|
||||||
|
@ -30,7 +33,8 @@ use stm32f4xx_hal::{
|
||||||
};
|
};
|
||||||
type BoosterSpiEth = enc424j600::SpiEth<
|
type BoosterSpiEth = enc424j600::SpiEth<
|
||||||
Spi<SPI1, (PA5<Alternate<AF5>>, PA6<Alternate<AF5>>, PA7<Alternate<AF5>>)>,
|
Spi<SPI1, (PA5<Alternate<AF5>>, PA6<Alternate<AF5>>, PA7<Alternate<AF5>>)>,
|
||||||
PA4<Output<PushPull>>>;
|
PA4<Output<PushPull>>,
|
||||||
|
AsmDelay>;
|
||||||
|
|
||||||
#[rtic::app(device = stm32f4xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
|
#[rtic::app(device = stm32f4xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
|
||||||
const APP: () = {
|
const APP: () = {
|
||||||
|
@ -54,6 +58,7 @@ const APP: () = {
|
||||||
//.pclk2(64.mhz())
|
//.pclk2(64.mhz())
|
||||||
.require_pll48clk()
|
.require_pll48clk()
|
||||||
.freeze();
|
.freeze();
|
||||||
|
let asm_delay = AsmDelay::new(clocks.sysclk().0);
|
||||||
let mut delay = Delay::new(c.core.SYST, clocks);
|
let mut delay = Delay::new(c.core.SYST, clocks);
|
||||||
|
|
||||||
// Init ITM
|
// Init ITM
|
||||||
|
@ -82,11 +87,11 @@ const APP: () = {
|
||||||
enc424j600::spi::interfaces::SPI_MODE,
|
enc424j600::spi::interfaces::SPI_MODE,
|
||||||
Hertz(enc424j600::spi::interfaces::SPI_CLOCK_FREQ),
|
Hertz(enc424j600::spi::interfaces::SPI_CLOCK_FREQ),
|
||||||
clocks);
|
clocks);
|
||||||
enc424j600::SpiEth::new(spi_eth_port, spi1_nss)
|
enc424j600::SpiEth::new(spi_eth_port, spi1_nss, asm_delay)
|
||||||
};
|
};
|
||||||
|
|
||||||
// Init
|
// Init
|
||||||
match spi_eth.init_dev(&mut delay) {
|
match spi_eth.init_dev() {
|
||||||
Ok(_) => {
|
Ok(_) => {
|
||||||
iprintln!(stim0, "Initializing Ethernet...")
|
iprintln!(stim0, "Initializing Ethernet...")
|
||||||
}
|
}
|
||||||
|
@ -97,7 +102,7 @@ const APP: () = {
|
||||||
|
|
||||||
// Read MAC
|
// Read MAC
|
||||||
let mut eth_mac_addr: [u8; 6] = [0; 6];
|
let mut eth_mac_addr: [u8; 6] = [0; 6];
|
||||||
spi_eth.read_from_mac(&mut eth_mac_addr);
|
spi_eth.read_from_mac(&mut eth_mac_addr).unwrap();
|
||||||
for i in 0..6 {
|
for i in 0..6 {
|
||||||
let byte = eth_mac_addr[i];
|
let byte = eth_mac_addr[i];
|
||||||
match i {
|
match i {
|
||||||
|
@ -109,8 +114,8 @@ const APP: () = {
|
||||||
}
|
}
|
||||||
|
|
||||||
// Init Rx/Tx buffers
|
// Init Rx/Tx buffers
|
||||||
spi_eth.init_rxbuf();
|
spi_eth.init_rxbuf().unwrap();
|
||||||
spi_eth.init_txbuf();
|
spi_eth.init_txbuf().unwrap();
|
||||||
iprintln!(stim0, "Ethernet controller initialized");
|
iprintln!(stim0, "Ethernet controller initialized");
|
||||||
|
|
||||||
init::LateResources {
|
init::LateResources {
|
||||||
|
@ -130,7 +135,7 @@ const APP: () = {
|
||||||
0x08, 0x00, 0x06, 0x04, 0x00, 0x01, 0x08, 0x60,
|
0x08, 0x00, 0x06, 0x04, 0x00, 0x01, 0x08, 0x60,
|
||||||
0x6e, 0x44, 0x42, 0x95, 0xc0, 0xa8, 0x01, 0x64,
|
0x6e, 0x44, 0x42, 0x95, 0xc0, 0xa8, 0x01, 0x64,
|
||||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xa8,
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xa8,
|
||||||
0x01, 0xe7, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
0x01, 0x7d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||||
0x00, 0x00, 0x00, 0x00, 0x69, 0xd0, 0x85, 0x9f
|
0x00, 0x00, 0x00, 0x00, 0x69, 0xd0, 0x85, 0x9f
|
||||||
];
|
];
|
||||||
|
@ -152,7 +157,7 @@ const APP: () = {
|
||||||
_ => ()
|
_ => ()
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
c.resources.spi_eth.send_raw_packet(ð_tx_packet);
|
c.resources.spi_eth.send_raw_packet(ð_tx_packet).unwrap();
|
||||||
iprintln!(stim0, "Packet sent");
|
iprintln!(stim0, "Packet sent");
|
||||||
c.resources.delay.delay_ms(100_u32);
|
c.resources.delay.delay_ms(100_u32);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue
Do we really need to reinvent this? I would have thought there's already a stm32 crate that implements these embedded-hal delays.
Perhaps we can try this? https://crates.io/crates/asm-delay