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Fix SPI: shorten timing & simplify API #11

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sb10q merged 1 commits from fix-spi into master 2024-08-17 17:37:23 +08:00
Conversation 0 Commits 1 Files Changed 1 +1 -7
1 changed files with 1 additions and 7 deletions
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8
src/spi.rs
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@ -199,13 +199,7 @@ impl <SPI: Transfer<u8>,
self.nss.set_low();
// >=50ns min. CS_n setup time
#[cfg(feature = "cortex-m-cpu")]
match opcode {
opcodes::RCRU | opcodes::WCRU |
opcodes::RRXDATA | opcodes::WGPDATA => {
cortex_m::asm::delay((0.05*(self.cpu_freq_mhz+1.)) as u32);
}
_ => { }
}
cortex_m::asm::delay((0.05*(self.cpu_freq_mhz+1.)) as u32);
// Start writing to SLAVE
buf[0] = opcode;
let result = self.spi.transfer(&mut buf[..data_length+1]);