spi: Simplify all reg reads/writes as rw_n()
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27ba42c4fb
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114
src/spi.rs
114
src/spi.rs
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@ -91,30 +91,35 @@ impl <SPI: Transfer<u8>,
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pub fn read_reg_8b(&mut self, addr: u8) -> Result<u8, Error> {
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// Using RCRU instruction to read using unbanked (full) address
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let r_data = self.rw_addr_u8(opcodes::RCRU, addr, 0)?;
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Ok(r_data)
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let mut buf: [u8; 4] = [0; 4];
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buf[1] = addr;
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self.rw_n(&mut buf, opcodes::RCRU, 2)?;
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Ok(buf[2])
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}
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pub fn read_reg_16b(&mut self, lo_addr: u8) -> Result<u16, Error> {
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// Unless the register can be written with specific opcode,
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// use WCRU instruction to write using unbanked (full) address
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let mut buf: [u8; 4] = [0; 4];
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let mut data_offset = 0; // number of bytes separating
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// actual data from opcode
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match lo_addr {
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addrs::ERXRDPT | addrs::EGPWRPT => {
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let mut buf: [u8; 3] = [0; 3];
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self.rw_n(
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&mut buf, match lo_addr {
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addrs::ERXRDPT => opcodes::RRXRDPT,
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addrs::EGPWRPT => opcodes::RGPWRPT,
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_ => unreachable!()
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}, 2
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)?;
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Ok((buf[2] as u16) << 8 | buf[1] as u16)
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}
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addrs::ERXRDPT | addrs::EGPWRPT => { }
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_ => {
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let r_data_lo = self.read_reg_8b(lo_addr)?;
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let r_data_hi = self.read_reg_8b(lo_addr + 1)?;
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// Combine top and bottom 8-bit to return 16-bit
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Ok(((r_data_hi as u16) << 8) | r_data_lo as u16)
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buf[1] = lo_addr;
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data_offset = 1;
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}
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}
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self.rw_n(
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&mut buf,
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match lo_addr {
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addrs::ERXRDPT => opcodes::RRXRDPT,
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addrs::EGPWRPT => opcodes::RGPWRPT,
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_ => opcodes::RCRU
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},
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2 + data_offset // extra 8-bit lo_addr before data
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)?;
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Ok(buf[data_offset+1] as u16 | (buf[data_offset+2] as u16) << 8)
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}
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// Currently requires manual slicing (buf[1..]) for the data read back
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@ -131,32 +136,37 @@ impl <SPI: Transfer<u8>,
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}
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pub fn write_reg_8b(&mut self, addr: u8, data: u8) -> Result<(), Error> {
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// TODO: addr should be separated from w_data
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// Using WCRU instruction to write using unbanked (full) address
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self.rw_addr_u8(opcodes::WCRU, addr, data)?;
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Ok(())
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let mut buf: [u8; 3] = [0; 3];
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buf[1] = addr;
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buf[2] = data;
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self.rw_n(&mut buf, opcodes::WCRU, 2)
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}
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pub fn write_reg_16b(&mut self, lo_addr: u8, data: u16) -> Result<(), Error> {
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// Unless the register can be written with specific opcode,
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// use WCRU instruction to write using unbanked (full) address
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let mut buf: [u8; 4] = [0; 4];
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let mut data_offset = 0; // number of bytes separating
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// actual data from opcode
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match lo_addr {
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addrs::ERXRDPT | addrs::EGPWRPT => {
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let mut buf: [u8; 3] = [0; 3];
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buf[1] = data as u8 & 8;
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buf[2] = (data >> 8) as u8 & 8;
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self.rw_n(
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&mut buf, match lo_addr {
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addrs::ERXRDPT => opcodes::WRXRDPT,
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addrs::EGPWRPT => opcodes::WGPWRPT,
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_ => unreachable!()
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}, 2
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)
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}
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addrs::ERXRDPT | addrs::EGPWRPT => { }
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_ => {
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self.write_reg_8b(lo_addr, (data & 0xff) as u8)?;
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self.write_reg_8b(lo_addr + 1, ((data & 0xff00) >> 8) as u8)?;
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Ok(())
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buf[1] = lo_addr;
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data_offset = 1;
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}
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}
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buf[1+data_offset] = data as u8;
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buf[2+data_offset] = (data >> 8) as u8;
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self.rw_n(
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&mut buf,
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match lo_addr {
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addrs::ERXRDPT => opcodes::WRXRDPT,
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addrs::EGPWRPT => opcodes::WGPWRPT,
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_ => opcodes::WCRU
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},
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2 + data_offset // extra 8-bit lo_addr before data
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)
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}
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pub fn send_opcode(&mut self, opcode: u8) -> Result<(), Error> {
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@ -174,40 +184,6 @@ impl <SPI: Transfer<u8>,
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(self.delay_ns)(duration * 1000)
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}
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// TODO: Generalise transfer functions
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// Completes an SPI transfer for reading or writing 8-bit data,
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// and returns the data read/written.
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// It starts with an 8-bit instruction, followed by an 8-bit address.
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fn rw_addr_u8(&mut self, opcode: u8, addr: u8, data: u8)
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-> Result<u8, Error> {
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// Enable chip select
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self.nss.set_low();
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// Start writing to SLAVE
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// TODO: don't just use 3 bytes
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let mut buf: [u8; 3] = [0; 3];
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buf[0] = opcode;
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buf[1] = addr;
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buf[2] = data;
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match self.spi.transfer(&mut buf) {
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Ok(_) => {
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// Disable chip select
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(self.delay_ns)(60);
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self.nss.set_high();
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(self.delay_ns)(30);
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Ok(buf[2])
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},
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// TODO: Maybe too naive?
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Err(_) => {
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// Disable chip select
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(self.delay_ns)(60);
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self.nss.set_high();
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(self.delay_ns)(30);
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Err(Error::TransferError)
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}
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}
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}
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// TODO: Generalise transfer functions
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// TODO: Actual data should start from buf[0], not buf[1]
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// Completes an SPI transfer for reading data to the given buffer,
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// or writing data from the buffer.
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