From ae0d77cbf12ec9ab08c016ea11b0f23fa6a28b86 Mon Sep 17 00:00:00 2001 From: Harry Ho Date: Mon, 28 Dec 2020 15:57:21 +0800 Subject: [PATCH] Fix poor & unimplemented code --- src/lib.rs | 4 ++-- src/spi.rs | 28 +++++++++++++--------------- 2 files changed, 15 insertions(+), 17 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 3bed570..8a5490c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -129,7 +129,7 @@ impl <'c, SPI: Transfer, rx_packet.update_frame_length(); // Read frame bytes let mut frame_buf = [0; rx::RAW_FRAME_LENGTH_MAX]; - self.spi_port.read_rxdat(&mut frame_buf, rx_packet.get_frame_length() as u32)?; + self.spi_port.read_rxdat(&mut frame_buf, rx_packet.get_frame_length())?; rx_packet.copy_frame_from(&frame_buf[1..]); // Set ERXTAIL pointer to (next_addr - 2) if self.rx_buf.get_next_addr() > rx::ERXST_DEFAULT { @@ -152,7 +152,7 @@ impl <'c, SPI: Transfer, // 1-byte Opcode is included let mut txdat_buf: [u8; tx::RAW_FRAME_LENGTH_MAX + 1] = [0; tx::RAW_FRAME_LENGTH_MAX + 1]; packet.write_frame_to(&mut txdat_buf[1..]); - self.spi_port.write_txdat(&mut txdat_buf, packet.get_frame_length() as u32)?; + self.spi_port.write_txdat(&mut txdat_buf, packet.get_frame_length())?; // Set ETXST to packet start address self.spi_port.write_reg_16b(spi::addrs::ETXST, self.tx_buf.get_next_addr())?; // Set ETXLEN to packet length diff --git a/src/spi.rs b/src/spi.rs index 5489967..8d63bcb 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -1,10 +1,7 @@ -use core::fmt; use embedded_hal::{ blocking::spi::Transfer, digital::v2::OutputPin, - spi, }; -use crate::rx; pub mod interfaces { use embedded_hal::spi; @@ -64,6 +61,7 @@ pub enum SpiPortError { TransferError } +#[allow(unused_must_use)] impl , NSS: OutputPin> SpiPort { // TODO: return as Result() @@ -78,19 +76,19 @@ impl , pub fn read_reg_8b(&mut self, addr: u8) -> Result { // Using RCRU instruction to read using unbanked (full) address - let mut r_data = self.rw_addr_u8(opcodes::RCRU, addr, 0)?; + let r_data = self.rw_addr_u8(opcodes::RCRU, addr, 0)?; Ok(r_data) } pub fn read_reg_16b(&mut self, lo_addr: u8) -> Result { - let mut r_data_lo = self.read_reg_8b(lo_addr)?; - let mut r_data_hi = self.read_reg_8b(lo_addr + 1)?; + let r_data_lo = self.read_reg_8b(lo_addr)?; + let r_data_hi = self.read_reg_8b(lo_addr + 1)?; // Combine top and bottom 8-bit to return 16-bit Ok(((r_data_hi as u16) << 8) | r_data_lo as u16) } // Currently requires manual slicing (buf[1..]) for the data read back - pub fn read_rxdat<'a>(&mut self, buf: &'a mut [u8], data_length: u32) + pub fn read_rxdat<'a>(&mut self, buf: &'a mut [u8], data_length: usize) -> Result<(), SpiPortError> { let r_valid = self.r_n(buf, opcodes::RERXDATA, data_length)?; Ok(r_valid) @@ -98,7 +96,7 @@ impl , // Currenly requires actual data to be stored in buf[1..] instead of buf[0..] // TODO: Maybe better naming? - pub fn write_txdat<'a>(&mut self, buf: &'a mut [u8], data_length: u32) + pub fn write_txdat<'a>(&mut self, buf: &'a mut [u8], data_length: usize) -> Result<(), SpiPortError> { let w_valid = self.w_n(buf, opcodes::WEGPDATA, data_length)?; Ok(w_valid) @@ -137,7 +135,7 @@ impl , Ok(buf[2]) }, // TODO: Maybe too naive? - Err(e) => { + Err(_) => { // Disable chip select self.nss.set_high(); Err(SpiPortError::TransferError) @@ -150,20 +148,20 @@ impl , // Returns a reference to the data returned // Note: buf must be at least (data_length + 1)-byte long // TODO: Check and raise error for array size < (data_length + 1) - fn r_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: u32) + fn r_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: usize) -> Result<(), SpiPortError> { // Enable chip select self.nss.set_low(); // Start writing to SLAVE buf[0] = opcode; - match self.spi.transfer(buf) { + match self.spi.transfer(&mut buf[..data_length+1]) { Ok(_) => { // Disable chip select self.nss.set_high(); Ok(()) }, // TODO: Maybe too naive? - Err(e) => { + Err(_) => { // Disable chip select self.nss.set_high(); Err(SpiPortError::TransferError) @@ -173,21 +171,21 @@ impl , // Note: buf[0] is currently reserved for opcode to overwrite // TODO: Actual data should start from buf[0], not buf[1] - fn w_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: u32) + fn w_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: usize) -> Result<(), SpiPortError> { // Enable chip select self.nss.set_low(); // Start writing to SLAVE buf[0] = opcode; // TODO: Maybe need to copy data to buf later on - match self.spi.transfer(buf) { + match self.spi.transfer(&mut buf[..data_length+1]) { Ok(_) => { // Disable chip select self.nss.set_high(); Ok(()) }, // TODO: Maybe too naive? - Err(e) => { + Err(_) => { // Disable chip select self.nss.set_high(); Err(SpiPortError::TransferError)