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forked from M-Labs/artiq
artiq/artiq/gateware
2016-02-27 22:47:16 +01:00
..
amp Implement core device storage (fixes #219). 2016-01-10 13:04:55 +00:00
rtio gateware.spi: design sketch 2016-02-26 17:03:08 +01:00
targets gateware.pipistrello: use pmod for spi 2016-02-27 11:29:40 +01:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
nist_clock.py add information about CLOCK hardware 2016-01-20 21:06:02 -05:00
nist_qc1.py gateware,runtime: use new migen/misoc 2015-11-04 00:35:03 +08:00
nist_qc2.py gateware: clean up and integrate QC2 modifications from Daniel 2016-01-20 21:17:19 -05:00
soc.py gateware/soc: use new SDRAM API call 2015-12-16 14:59:35 +08:00
spi.py gateware.spi: add complete spi master logic 2016-02-27 22:47:16 +01:00