Robert Jordens a9d0f253a5 sayma_amc: set bitstream and config parameters ... * slow down CCLK rate as there is additional loading on the signals * single bit SPI for now until we know that quad SPI works * set up https://github.com/m-labs/artiq/issues/847		2017-12-13 21:21:52 +08:00
..
amp	gateware: make software builds spew less junk on the console.	2017-12-04 14:19:35 +00:00
drtio	drtio: remove spurious signals	2017-09-19 20:48:12 +08:00
dsp	Revert "sawg: advance dds 1/2 by one sample group"	2017-07-04 17:55:19 +02:00
rtio	gateware/ad5360_monitor: fix SPI data decoding	2017-10-26 11:58:59 +08:00
serwb	serwb: fix rx_delay_inc on ultrascale, this was the issue serwb issue...	2017-11-18 18:01:46 +01:00
targets	sayma_amc: set bitstream and config parameters	2017-12-13 21:21:52 +08:00
test	gateware/serwb: add test for phy initialization	2017-08-30 17:59:10 +02:00
__init__.py	artiqlib -> artiq.gateware	2015-03-08 11:00:24 +01:00
ad9_dds.py	ad9xxx -> ad9_dds	2017-01-04 11:34:52 +01:00
ad9154_fmc_ebz.py	Merge remote-tracking branch 'm-labs/phaser2' into phaser2	2016-12-02 14:11:56 +01:00
nist_clock.py	gateware/nist_clock: increase DDS bus drive strength. Closes #468	2016-06-07 11:08:19 -04:00
nist_qc2.py	qc2: swap SPI/TTL, all TTL lines are now In+Out compatible	2016-05-19 10:42:03 +08:00
remote_csr.py	remote_csr: interpret length as CSR size, not number of bus words	2017-08-31 13:34:48 +08:00
spi.py	gateware: add support for SPI-over-LVDS	2017-10-23 15:04:01 +08:00