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forked from M-Labs/artiq
artiq/artiq/gateware/drtio/transceiver
linuswck 8f7d138dbd gtx: Always enable IBUFDS_GTE2, add clk_path_ready
- Set clk_path_ready to High to start Initialization of GTP TX and RX
2023-11-07 18:36:48 +08:00
..
__init__.py drtio: GTX WIP 2016-10-14 00:36:13 +08:00
clock_aligner.py DRTIO: RTIO/SYS clock merge 2022-12-17 15:39:54 +08:00
eem_serdes.py Simplify OOB reset by clock division (#2217) 2023-09-26 08:02:49 +08:00
gtp_7series_init.py kasli: Correct the GTP TX clock path during init 2023-11-07 13:40:32 +08:00
gtp_7series.py kasli: Correct the GTP TX clock path during init 2023-11-07 13:40:32 +08:00
gtx_7series_init.py gtx: Always enable IBUFDS_GTE2, add clk_path_ready 2023-11-07 18:36:48 +08:00
gtx_7series.py gtx: Always enable IBUFDS_GTE2, add clk_path_ready 2023-11-07 18:36:48 +08:00