forked from M-Labs/artiq
432 lines
18 KiB
Python
432 lines
18 KiB
Python
from migen import *
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from migen.build.generic_platform import *
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from migen.genlib.io import DifferentialOutput
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import spi2
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def _eem_signal(i):
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n = "d{}".format(i)
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if i == 0:
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n += "_cc"
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return n
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def _eem_pin(eem, i, pol):
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return "eem{}:{}_{}".format(eem, _eem_signal(i), pol)
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class _EEM:
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@classmethod
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def add_extension(cls, target, eem, *args):
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name = cls.__name__
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target.platform.add_extension(cls.io(eem, *args))
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print("{} (EEM{}) starting at RTIO channel {}"
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.format(name, eem, len(target.rtio_channels)))
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class DIO(_EEM):
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@staticmethod
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def io(eem):
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return [("dio{}".format(eem), i,
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Subsignal("p", Pins(_eem_pin(eem, i, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, i, "n"))),
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IOStandard("LVDS_25"))
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for i in range(8)]
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@classmethod
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def add_std(cls, target, eem, ttl03_cls, ttl47_cls):
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cls.add_extension(target, eem)
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for i in range(4):
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pads = target.platform.request("dio{}".format(eem), i)
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phy = ttl03_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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for i in range(4):
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pads = target.platform.request("dio{}".format(eem), 4+i)
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phy = ttl47_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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class Urukul(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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ios = [
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("urukul{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "p") for i in range(3)))),
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IOStandard("LVDS_25"),
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),
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("urukul{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "n") for i in range(3)))),
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IOStandard("LVDS_25"),
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),
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]
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ttls = [(6, eem, "io_update"),
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(7, eem, "dds_reset")]
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if eem_aux is not None:
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ttls += [(0, eem_aux, "sync_clk"),
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(1, eem_aux, "sync_in"),
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(2, eem_aux, "io_update_ret"),
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(3, eem_aux, "nu_mosi3"),
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(4, eem_aux, "sw0"),
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(5, eem_aux, "sw1"),
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(6, eem_aux, "sw2"),
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(7, eem_aux, "sw3")]
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for i, j, sig in ttls:
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ios.append(
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("urukul{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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))
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return ios
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@staticmethod
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def io_qspi(eem0, eem1):
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ios = [
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("urukul{}_spi_p".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "p"), _eem_pin(eem0, 4, "p"))),
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IOStandard("LVDS_25"),
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),
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("urukul{}_spi_n".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "n"), _eem_pin(eem0, 4, "n"))),
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IOStandard("LVDS_25"),
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),
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]
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ttls = [(6, eem0, "io_update"),
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(7, eem0, "dds_reset"),
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(4, eem1, "sw0"),
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(5, eem1, "sw1"),
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(6, eem1, "sw2"),
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(7, eem1, "sw3")]
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for i, j, sig in ttls:
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ios.append(
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("urukul{}_{}".format(eem0, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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))
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ios += [
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("urukul{}_qspi_p".format(eem0), 0,
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"))),
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IOStandard("LVDS_25"),
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),
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("urukul{}_qspi_n".format(eem0), 0,
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"))),
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IOStandard("LVDS_25"),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls):
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cls.add_extension(target, eem, eem_aux)
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phy = spi2.SPIMaster(target.platform.request("urukul{}_spi_p".format(eem)),
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target.platform.request("urukul{}_spi_n".format(eem)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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pads = target.platform.request("urukul{}_dds_reset".format(eem))
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target.specials += DifferentialOutput(0, pads.p, pads.n)
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pads = target.platform.request("urukul{}_io_update".format(eem))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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if eem_aux is not None:
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for signal in "sw0 sw1 sw2 sw3".split():
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pads = target.platform.request("urukul{}_{}".format(eem, signal))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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class Sampler(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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ios = [
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("sampler{}_adc_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "p"))),
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IOStandard("LVDS_25"),
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),
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("sampler{}_adc_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "n"))),
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IOStandard("LVDS_25"),
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),
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("sampler{}_pgia_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "p"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "p"))),
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IOStandard("LVDS_25"),
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),
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("sampler{}_pgia_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "n"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "n"))),
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IOStandard("LVDS_25"),
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),
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] + [
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("sampler{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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) for i, j, sig in [
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(2, eem, "sdr"),
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(3, eem, "cnv")
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]
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]
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if eem_aux is not None:
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ios += [
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("sampler{}_adc_data_p".format(eem), 0,
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Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "p"))),
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Subsignal("sdoa", Pins(_eem_pin(eem_aux, 1, "p"))),
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Subsignal("sdob", Pins(_eem_pin(eem_aux, 2, "p"))),
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "p"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "p"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard("LVDS_25"),
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),
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("sampler{}_adc_data_n".format(eem), 0,
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Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("sdoa", Pins(_eem_pin(eem_aux, 1, "n"))),
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Subsignal("sdob", Pins(_eem_pin(eem_aux, 2, "n"))),
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "n"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "n"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard("LVDS_25"),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls):
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cls.add_extension(target, eem, eem_aux)
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phy = spi2.SPIMaster(
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target.platform.request("sampler{}_adc_spi_p".format(eem)),
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target.platform.request("sampler{}_adc_spi_n".format(eem)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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phy = spi2.SPIMaster(
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target.platform.request("sampler{}_pgia_spi_p".format(eem)),
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target.platform.request("sampler{}_pgia_spi_n".format(eem)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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pads = target.platform.request("sampler{}_cnv".format(eem))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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sdr = target.platform.request("sampler{}_sdr".format(eem))
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target.specials += DifferentialOutput(1, sdr.p, sdr.n)
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class Novogorny(_EEM):
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@staticmethod
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def io(eem):
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return [
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("novogorny{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard("LVDS_25"),
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),
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("novogorny{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25"),
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),
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] + [
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("novogorny{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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) for i, j, sig in [
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(5, eem, "cnv"),
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(6, eem, "busy"),
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(7, eem, "scko"),
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]
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls):
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cls.add_extension(target, eem)
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phy = spi2.SPIMaster(target.platform.request("novogorny{}_spi_p".format(eem)),
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target.platform.request("novogorny{}_spi_n".format(eem)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=16))
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pads = target.platform.request("novogorny{}_cnv".format(eem))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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class Zotino(_EEM):
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@staticmethod
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def io(eem):
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return [
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("zotino{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard("LVDS_25"),
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),
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("zotino{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 1, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25"),
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),
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] + [
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("zotino{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard("LVDS_25")
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) for i, j, sig in [
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(5, eem, "ldac_n"),
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(6, eem, "busy"),
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(7, eem, "clr_n"),
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]
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls):
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cls.add_extension(target, eem)
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phy = spi2.SPIMaster(target.platform.request("zotino{}_spi_p".format(eem)),
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target.platform.request("zotino{}_spi_n".format(eem)))
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy, ififo_depth=4))
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for signal in "ldac_n clr_n".split():
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pads = target.platform.request("zotino{}_{}".format(eem, signal))
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phy = ttl_out_cls(pads.p, pads.n)
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target.submodules += phy
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target.rtio_channels.append(rtio.Channel.from_phy(phy))
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class Grabber(_EEM):
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@staticmethod
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def io(eem, eem_aux):
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ios = [
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("grabber{}_video".format(eem), 0,
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Subsignal("xclk_p", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("xclk_n", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("x0_p", Pins(_eem_pin(eem, 1, "p"))),
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Subsignal("x0_n", Pins(_eem_pin(eem, 1, "n"))),
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Subsignal("x1_p", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("x1_n", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("x2_p", Pins(_eem_pin(eem, 3, "p"))),
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Subsignal("x2_n", Pins(_eem_pin(eem, 3, "n"))),
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Subsignal("x3_p", Pins(_eem_pin(eem, 4, "p"))),
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Subsignal("x3_n", Pins(_eem_pin(eem, 4, "n"))),
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IOStandard("LVDS_25")
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),
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("grabber{}_cc0".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
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IOStandard("LVDS_25")
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),
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("grabber{}_cc1".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
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IOStandard("LVDS_25")
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),
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("grabber{}_cc2".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
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IOStandard("LVDS_25")
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),
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]
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if eem_aux is not None:
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ios += [
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("grabber{}_video_m".format(eem), 0,
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Subsignal("yclk_p", Pins(_eem_pin(eem_aux, 0, "p"))),
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Subsignal("yclk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("y0_p", Pins(_eem_pin(eem_aux, 1, "p"))),
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Subsignal("y0_n", Pins(_eem_pin(eem_aux, 1, "n"))),
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Subsignal("y1_p", Pins(_eem_pin(eem_aux, 2, "p"))),
|
|
Subsignal("y1_n", Pins(_eem_pin(eem_aux, 2, "n"))),
|
|
Subsignal("y2_p", Pins(_eem_pin(eem_aux, 3, "p"))),
|
|
Subsignal("y2_n", Pins(_eem_pin(eem_aux, 3, "n"))),
|
|
Subsignal("y3_p", Pins(_eem_pin(eem_aux, 4, "p"))),
|
|
Subsignal("y3_n", Pins(_eem_pin(eem_aux, 4, "n"))),
|
|
IOStandard("LVDS_25")
|
|
),
|
|
("grabber{}_serrx".format(eem), 0,
|
|
Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
|
|
Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
|
|
IOStandard("LVDS_25")
|
|
),
|
|
("grabber{}_sertx".format(eem), 0,
|
|
Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
|
|
Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
|
|
IOStandard("LVDS_25")
|
|
),
|
|
("grabber{}_cc3".format(eem), 0,
|
|
Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
|
|
Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
|
|
IOStandard("LVDS_25")
|
|
),
|
|
]
|
|
return ios
|
|
|
|
@classmethod
|
|
def add_std(cls, target, eem, eem_aux, ttl_out_cls):
|
|
cls.add_extension(target, eem, eem_aux)
|
|
|
|
for signal in "cc0 cc1 cc2".split():
|
|
pads = target.platform.request("grabber{}_{}".format(eem, signal))
|
|
phy = ttl_out_cls(pads.p, pads.n)
|
|
target.submodules += phy
|
|
target.rtio_channels.append(rtio.Channel.from_phy(phy))
|
|
if eem_aux is not None:
|
|
pads = target.platform.request("grabber{}_cc3".format(eem))
|
|
phy = ttl_out_cls(pads.p, pads.n)
|
|
target.submodules += phy
|
|
target.rtio_channels.append(rtio.Channel.from_phy(phy))
|