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forked from M-Labs/artiq
Commit Graph

13 Commits

Author SHA1 Message Date
whitequark
da622937f6 Merge commit 'd0b5c3ba7fb' into new-py2llvm 2015-11-07 09:41:34 +03:00
d0b5c3ba7f runtime: startup kernel support 2015-10-31 23:26:09 +08:00
whitequark
3e1348a084 Merge branch 'master' of github.com:m-labs/artiq into new-py2llvm 2015-09-27 18:22:28 +03:00
8d8aa32aed runtime: fix AD9914 register read in bridge 2015-08-21 17:51:01 +08:00
whitequark
62fdc75d2d Integrate libdyld and libunwind.
It is currently possible to run the idle experiment, and it
can raise and catch exceptions, but exceptions are not yet
propagated across RPC boundaries.
2015-08-02 15:43:03 +03:00
d3f05e414a runtime: account for RTIO_FINE_TS_WIDTH in time buffers 2015-07-27 10:50:25 +08:00
34aacd3c5f complete AD9914 support (no programmable modulus, untested) 2015-07-08 17:22:43 +02:00
ce4b5739ed runtime: reset all DDSes upon startup 2015-05-09 17:12:38 +08:00
53c6339307 runtime: break ttl-specific functions from rtio 2015-05-08 16:20:12 +08:00
a36c51eb83 DDS over RTIO (batch mode not supported yet) 2015-05-08 14:44:39 +08:00
d8fdac6f86 runtime/bridge: factor rtio_init 2015-05-02 12:27:15 +08:00
8fe5c7ac01 runtime/test_mode: support setting O and OE separately 2015-05-02 12:16:09 +08:00
6a5f58e5a9 runtime: support test mode on AMP 2015-04-16 21:47:05 +08:00