c5137eeb62
firmware: remove legacy hmc542 code
2019-12-20 15:25:55 +08:00
David Nadlinger
d3508b014f
firmware: Add whitespace between panic handler location and message
2019-12-17 19:59:59 +00:00
6f52540569
wrpll: fix previous commit
2019-12-09 20:13:55 +08:00
13486f3acf
wrpll: swap helper/main si549 frequencies
2019-12-09 19:49:34 +08:00
4919fb8765
wrpll: print DDMTD helper tags
2019-12-09 17:39:22 +08:00
0d4eccc1a5
wrpll: improve debug output
2019-12-09 17:23:09 +08:00
f633c62e8d
wrpll: speed up si549 i2c access
2019-12-09 17:22:58 +08:00
14e09582b6
wrpll: work around si549 not working when lsdiv=2
2019-12-09 16:20:08 +08:00
439576f59d
wrpll: fix Si549 initialization delays
2019-12-09 16:13:57 +08:00
0499f83580
wrpll: helper clock sanity check
2019-12-08 23:46:33 +08:00
Paweł Kulik
14e250c78f
Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
...
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
eb271f383b
wrpll: add DDMTD cores
2019-11-28 22:03:50 +08:00
39d5ca11f4
si549: increase I2C frequency
2019-11-28 22:03:26 +08:00
87894102e5
si549: use recommended i2c read sequence
2019-11-28 17:49:02 +08:00
354d82cfe3
wrpll: drive helper clock domain
2019-11-28 17:40:00 +08:00
68cab5be8c
si549: cleanups
2019-11-28 16:36:59 +08:00
bcd2383c9d
wrpll: si549 initialization
2019-11-27 22:58:08 +08:00
4832bfb08c
wrpll: i2c functions, select_recovered_clock placeholder
2019-11-27 21:21:00 +08:00
449d2c4f08
libboard_misoc: fix !has_i2c
2019-11-27 21:04:28 +08:00
e0687b77f5
si5324: 10 MHz ext_ref_frequency
...
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
6644903843
bootloader: fix imports
2019-11-06 14:45:55 +08:00
b25a17fa37
netboot: support slave FPGA loading
2019-11-05 16:28:49 +08:00
9dc82bd766
bootloader: add no_flash_boot config option to force network boot
2019-11-05 15:31:08 +08:00
29b4d87943
firmware: add cargosha256.nix
2019-11-01 10:28:41 +08:00
5362f92b39
bootloader: disable minimum stack space check in linker script
...
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a
bootloader: fix !has_ethmac
2019-11-01 10:19:08 +08:00
a78e493b72
firmware: load slave FPGA in bootloader
2019-10-31 12:42:40 +08:00
389a8f587a
slave_fpga: modularize
2019-10-31 11:50:53 +08:00
bc050fdeec
bootloader: treat zero-length firmware in flash as no firmware
2019-10-30 21:46:06 +08:00
462cf5967e
bootloader: add netboot support
2019-10-30 21:23:42 +08:00
f2f7170d20
hmc7043: use recommend I/O standards
...
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1
firmware: more readable network addresses message
2019-10-21 14:00:14 +08:00
818d6b2f5a
bootloader: fix compilation problems
2019-10-21 13:28:17 +08:00
8f76a3218e
firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings
2019-10-21 12:58:52 +08:00
1c5e749036
satman: remove compilation warning without JESD DACs
2019-10-21 12:53:54 +08:00
d26d80410e
runtime: refactor network settings
2019-10-19 17:56:35 +08:00
6d5dcb4211
runtime: enable IPv6. Closes #349
2019-10-19 17:20:33 +08:00
05e8f24c24
sayma2: JESD204 synchronization
2019-10-18 23:28:47 +08:00
4df2c5d1fb
sayma: prepare for SYSREF align
...
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643
satman: define constants for JdacBasicRequest reqnos
2019-10-08 10:27:04 +08:00
4b3baf4825
firmware: run PRBS and STPL JESD204 tests
2019-10-08 00:10:36 +08:00
ebd5d890f1
satman: check for JESD ready
2019-10-06 23:10:57 +08:00
90e3b83e80
hmc7043: turn on AMC_FPGA_SYSREF1
...
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
1bc7743e03
sayma: fix hmc7043 output settings for v2 hardware
2019-10-06 21:50:29 +08:00
a421820a32
sayma: initialize DACs over DRTIO
2019-10-06 21:42:45 +08:00
f8e4cc37d0
sayma_rtm: reset and detect DACs
2019-10-06 20:15:27 +08:00
f62dc7e1d4
sayma: refactor JESD DAC channel groups
2019-10-06 20:15:09 +08:00
c4c884b8ce
ad9154: simplify, focus on AD9154 config and do not include JESD
2019-10-06 20:07:02 +08:00
fdba0bfbbc
satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init
2019-10-06 19:22:46 +08:00
ad63908aff
hmc830_7043: enable_fpga_ibuf -> unmute
2019-10-06 18:13:59 +08:00
