From f520d4a768dbd77f0a94cc5e8c9d134284451b66 Mon Sep 17 00:00:00 2001
From: Robert Jordens <rj@m-labs.hk>
Date: Wed, 28 Jun 2017 22:08:15 +0200
Subject: [PATCH] rtio: undo _RelaxedAsyncResetSynchronizer

---
 artiq/gateware/rtio/core.py | 18 ++----------------
 1 file changed, 2 insertions(+), 16 deletions(-)

diff --git a/artiq/gateware/rtio/core.py b/artiq/gateware/rtio/core.py
index 7b814ffcd..f9c602a7f 100644
--- a/artiq/gateware/rtio/core.py
+++ b/artiq/gateware/rtio/core.py
@@ -284,18 +284,6 @@ class LogChannel:
         self.overrides = []
 
 
-class _RelaxedAsyncResetSynchronizer(Module):
-    def __init__(self, cd, async_reset):
-        self.clock_domains.cd_rst = ClockDomain()
-        rst_fan = Signal(reset_less=True)
-        self.specials += AsyncResetSynchronizer(self.cd_rst, async_reset)
-        self.comb += [
-                self.cd_rst.clk.eq(cd.clk),
-                cd.rst.eq(rst_fan),
-        ]
-        self.sync.rst += rst_fan.eq(self.cd_rst.rst)
-
-
 class Core(Module, AutoCSR):
     def __init__(self, channels, fine_ts_width=None, guard_io_cycles=20):
         if fine_ts_width is None:
@@ -336,10 +324,8 @@ class Core(Module, AutoCSR):
             self.cd_rio.clk.eq(ClockSignal("rtio")),
             self.cd_rio_phy.clk.eq(ClockSignal("rtio"))
         ]
-        self.submodules.rars_rio = _RelaxedAsyncResetSynchronizer(
-                self.cd_rio, cmd_reset)
-        self.submodules.rars_rio_phy = _RelaxedAsyncResetSynchronizer(
-                self.cd_rio_phy, cmd_reset_phy)
+        self.specials += AsyncResetSynchronizer(self.cd_rio, cmd_reset)
+        self.specials += AsyncResetSynchronizer(self.cd_rio_phy, cmd_reset_phy)
 
         # Managers
         self.submodules.counter = RTIOCounter(len(self.cri.timestamp) - fine_ts_width)