forked from M-Labs/nac3
nac3artiq/demo: get closer to regular ARTIQ
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@ -1,30 +1,24 @@
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from min_artiq import *
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from min_artiq import *
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from numpy import int32, int64
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@kernel
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@kernel
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class Demo:
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class Demo:
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core: Core
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core: Core
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led: TTLOut
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led: TTLOut
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@portable
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def __init__(self):
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def __init__(self):
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self.core = Core()
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self.core = Core()
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self.led = TTLOut(0)
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self.led = TTLOut(self.core, 19)
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@kernel
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@kernel
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def run(self):
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def run_k(self):
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self.core.reset()
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self.core.reset()
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while True:
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while True:
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self.led.pulse_mu(int64(100000000))
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self.led.pulse(100.*ms)
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delay_mu(int64(True))
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self.core.delay(100.*ms)
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def run(self):
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self.core.run(self.run_k)
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@kernel
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def testing(a: int32) -> int32:
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return a + 1
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if __name__ == "__main__":
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if __name__ == "__main__":
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core = Core()
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Demo().run()
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# core.run(testing, 1)
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core.run(Demo().run)
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@ -7,10 +7,10 @@ device_db = {
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {
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"arguments": {
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"host": "192.168.1.52",
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"host": "kc705",
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"ref_period": 1e-9,
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"ref_period": 1e-9,
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"ref_multiplier": 8,
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"ref_multiplier": 8,
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"target": "cortexa9"
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"target": "riscv"
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}
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}
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},
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},
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}
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}
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@ -5,13 +5,13 @@ from numpy import int32, int64
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import nac3artiq
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import nac3artiq
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__all__ = ["KernelInvariant", "extern", "kernel", "portable", "ms", "us", "ns", "Core", "TTLOut"]
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import device_db
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import device_db
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core_arguments = device_db.device_db["core"]["arguments"]
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nac3 = nac3artiq.NAC3(core_arguments["target"])
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__all__ = ["KernelInvariant", "extern", "kernel", "portable", "Core", "TTLOut"]
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nac3 = nac3artiq.NAC3(device_db.device_db["core"]["arguments"]["target"])
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allow_module_registration = True
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allow_module_registration = True
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registered_ids = set()
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registered_ids = set()
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@ -55,6 +55,10 @@ def get_defined_class(method):
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return vars(sys.modules[method.__module__])[method.__qualname__.split('.')[0]]
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return vars(sys.modules[method.__module__])[method.__qualname__.split('.')[0]]
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ms = 1e-3
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us = 1e-6
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ns = 1e-9
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@extern
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@extern
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def rtio_init():
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def rtio_init():
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raise NotImplementedError("syscall not simulated")
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raise NotImplementedError("syscall not simulated")
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@ -82,9 +86,10 @@ def rtio_input_data(channel: int32) -> int32:
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@kernel
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@kernel
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class Core:
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class Core:
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@portable
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ref_period: float
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def __init__(self):
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def __init__(self):
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pass
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self.ref_period = core_arguments["ref_period"]
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def run(self, method, *args, **kwargs):
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def run(self, method, *args, **kwargs):
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global allow_module_registration
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global allow_module_registration
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@ -112,14 +117,28 @@ class Core:
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if now_mu() < min_now:
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if now_mu() < min_now:
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at_mu(min_now)
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at_mu(min_now)
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@portable
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def seconds_to_mu(self, seconds: float) -> int64:
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return int64(round(seconds/self.ref_period))
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@portable
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def mu_to_seconds(self, mu: int64) -> float:
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return float(mu)*self.ref_period
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@kernel
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def delay(self, dt: float):
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delay_mu(self.seconds_to_mu(dt))
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@kernel
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@kernel
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class TTLOut:
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class TTLOut:
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core: Core
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channel: int32
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channel: int32
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target_o: int32
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target_o: int32
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@portable
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@portable
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def __init__(self, channel: int32):
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def __init__(self, core: Core, channel: int32):
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self.core = core
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self.channel = channel
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self.channel = channel
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self.target_o = channel << 8
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self.target_o = channel << 8
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@ -144,3 +163,9 @@ class TTLOut:
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self.on()
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self.on()
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delay_mu(duration)
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delay_mu(duration)
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self.off()
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self.off()
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@kernel
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def pulse(self, duration: float):
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self.on()
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self.core.delay(duration)
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self.off()
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