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90 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 800c12e794 fix resolve_channel_name typing 2 weeks ago
Egor Savkin d36899b485 firmware: unify RTIO error message format 3 weeks ago
Egor Savkin 6b3fa98d70 add channel names to RTIO errors 3 weeks ago
Sebastien Bourdeauducq 4a522ecb3b update ramda and migen-axi 3 weeks ago
Sebastien Bourdeauducq 6be5ffe4e4 update flake dependencies 3 weeks ago
Egor Savkin 44ef13d1c0 Fix idle/startup_kernel typos in config 4 weeks ago
David Nadlinger 8e0229d265 si5324: crystal_{ref -> as_ckin2} [nfc] 1 month ago
David Nadlinger 2ddb4d259f Undo most of Si5324 unification (5c054cc901) 1 month ago
David Nadlinger 5c054cc901 Unify Si5324 setup code with main ARTIQ repository [nfc] 2 months ago
Sebastien Bourdeauducq c281505aa0 flake: fix cargo hash 2 months ago
Sebastien Bourdeauducq db0e41af6d update zynq-rs and some Rust deps 2 months ago
Sebastien Bourdeauducq a07ebb4dc0 flake: nixos 22.11 2 months ago
Sebastien Bourdeauducq d5402d899f flake: update dependencies 3 months ago
Sebastien Bourdeauducq bbecead9a3 examples: fix ref_multiplier 3 months ago
mwojcik c834e4f503 enable network and mgmt during Rust panic, make RTIO PLL lock failure a panic 3 months ago
mwojcik dc862a9051 match ident message with mainline 3 months ago
mwojcik 19e60073de kasli_soc: ident = variant name 3 months ago
Egor Savkin a546d0f95b Implement reboot for artiq_coremgmt 4 months ago
Sebastien Bourdeauducq d6ae646790 update dependencies 4 months ago
Sebastien Bourdeauducq 38f4d6cd2e flake: export packages 5 months ago
Sebastien Bourdeauducq f3310324d7 update dependencies 5 months ago
Sebastien Bourdeauducq 4a4f7b0ddc flake: update dependencies 6 months ago
Sebastien Bourdeauducq 0812f22423 update dependencies 6 months ago
Sebastien Bourdeauducq 014ff23daf README: update required versions 7 months ago
kk105 b638fce069 update SEEN_ASYNC_ERRORS in destination_survey (#195) 7 months ago
Sebastien Bourdeauducq ac4887ea33 flake: do not use __impure (breaks hydra) 8 months ago
Sebastien Bourdeauducq edf1999bb2 flake: update dependencies, rebuild with nix 2.8 8 months ago
occheung 9ec6a1feab dyld/rebind: support rela generation with nac3ld 8 months ago
occheung 8e144e41de reloc: impl ARM_PREL31 handling 8 months ago
occheung 512b6bac12 reloc: add PC-relative relocation support 8 months ago
occheung e3ed41ff32 fix index table reference type 8 months ago
occheung 97a63ca8d0 dyld: add EXIDX entry type 8 months ago
Sebastien Bourdeauducq d652f01379 flake: update dependencies 8 months ago
Sebastien Bourdeauducq d6ef5fd064 flake: update dependencies 8 months ago
occheung f0febe0ee4 change catch type to single reference 8 months ago
mwojcik dce8c974eb flake: remove unnecessary output 8 months ago
mwojcik 01339c9e78 flake: expose build, allow selection of output 8 months ago
Sebastien Bourdeauducq fa1f300067 flake: support impure derivation for HITL tests 8 months ago
Sebastien Bourdeauducq 191a22f506 flake: update artiq/nixpkgs 8 months ago
mwojcik 3e3fb207a5 flake: update dependencies 8 months ago
mwojcik abeaf5aca7 Revert "flake: update dependencies" 8 months ago
mwojcik e20c77650d flake: update dependencies 8 months ago
mwojcik 7a8f96dbd9 rtio_mgt: use mutex's async_lock 8 months ago
mwojcik 596edb480c cargo: update zynq-rs 8 months ago
mwojcik 4f457d9c24 moninj: log link down at debug level 8 months ago
mwojcik 24df52268e moninj: restructure timeout 8 months ago
mwojcik 48c9b43171 moninj: make it use async drtioaux 8 months ago
mwojcik 57d7f01b04 drtio: port 64-bit padding from mainline 8 months ago
mwojcik efc432352e zc706: no syncrtio for master, fixes hangs (#188) 9 months ago
mwojcik 88ffd3b77b flake: fix artiq package in zc706-hitl-tests 9 months ago
mwojcik 07210c7b09 flake: fix szl for hitl tests 9 months ago
mwojcik 1cd704c390 flake: fix szl for hitl tests 9 months ago
mwojcik 715a2dd04c flake: move hitl tests from nix-scripts to flake 9 months ago
mwojcik def4d989cd kasli_soc: fix si5324 pins routed to GTX 9 months ago
Sebastien Bourdeauducq f9a8c76654 flake: update dependencies 9 months ago
mwojcik 1d731a3589 zc706 master: route sma clock to si5324 10 months ago
mwojcik 3cf86a6335 satellites: add rtio_crg cfg 10 months ago
mwojcik 78bc162749 rtio_clocking: remove loop 10 months ago
Sebastien Bourdeauducq b974d7ddee flake: update dependencies 10 months ago
mwojcik 2c5de32a4c flake: update libasync sha256 10 months ago
mwojcik 5a7dbb3f29 flake: update sypico dependency (fix duplicate) 10 months ago
Sebastien Bourdeauducq d27d06f960 flake: update dependencies 10 months ago
mwojcik 14f7778732 update libconfig features 10 months ago
mwojcik dcfb28ce61 fix drtioaux packet corruption 10 months ago
mwojcik 433a9cdaf1 runtime: fix warnings on nondrtio systems 10 months ago
Sebastien Bourdeauducq a79bef2243 runtime: provide/fix more libc mem functions 10 months ago
Sebastien Bourdeauducq 7b21889055 README: fix gateware build command 10 months ago
Sebastien Bourdeauducq c6ef9b117c fix previous commit 10 months ago
Sebastien Bourdeauducq dcfaf587ec firmware: add UnwrapNoneError exception 10 months ago
mwojcik a92561b9d3 implement rtio_get_destination_status (#177) 10 months ago
Sebastien Bourdeauducq dc54d5f9b6 update artiq/vivado 10 months ago
Sebastien Bourdeauducq 161044e78f drop support for big-endian moninj 10 months ago
Sebastien Bourdeauducq 32f3c636c5 update artiq, work around annoying nix2.5 bug 11 months ago
Sebastien Bourdeauducq 50cafad18b update artiq 11 months ago
Sebastien Bourdeauducq 426500d2f9 firmware: support 64-bit moninj probes 11 months ago
Sebastien Bourdeauducq ebdb08180d drtio: demote default routing table message to info 11 months ago
Sebastien Bourdeauducq 0530e596ba mgmt: remove spurious config write warning 11 months ago
Sebastien Bourdeauducq 7502f3a765 update dependencies 11 months ago
Sebastien Bourdeauducq fa237088a0 hydra/nixUnstable flake.lock annoyance (2) 11 months ago
Sebastien Bourdeauducq ad557edd58 hydra/nixUnstable flakes.lock annoyance 11 months ago
Sebastien Bourdeauducq f5fa5532b6 flake: update artiq 11 months ago
pca006132 ae0d724bf8 runtime: use &CSlice for lists 11 months ago
occheung 6c834899e9 si5324: fix clock source 11 months ago
occheung a22b13cc46 kasli_soc: forward SMA clkin 11 months ago
spaqin 85e5c08d7f kasli_soc: use si5324 in master 11 months ago
spaqin 3c17362fad satman: fix i2cswitch 11 months ago
spaqin 4f2a0986da rtio_clocking: fix wrong descriptions 11 months ago
spaqin 4a2218641f fix BorrowMutError in moninj 11 months ago
mwojcik 9a06cd9d27 expose pca954x_select api (#167) 11 months ago
Sebastien Bourdeauducq b56b50b147 add comment about EXCEPTION_ID_LOOKUP sync 11 months ago
  1. 6
      README.md
  2. 2
      examples/device_db.py
  3. 143
      flake.lock
  4. 137
      flake.nix
  5. 121
      src/Cargo.lock
  6. 34
      src/gateware/kasli_soc.py
  7. 19
      src/gateware/zc706.py
  8. 2
      src/libboard_artiq/Cargo.toml
  9. 13
      src/libboard_artiq/src/drtio_routing.rs
  10. 25
      src/libboard_artiq/src/drtioaux.rs
  11. 17
      src/libboard_artiq/src/drtioaux_async.rs
  12. 20
      src/libboard_artiq/src/drtioaux_proto.rs
  13. 6
      src/libboard_artiq/src/si5324.rs
  14. 19
      src/libdwarf/src/eh.rs
  15. 3
      src/libdyld/src/elf.rs
  16. 2
      src/libdyld/src/lib.rs
  17. 81
      src/libdyld/src/reloc.rs
  18. 2
      src/runtime/Cargo.toml
  19. 101
      src/runtime/src/comms.rs
  20. 9
      src/runtime/src/eh_artiq.rs
  21. 23
      src/runtime/src/i2c.rs
  22. 10
      src/runtime/src/kernel/api.rs
  23. 14
      src/runtime/src/kernel/cache.rs
  24. 35
      src/runtime/src/kernel/core1.rs
  25. 8
      src/runtime/src/kernel/dma.rs
  26. 5
      src/runtime/src/kernel/mod.rs
  27. 25
      src/runtime/src/main.rs
  28. 12
      src/runtime/src/mgmt.rs
  29. 68
      src/runtime/src/moninj.rs
  30. 57
      src/runtime/src/panic.rs
  31. 23
      src/runtime/src/rpc.rs
  32. 24
      src/runtime/src/rtio_acp.rs
  33. 207
      src/runtime/src/rtio_clocking.rs
  34. 24
      src/runtime/src/rtio_csr.rs
  35. 71
      src/runtime/src/rtio_mgt.rs
  36. 2
      src/satman/Cargo.toml
  37. 34
      src/satman/src/main.rs

@ -4,7 +4,7 @@ ARTIQ on Zynq
How to use
----------
1. Install ARTIQ-6 or newer.
1. Install ARTIQ-7 or newer.
2. Select the latest successful build on Hydra: https://nixbld.m-labs.hk/jobset/artiq/zynq
3. Search for the job named ``<board>-<variant>-sd`` (for example: ``zc706-nist_clock-sd`` or ``zc706-nist_qc2-sd``).
4. Download the ``boot.bin`` "binary distribution" and place it at the root of a FAT-formatted SD card.
@ -33,7 +33,7 @@ not implemented as it seems not very useful.
Development instructions
------------------------
ARTIQ on Zynq is packaged using the [Nix](https://nixos.org) Flakes system. Install Nix 2.4+ and enable flakes by adding ``experimental-features = nix-command flakes`` to ``nix.conf`` (e.g. ``~/.config/nix/nix.conf``).
ARTIQ on Zynq is packaged using the [Nix](https://nixos.org) Flakes system. Install Nix 2.8+ and enable flakes by adding ``experimental-features = nix-command flakes`` to ``nix.conf`` (e.g. ``~/.config/nix/nix.conf``).
Pure build with Nix and execution on a remote JTAG server:
@ -47,7 +47,7 @@ Impure incremental build and execution on a remote JTAG server:
```shell
nix develop
cd src
gateware/zc706.py -g ../build/gateware -v <variant> # build gateware
gateware/zc706.py -g ../build/gateware -V <variant> # build gateware
make GWARGS="-V <variant>" <runtime/satman> # build firmware
cd ..
./remote_run.sh -i

@ -8,7 +8,7 @@ device_db = {
"arguments": {
"host": "192.168.1.52",
"ref_period": 1e-9,
"ref_multiplier": 1,
"ref_multiplier": 8,
"target": "cortexa9"
}
},

@ -2,19 +2,20 @@
"nodes": {
"artiq": {
"inputs": {
"artiq-comtools": "artiq-comtools",
"mozilla-overlay": "mozilla-overlay",
"nixpkgs": "nixpkgs",
"sipyco": "sipyco",
"src-migen": "src-migen",
"src-misoc": "src-misoc",
"src-pythonparser": "src-pythonparser",
"src-sipyco": "src-sipyco"
"src-pythonparser": "src-pythonparser"
},
"locked": {
"lastModified": 1644375232,
"narHash": "sha256-jd8sAlAz6xGQoxiRUV5ChtEjdjh4pdIksUPsqftcK5s=",
"ref": "master",
"rev": "a0070d4396136b84e0a50a1c57ee72bcf4e7f6f9",
"revCount": 7961,
"lastModified": 1672816435,
"narHash": "sha256-cH2i+1eoJ+K9rAxctVjUR5oNWi54USjbtXPYj5a0j7A=",
"ref": "refs/heads/master",
"rev": "1be7e2a2e1d142802a52792865b19c8874fd0e9d",
"revCount": 8257,
"type": "git",
"url": "https://github.com/m-labs/artiq.git"
},
@ -23,14 +24,55 @@
"url": "https://github.com/m-labs/artiq.git"
}
},
"artiq-comtools": {
"inputs": {
"flake-utils": "flake-utils",
"nixpkgs": [
"artiq",
"nixpkgs"
],
"sipyco": [
"artiq",
"sipyco"
]
},
"locked": {
"lastModified": 1664405593,
"narHash": "sha256-yP441NerlLGig7n+9xHsx8yCtZ+Ggd0VqfBSzc20E04=",
"owner": "m-labs",
"repo": "artiq-comtools",
"rev": "15ddac62813ef623a076ccf982b3bc63d314e651",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "artiq-comtools",
"type": "github"
}
},
"flake-utils": {
"locked": {
"lastModified": 1659877975,
"narHash": "sha256-zllb8aq3YO3h8B/U0/J1WBgAL8EX5yWf5pMj3G0NAmc=",
"owner": "numtide",
"repo": "flake-utils",
"rev": "c0e246b9b83f637f4681389ecabcb2681b4f3af0",
"type": "github"
},
"original": {
"owner": "numtide",
"repo": "flake-utils",
"type": "github"
}
},
"mozilla-overlay": {
"flake": false,
"locked": {
"lastModified": 1643634764,
"narHash": "sha256-EcFlgzZnZSHwZixELYV1pa267t+u5mCeLhSNBeAA/+c=",
"lastModified": 1664789696,
"narHash": "sha256-UGWJHQShiwLCr4/DysMVFrYdYYHcOqAOVsWNUu+l6YU=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "f233fdc4ff6ba2ffeb1e3e3cd6d63bb1297d6996",
"rev": "80627b282705101e7b38e19ca6e8df105031b072",
"type": "github"
},
"original": {
@ -42,11 +84,11 @@
"mozilla-overlay_2": {
"flake": false,
"locked": {
"lastModified": 1643634764,
"narHash": "sha256-EcFlgzZnZSHwZixELYV1pa267t+u5mCeLhSNBeAA/+c=",
"lastModified": 1672878308,
"narHash": "sha256-0+fl6PHokhtSV+w58z2QD2rTf8QhcOGsT9o4LwHHZHE=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "f233fdc4ff6ba2ffeb1e3e3cd6d63bb1297d6996",
"rev": "d38863db88e100866b3e494a651ee4962b762fcc",
"type": "github"
},
"original": {
@ -58,11 +100,11 @@
"mozilla-overlay_3": {
"flake": false,
"locked": {
"lastModified": 1638887313,
"narHash": "sha256-FMYV6rVtvSIfthgC1sK1xugh3y7muoQcvduMdriz4ag=",
"lastModified": 1664789696,
"narHash": "sha256-UGWJHQShiwLCr4/DysMVFrYdYYHcOqAOVsWNUu+l6YU=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "7c1e8b1dd6ed0043fb4ee0b12b815256b0b9de6f",
"rev": "80627b282705101e7b38e19ca6e8df105031b072",
"type": "github"
},
"original": {
@ -73,16 +115,16 @@
},
"nixpkgs": {
"locked": {
"lastModified": 1643503720,
"narHash": "sha256-tJic20ufuRnG8V+fTCd3YU6xl1ImxNspoEkXHct0AG4=",
"lastModified": 1669735802,
"narHash": "sha256-qtG/o/i5ZWZLmXw108N2aPiVsxOcidpHJYNkT45ry9Q=",
"owner": "NixOS",
"repo": "nixpkgs",
"rev": "0f316e4d72daed659233817ffe52bf08e081b5de",
"rev": "731cc710aeebecbf45a258e977e8b68350549522",
"type": "github"
},
"original": {
"owner": "NixOS",
"ref": "nixos-21.11",
"ref": "nixos-22.11",
"repo": "nixpkgs",
"type": "github"
}
@ -94,14 +136,35 @@
"zynq-rs": "zynq-rs"
}
},
"sipyco": {
"inputs": {
"nixpkgs": [
"artiq",
"nixpkgs"
]
},
"locked": {
"lastModified": 1669369686,
"narHash": "sha256-YHez+S3PTUgtuliUNB5WM+RXcj8RKLbHVRvOgELSkwU=",
"owner": "m-labs",
"repo": "sipyco",
"rev": "98db6eacb084c2c5280fb653bee3d313e3ca6df8",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "sipyco",
"type": "github"
}
},
"src-migen": {
"flake": false,
"locked": {
"lastModified": 1639659493,
"narHash": "sha256-qpVj/yJf4hDDc99XXpVPH4EbLC8aCmEtACn5qNc3DGI=",
"lastModified": 1662111470,
"narHash": "sha256-IPyhoFZLhY8d3jHB8jyvGdbey7V+X5eCzBZYSrJ18ec=",
"owner": "m-labs",
"repo": "migen",
"rev": "ac703010eaa06ac9b6e32f97c6fa98b15de22b31",
"rev": "639e66f4f453438e83d86dc13491b9403bbd8ec6",
"type": "github"
},
"original": {
@ -113,11 +176,11 @@
"src-misoc": {
"flake": false,
"locked": {
"lastModified": 1641889368,
"narHash": "sha256-0Ai25lry9ju1HxFmfMRNKG8mamBqvw+kvDfpuK8Dtjo=",
"lastModified": 1669779825,
"narHash": "sha256-l3lyy6dmbivo9Tppb08KHSyU89ZZG1CCcSjPlNRD210=",
"ref": "master",
"rev": "7242dc5a41732135425acc4871487461dfae6c66",
"revCount": 2419,
"rev": "2c255775f732a41ba1a512ab3d2547af4e25f674",
"revCount": 2435,
"submodules": true,
"type": "git",
"url": "https://github.com/m-labs/misoc.git"
@ -144,22 +207,6 @@
"type": "github"
}
},
"src-sipyco": {
"flake": false,
"locked": {
"lastModified": 1641866796,
"narHash": "sha256-TSH0IgNbi9IcMcBDb2nWRphKlxstbWeATjrGbi6K2m0=",
"owner": "m-labs",
"repo": "sipyco",
"rev": "b04234c49379cd446d4cb3346d4741868d86841a",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "sipyco",
"type": "github"
}
},
"zynq-rs": {
"inputs": {
"mozilla-overlay": "mozilla-overlay_3",
@ -169,11 +216,11 @@
]
},
"locked": {
"lastModified": 1644558411,
"narHash": "sha256-PC/gVlVLmtZCv1Tw8Xz5ZCTxqmS2osncg5hlt9BoJ/8=",
"ref": "master",
"rev": "3e95df1f640aa761740feaf9eec797acb58dd942",
"revCount": 604,
"lastModified": 1669819016,
"narHash": "sha256-WvNMUekL4Elc55RdqX8XP43QPnBrK8Rbd0bsoI61E5U=",
"ref": "refs/heads/master",
"rev": "67dbb5932fa8ff5f143983476f741f945871d286",
"revCount": 624,
"type": "git",
"url": "https://git.m-labs.hk/m-labs/zynq-rs"
},

@ -37,13 +37,13 @@
ramda = pkgs.python3Packages.buildPythonPackage {
pname = "ramda";
version = "unstable-2019-02-01";
version = "unstable-2020-04-11";
src = pkgs.fetchFromGitHub {
owner = "peteut";
repo = "ramda.py";
rev = "bd58f8e69d0e9a713d9c1f286a1ac5e5603956b1";
sha256 = "0qzd5yp9lbaham8p1wiymdjapzbqsli7lvngv24c3z4ybd9jlq9g";
rev = "d315a9717ebd639366bf3fe26bad9e3d08ec3c49";
sha256 = "sha256-bmSt/IHDnULsZjsC6edELnNH7LoJSVF4L4XhwBAXRkY=";
};
nativeBuildInputs = with pkgs.python3Packages; [ pbr ];
@ -54,46 +54,34 @@
doCheck = false;
preBuild = ''
export PBR_VERSION=0.0.1
export PBR_VERSION=0.5.5
'';
};
migen-axi = pkgs.python3Packages.buildPythonPackage {
pname = "migen-axi";
version = "unstable-2021-09-15";
version = "unstable-2023-01-06";
src = pkgs.fetchFromGitHub {
owner = "peteut";
repo = "migen-axi";
rev = "9763505ee96acd7572280a2d1233721342dc7c3f";
sha256 = "15c7g05n183rka66fl1glzp6h7xjlpy1p6k8biry24dangsmxmvg";
rev = "27eaa84a70a3abfe1930c86c36c4de2cd652da35";
sha256 = "sha256-3Y9W5ns+1wbVd14iePzgSBzE+LxnGMUDtUw3BccFt80=";
};
nativeBuildInputs = with pkgs.python3Packages; [ pbr ];
propagatedBuildInputs = with pkgs.python3Packages; [ setuptools click numpy toolz jinja2 ramda artiqpkgs.migen artiqpkgs.misoc ];
format = "pyproject";
postPatch = ''
substituteInPlace requirements.txt \
--replace "jinja2==2.11.3" "jinja2"
substituteInPlace requirements.txt \
--replace "future==0.18.2" "future"
substituteInPlace requirements.txt \
--replace "ramda==0.5.5" "ramda"
substituteInPlace requirements.txt \
--replace "colorama==0.4.3" "colorama"
substituteInPlace requirements.txt \
--replace "toolz==0.10.0" "toolz"
substituteInPlace requirements.txt \
--replace "pyserial==3.4" "pyserial"
substituteInPlace requirements.txt \
--replace "markupsafe==1.1.1" "markupsafe"
'';
propagatedBuildInputs = with pkgs.python3Packages; [ setuptools click numpy toolz jinja2 ramda artiqpkgs.migen artiqpkgs.misoc ];
checkInputs = with pkgs.python3Packages; [ pytest pytest-timeout pytest-flake8 ];
checkPhase = "pytest";
preBuild = ''
export PBR_VERSION=0.0.1
# migen/misoc version checks are broken with pyproject for some reason
postPatch = ''
substituteInPlace pyproject.toml \
--replace '"migen@git+https://github.com/m-labs/migen",' ""
substituteInPlace pyproject.toml \
--replace '"misoc@git+https://github.com/m-labs/misoc.git",' ""
'';
};
binutils = { platform, target, zlib }: pkgs.stdenv.mkDerivation rec {
@ -134,7 +122,7 @@
cargoLock = {
lockFile = src/Cargo.lock;
outputHashes = {
"libasync-0.0.0" = "sha256-PC/gVlVLmtZCv1Tw8Xz5ZCTxqmS2osncg5hlt9BoJ/8=";
"libasync-0.0.0" = "sha256-WvNMUekL4Elc55RdqX8XP43QPnBrK8Rbd0bsoI61E5U=";
};
};
@ -247,8 +235,93 @@
}
else {}
);
gateware-sim = pkgs.stdenv.mkDerivation {
name = "gateware-sim";
nativeBuildInputs = [
(pkgs.python3.withPackages(ps: (with artiqpkgs; [ migen migen-axi artiq ])))
artiqpkgs.artiq
];
phases = [ "buildPhase" ];
buildPhase =
''
python -m unittest discover ${self}/src/gateware -v
touch $out
'';
};
# for hitl-tests
zc706-nist_qc2 = (build { target = "zc706"; variant = "nist_qc2"; });
zc706-hitl-tests = pkgs.stdenv.mkDerivation {
name = "zc706-hitl-tests";
__networked = true; # compatibility with old patched Nix
# breaks hydra, https://github.com/NixOS/hydra/issues/1216
#__impure = true; # Nix 2.8+
buildInputs = [
pkgs.netcat pkgs.openssh pkgs.rsync artiqpkgs.artiq artiq-netboot zynqpkgs.zc706-szl
];
phases = [ "buildPhase" ];
buildPhase =
''
export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_ed25519"
LOCKCTL=$(mktemp -d)
mkfifo $LOCKCTL/lockctl
cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
$NIX_SSHOPTS \
rpi-4 \
'mkdir -p /tmp/board_lock && flock /tmp/board_lock/zc706-1 -c "echo Ok; cat"' \
| (
# End remote flock via FIFO
atexit_unlock() {
echo > $LOCKCTL/lockctl
}
trap atexit_unlock EXIT
# Read "Ok" line when remote successfully locked
read LOCK_OK
echo Power cycling board...
(echo b; sleep 5; echo B; sleep 5) | nc -N -w6 192.168.1.31 3131
echo Power cycle done.
export USER=hydra
export OPENOCD_ZYNQ=${zynq-rs}/openocd
export SZL=${zynqpkgs.szl}
bash ${self}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${zc706-nist_qc2.zc706-nist_qc2-jtag}
echo Waiting for the firmware to boot...
sleep 15
echo Running test kernel...
artiq_run --device-db ${self}/examples/device_db.py ${self}/examples/mandelbrot.py
echo Running ARTIQ unit tests...
export ARTIQ_ROOT=${self}/examples
export ARTIQ_LOW_LATENCY=1
python -m unittest discover artiq.test.coredevice -v
touch $out
echo Completed
(echo b; sleep 5) | nc -N -w6 192.168.1.31 3131
echo Board powered off
)
'';
};
in rec {
packages.x86_64-linux = (build { target = "zc706"; variant = "nist_clock"; }) //
packages.x86_64-linux =
{
inherit fastnumbers artiq-netboot ramda migen-axi binutils-arm;
} //
(build { target = "zc706"; variant = "nist_clock"; }) //
(build { target = "zc706"; variant = "nist_clock_master"; }) //
(build { target = "zc706"; variant = "nist_clock_satellite"; }) //
(build { target = "zc706"; variant = "nist_clock_satellite_100mhz"; }) //
@ -268,7 +341,7 @@
(build { target = "kasli_soc"; variant = "master"; json = ./kasli-soc-master.json; }) //
(build { target = "kasli_soc"; variant = "satellite"; json = ./kasli-soc-satellite.json; });
hydraJobs = packages.x86_64-linux;
hydraJobs = packages.x86_64-linux // { inherit zc706-hitl-tests; inherit gateware-sim; };
devShell.x86_64-linux = pkgs.mkShell {
name = "artiq-zynq-dev-shell";
@ -294,5 +367,7 @@
SZL = "${zynqpkgs.szl}";
};
makeArtiqZynqPackage = build;
};
}
}

121
src/Cargo.lock generated

@ -1,5 +1,7 @@
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
version = 3
[[package]]
name = "async-recursion"
version = "0.3.2"
@ -13,9 +15,9 @@ dependencies = [
[[package]]
name = "autocfg"
version = "1.0.1"
version = "1.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a"
checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa"
[[package]]
name = "bit_field"
@ -25,9 +27,9 @@ checksum = "dcb6dd1c2376d2e096796e234a70e17e94cc2d5d54ff8ce42b28cef1d0d359a4"
[[package]]
name = "bitflags"
version = "1.2.1"
version = "1.3.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "cf1de2fe8c75bc145a2f577add951f8134889b4795d47466a54a5c846d691693"
checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"
[[package]]
name = "build_const"
@ -47,9 +49,9 @@ checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610"
[[package]]
name = "cc"
version = "1.0.69"
version = "1.0.77"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e70cc2f62c6ce1868963827bd677764c62d07c3d9a3e1fb1177ee1a9ab199eb2"
checksum = "e9f73505338f7d905b19d18738976aae232eb46b8efc15554ffc56deb5d9ebe4"
[[package]]
name = "cfg-if"
@ -114,9 +116,9 @@ dependencies = [
[[package]]
name = "embedded-hal"
version = "0.2.6"
version = "0.2.7"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e36cfb62ff156596c892272f3015ef952fe1525e85261fa3a7f327bd6b384ab9"
checksum = "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff"
dependencies = [
"nb 0.1.3",
"void",
@ -136,9 +138,9 @@ dependencies = [
[[package]]
name = "futures"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1adc00f486adfc9ce99f77d717836f0c5aa84965eb0b4f051f4e83f7cab53f8b"
checksum = "38390104763dc37a5145a53c29c63c1290b5d316d6086ec32c293f6736051bb0"
dependencies = [
"futures-channel",
"futures-core",
@ -150,9 +152,9 @@ dependencies = [
[[package]]
name = "futures-channel"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "74ed2411805f6e4e3d9bc904c95d5d423b89b3b25dc0250aa74729de20629ff9"
checksum = "52ba265a92256105f45b719605a571ffe2d1f0fea3807304b522c1d778f79eed"
dependencies = [
"futures-core",
"futures-sink",
@ -160,24 +162,22 @@ dependencies = [
[[package]]
name = "futures-core"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "af51b1b4a7fdff033703db39de8802c673eb91855f2e0d47dcf3bf2c0ef01f99"
checksum = "04909a7a7e4633ae6c4a9ab280aeb86da1236243a77b694a49eacd659a4bd3ac"
[[package]]
name = "futures-io"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0b0e06c393068f3a6ef246c75cdca793d6a46347e75286933e5e75fd2fd11582"
checksum = "00f5fb52a06bdcadeb54e8d3671f8888a39697dcb0b81b23b55174030427f4eb"
[[package]]
name = "futures-macro"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c54913bae956fb8df7f4dc6fc90362aa72e69148e3f39041fbe8742d21e0ac57"
checksum = "bdfb8ce053d86b91919aad980c220b1fb8401a9394410e1c289ed7e66b61835d"
dependencies = [
"autocfg",
"proc-macro-hack",
"proc-macro2",
"quote",
"syn",
@ -185,31 +185,28 @@ dependencies = [
[[package]]
name = "futures-sink"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c0f30aaa67363d119812743aa5f33c201a7a66329f97d1a887022971feea4b53"
checksum = "39c15cf1a4aa79df40f1bb462fb39676d0ad9e366c2a33b590d7c66f4f81fcf9"
[[package]]
name = "futures-task"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "bbe54a98670017f3be909561f6ad13e810d9a51f3f061b902062ca3da80799f2"
checksum = "2ffb393ac5d9a6eaa9d3fdf37ae2776656b706e200c8e16b1bdb227f5198e6ea"
[[package]]
name = "futures-util"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "67eb846bfd58e44a8481a00049e82c43e0ccb5d61f8dc071057cb19249dd4d78"
checksum = "197676987abd2f9cadff84926f410af1c183608d36641465df73ae8211dc65d6"
dependencies = [
"autocfg",
"futures-core",
"futures-macro",
"futures-sink",
"futures-task",
"pin-project-lite",
"pin-utils",
"proc-macro-hack",
"proc-macro-nested",
]
[[package]]
@ -224,7 +221,7 @@ dependencies = [
[[package]]
name = "libasync"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"embedded-hal",
"libcortex_a9",
@ -256,7 +253,7 @@ dependencies = [
[[package]]
name = "libboard_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"bit_field",
"embedded-hal",
@ -281,7 +278,7 @@ dependencies = [
[[package]]
name = "libconfig"
version = "0.1.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"core_io",
"fatfs",
@ -292,7 +289,7 @@ dependencies = [
[[package]]
name = "libcortex_a9"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"bit_field",
"libregister",
@ -301,14 +298,14 @@ dependencies = [
[[package]]
name = "libm"
version = "0.2.1"
version = "0.2.6"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c7d73b3f436185384286bd8098d17ec07c9a7d2388a6599f824d8502b529702a"
checksum = "348108ab3fba42ec82ff6e9564fc4ca0247bdccdc68dd8af9764bbc79c3c8ffb"
[[package]]
name = "libregister"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"bit_field",
"vcell",
@ -318,7 +315,7 @@ dependencies = [
[[package]]
name = "libsupport_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#67dbb5932fa8ff5f143983476f741f945871d286"
dependencies = [
"cc",
"compiler_builtins",
@ -337,9 +334,9 @@ checksum = "822add9edb1860698b79522510da17bef885171f75aa395cff099d770c609c24"
[[package]]
name = "log"
version = "0.4.14"
version = "0.4.17"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "51b9bbe6c47d51fc3e1a9b945965946b4c44142ab8792c50835a980d362c2710"
checksum = "abb12e687cfb44aa40f41fc3978ef76448f9b6038cad6aef4259d3c095a2382e"
dependencies = [
"cfg-if 1.0.0",
]
@ -384,18 +381,18 @@ dependencies = [
[[package]]
name = "num-traits"
version = "0.2.14"
version = "0.2.15"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "9a64b1ec5cda2586e284722486d802acf1f7dbdc623e2bfc57e65ca1cd099290"
checksum = "578ede34cf02f8924ab9447f50c28075b4d3e5b269972345e7e0372b38c6cdcd"
dependencies = [
"autocfg",
]
[[package]]
name = "pin-project-lite"
version = "0.2.7"
version = "0.2.9"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8d31d11c69a6b52a174b42bdc0c30e5e11670f90788b2c471c31c1d17d449443"
checksum = "e0a7ae3ac2f1173085d398531c705756c94a4c56843785df85a60c1a0afac116"
[[package]]
name = "pin-utils"
@ -403,32 +400,20 @@ version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184"
[[package]]
name = "proc-macro-hack"
version = "0.5.19"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "dbf0c48bc1d91375ae5c3cd81e3722dff1abcf81a30960240640d223f59fe0e5"
[[package]]
name = "proc-macro-nested"
version = "0.1.7"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "bc881b2c22681370c6a780e47af9840ef841837bc98118431d4e1868bd0c1086"
[[package]]
name = "proc-macro2"
version = "1.0.28"
version = "1.0.43"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "5c7ed8b8c7b886ea3ed7dde405212185f423ab44682667c8c6dd14aa1d9f6612"
checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
dependencies = [
"unicode-xid",
"unicode-ident",
]
[[package]]
name = "quote"
version = "1.0.9"
version = "1.0.21"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
dependencies = [
"proc-macro2",
]
@ -518,20 +503,20 @@ dependencies = [
[[package]]
name = "syn"
version = "1.0.74"
version = "1.0.101"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1873d832550d4588c3dbc20f01361ab00bfe741048f71e3fecf145a7cc18b29c"
checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
dependencies = [
"proc-macro2",
"quote",
"unicode-xid",
"unicode-ident",
]
[[package]]
name = "unicode-xid"
version = "0.2.2"
name = "unicode-ident"
version = "1.0.5"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
[[package]]
name = "unwind"
@ -557,9 +542,9 @@ checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
[[package]]
name = "volatile-register"
version = "0.2.0"
version = "0.2.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
checksum = "9ee8f19f9d74293faf70901bc20ad067dc1ad390d2cbf1e3f75f721ffee908b6"
dependencies = [
"vcell",
]

@ -96,6 +96,19 @@ def eem_iostandard(eem):
return IOStandard(eem_iostandard_dict[eem])
class SMAClkinForward(Module):
def __init__(self, platform):
sma_clkin = platform.request("sma_clkin")
sma_clkin_se = Signal()
cdr_clk_se = Signal()
cdr_clk = platform.request("cdr_clk")
self.specials += [
Instance("IBUFDS", i_I=sma_clkin.p, i_IB=sma_clkin.n, o_O=sma_clkin_se),
Instance("ODDR", i_C=sma_clkin_se, i_CE=1, i_D1=1, i_D2=0, o_Q=cdr_clk_se),
Instance("OBUFDS", i_I=cdr_clk_se, o_O=cdr_clk.p, o_OB=cdr_clk.n)
]
class GenericStandalone(SoCCore):
def __init__(self, description, acpki=False):
self.acpki = acpki
@ -105,7 +118,7 @@ class GenericStandalone(SoCCore):
platform.toolchain.bitstream_commands.extend([
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
])
ident = self.__class__.__name__
ident = description["variant"]
if self.acpki:
ident = "acpki_" + ident
SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
@ -113,6 +126,8 @@ class GenericStandalone(SoCCore):
platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
self.submodules += SMAClkinForward(self.platform)
self.rustc_cfg["has_si5324"] = None
self.rustc_cfg["si5324_soft_reset"] = None
@ -189,7 +204,7 @@ class GenericMaster(SoCCore):
platform.toolchain.bitstream_commands.extend([
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
])
ident = self.__class__.__name__
ident = description["variant"]
if self.acpki:
ident = "acpki_" + ident
SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
@ -197,10 +212,12 @@ class GenericMaster(SoCCore):
platform.add_platform_command("create_clock -name clk_fpga_0 -period 8 [get_pins \"PS7/FCLKCLK[0]\"]")
platform.add_platform_command("set_input_jitter clk_fpga_0 0.24")
self.submodules += SMAClkinForward(self.platform)
data_pads = [platform.request("sfp", i) for i in range(4)]
self.submodules.drtio_transceiver = gtx_7series.GTX(
clock_pads=platform.request("clk125_gtp"),
clock_pads=platform.request("clk_gtp"),
pads=data_pads,
sys_clk_freq=sys_clk_freq)
self.csr_devices.append("drtio_transceiver")
@ -209,6 +226,9 @@ class GenericMaster(SoCCore):
self.submodules.rtio_crg = RTIOClockMultiplier(rtio_clk_freq)
self.csr_devices.append("rtio_crg")
self.rustc_cfg["has_si5324"] = None
self.rustc_cfg["si5324_soft_reset"] = None
self.rtio_channels = []
has_grabber = any(peripheral["type"] == "grabber" for peripheral in description["peripherals"])
if has_grabber:
@ -309,7 +329,7 @@ class GenericSatellite(SoCCore):
platform.toolchain.bitstream_commands.extend([
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
])
ident = self.__class__.__name__
ident = description["variant"]
if self.acpki:
ident = "acpki_" + ident
SoCCore.__init__(self, platform=platform, csr_data_width=32, ident=ident)
@ -320,11 +340,12 @@ class GenericSatellite(SoCCore):
self.crg = self.ps7 # HACK for eem_7series to find the clock
self.submodules.rtio_crg = RTIOClockMultiplier(rtio_clk_freq)
self.csr_devices.append("rtio_crg")
self.rustc_cfg["has_rtio_crg"] = None
data_pads = [platform.request("sfp", i) for i in range(4)]
self.submodules.drtio_transceiver = gtx_7series.GTX(
clock_pads=platform.request("clk125_gtp"),
clock_pads=platform.request("clk_gtp"),
pads=data_pads,
sys_clk_freq=sys_clk_freq)
self.csr_devices.append("drtio_transceiver")
@ -393,9 +414,6 @@ class GenericSatellite(SoCCore):
self.add_memory_group("drtioaux_mem", drtioaux_memory_group)
self.add_csr_group("drtiorep", drtiorep_csr_group)
self.rustc_cfg["has_si5324"] = None
self.rustc_cfg["si5324_soft_reset"] = None
if self.acpki:
self.rustc_cfg["ki_impl"] = "acp"
self.submodules.rtio = acpki.KernelInitiator(self.rtio_tsc,

@ -71,6 +71,19 @@ class RTIOCRG(Module, AutoCSR):
]
class SMAClkinForward(Module):
def __init__(self, platform):
sma_clkin = platform.request("user_sma_clock")
sma_clkin_se = Signal()
si5324_clkin_se = Signal()
si5324_clkin = platform.request("si5324_clkin")
self.specials += [
Instance("IBUFDS", i_I=sma_clkin.p, i_IB=sma_clkin.n, o_O=sma_clkin_se),
Instance("ODDR", i_C=sma_clkin_se, i_CE=1, i_D1=1, i_D2=0, o_Q=si5324_clkin_se),
Instance("OBUFDS", i_I=si5324_clkin_se, o_O=si5324_clkin.p, o_OB=si5324_clkin.n)
]
# The NIST backplanes require setting VADJ to 3.3V by reprogramming the power supply.
# This also changes the I/O standard for some on-board LEDs.
leds_fmc33 = [
@ -205,6 +218,8 @@ class _MasterBase(SoCCore):
platform.request("user_sma_mgt")
]
self.submodules += SMAClkinForward(self.platform)
# 1000BASE_BX10 Ethernet compatible, 125MHz RTIO clock
self.submodules.drtio_transceiver = gtx_7series.GTX(
clock_pads=platform.request("si5324_clkout"),
@ -296,10 +311,9 @@ class _MasterBase(SoCCore):
self.submodules.rtio_dma = dma.DMA(self.ps7.s_axi_hp0)
self.csr_devices.append("rtio_dma")
self.submodules.local_io = SyncRTIO(self.rtio_tsc, rtio_channels)
self.submodules.cri_con = rtio.CRIInterconnectShared(
[self.rtio.cri, self.rtio_dma.cri],
[self.local_io.cri] + self.drtio_cri,
[self.rtio_core.cri] + self.drtio_cri,
mode="sync", enable_routing=True)
self.csr_devices.append("cri_con")
@ -431,6 +445,7 @@ class _SatelliteBase(SoCCore):
self.submodules.rtio_crg = RTIOClockMultiplier(self.sys_clk_freq)
self.csr_devices.append("rtio_crg")
self.rustc_cfg["has_rtio_crg"] = None
fix_serdes_timing_path(self.platform)
def add_rtio(self, rtio_channels):

@ -26,6 +26,6 @@ void = { version = "1", default-features = false }
io = { path = "../libio", features = ["byteorder"] }
libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git"}
libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git"}
libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["fat_lfn"] }
libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }

@ -58,20 +58,17 @@ impl fmt::Display for RoutingTable {
pub fn config_routing_table(default_n_links: usize, cfg: &Config) -> RoutingTable {
let mut ret = RoutingTable::default_master(default_n_links);
if let Ok(data) = cfg.read("routing_table") {
if data.len() == DEST_COUNT*MAX_HOPS
{
if data.len() == DEST_COUNT*MAX_HOPS {
for i in 0..DEST_COUNT {
for j in 0..MAX_HOPS {
ret.0[i][j] = data[i*MAX_HOPS+j];
}
}
} else {
warn!("length of the configured routing table is incorrect, using default");
}
else {
warn!("length of the routing table is incorrect, using default");
}
}
else {
warn!("could not read routing table from configuration, using default");
} else {
info!("could not read routing table from configuration, using default");
}
info!("routing table: {}", ret);
ret

@ -3,6 +3,7 @@ use crc;
use core_io::{ErrorKind as IoErrorKind, Error as IoError};
use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
use libboard_zynq::{timer::GlobalTimer, time::Milliseconds};
use libcortex_a9::asm::dmb;
use crate::mem::mem::DRTIOAUX_MEM;
use crate::pl::csr::DRTIOAUX;
use crate::drtioaux_proto::Error as ProtocolError;
@ -57,14 +58,15 @@ pub fn has_rx_error(linkno: u8) -> bool {
}
}
pub fn copy_work_buffer(src: *mut u16, dst: *mut u16, len: isize) {
pub fn copy_work_buffer(src: *mut u32, dst: *mut u32, len: isize) {
// AXI writes must be 4-byte aligned (drtio proto doesn't care for that),
// and AXI burst reads/writes are not implemented yet in gateware
// thus the need for a work buffer for transmitting and copying it over
unsafe {
for i in (0..(len/2)).step_by(2) {
for i in 0..(len/4) {
*dst.offset(i) = *src.offset(i);
*dst.offset(i+1) = *src.offset(i+1);
//data memory barrier to prevent bursts
dmb();