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161 Commits

Author SHA1 Message Date
mwojcik f4ceca464f drtio: change async messages to sync 12 hours ago
morgan f3dcd53086 firmware: fix zc706 compilation warnings
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
1 week ago
morgan b3856e879b refactor `write_rustc_cfg_file()` 2 weeks ago
morgan 1ccae0d442 consolidate all `write..file()` into `config.py` 2 weeks ago
morgan 2c19f4ac31 replace rustc_cfg[ ] & change write_rustc_cfg_file 2 weeks ago
Sebastien Bourdeauducq b23c822ad2 flake: fix cargo hash 2 weeks ago
Sebastien Bourdeauducq 85ecff2cc1 cargo: update zynq-rs 2 weeks ago
Sebastien Bourdeauducq 3a305c8cac Revert "cargo: update dependencies"
This reverts commit 38b0799bb0.
2 weeks ago
Sebastien Bourdeauducq 38b0799bb0 cargo: update dependencies 2 weeks ago
Sebastien Bourdeauducq b87ec32438 cargo: update dependencies 2 weeks ago
morgan 615f2e3d37 remove misleading 'Actively' from docs at main.rs 2 weeks ago
Sebastien Bourdeauducq 37df7fd45b cargo fmt 3 weeks ago
Sebastien Bourdeauducq c9b574f5c7 flake: update dependencies 3 weeks ago
morgan 2ac7eedec1 firmware: fix compilation without virtual LEDs
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
3 weeks ago
MorganTL c61017fbe6 fix compiling error when cfg has has_rtio_moninj 3 weeks ago
MorganTL 0e6309b95e change write_rustc_cfg_file to follow artiq repo 3 weeks ago
morgan 1516327c26 firmware: fix zc706 compilation error
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
3 weeks ago
morgan 622d267d55 add virtual LEDs, improve IO expander setup, drive TX_DISABLE
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
3 weeks ago
linuswck 4ae8557018 drtio: remame drtio_transceiver to gt_drtio
Co-authored-by: linuswck <linuswck@m-labs.hk>
Co-committed-by: linuswck <linuswck@m-labs.hk>
4 weeks ago
Sebastien Bourdeauducq dc08c382a2 satman: wait longer for PLL lock (#246) 1 month ago
Sebastien Bourdeauducq 583b629b40 flake: update dependencies 2 months ago
Sebastien Bourdeauducq ca17cd419e Revert "kasli_soc: add SFP0..3 LED indication"
This reverts commit 5111778363.
2 months ago
Sebastien Bourdeauducq c5e21a573c flake: update dependencies 2 months ago
morgan 5111778363 kasli_soc: add SFP0..3 LED indication
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2 months ago
Sebastien Bourdeauducq 3076a35796 flake: update dependencies 2 months ago
Sebastien Bourdeauducq ee438105b2 json: base -> drtio_role 3 months ago
Sebastien Bourdeauducq 339e824511 flake: update dependencies 3 months ago
Sebastien Bourdeauducq f52c155006 flake: fix and cleanup builds 4 months ago
Sebastien Bourdeauducq 4c605f21c9 flake: update dependencies 4 months ago
Sebastien Bourdeauducq f1ee3a7584 rustfmt 4 months ago
Sebastien Bourdeauducq 165b1400ab flake: update dependencies 4 months ago
Denis Ovchinnikov 63594d7e3d update configuration of IBUFDS_GTE2
Input clock is terminated internally with 50 Ohm on each leg and to 4/5 MGTAVCC.
4 months ago
mwojcik 5e6dca61a9 analyzer: fix overflow behavior 4 months ago
mwojcik b6247f409d analyzer: fix warnings on standalone 4 months ago
Sebastien Bourdeauducq ddb3703f50 flake: update dependencies, nixpkgs 23.05 4 months ago
mwojcik 6088e6bb6f fix cargo fmt 4 months ago
mwojcik ad076dd4e9 zc706: fix satellite analyzer target 4 months ago
Sebastien Bourdeauducq 9aabaacb21 flake: update dependencies 4 months ago
mwojcik a27b450def runtime: port drtio-enabled analyzer 4 months ago
mwojcik c536a70890 satellite gateware: add rtio analyzer 4 months ago
mwojcik 259b0ba1b7 satellite: port analyzer, drtio packets 4 months ago
Sebastien Bourdeauducq c5aac198f2 README: update copyright year 5 months ago
Sebastien Bourdeauducq 87615017fa README: update use instructions 5 months ago
Sebastien Bourdeauducq 731b6a89dd flake: update dependencies 5 months ago
mwojcik cbc660e740 ddma: pass "uses_ddma" flag 5 months ago
Sebastien Bourdeauducq 0046091605 flake: update dependencies 5 months ago
Jonathan Coates 8cb6cf6094 Fix mismatched signatures for the wide interface
Lists are passed by-reference from python code, and so should be
&CSlice<_> not CSlice<_>.
5 months ago
Egor Savkin c6fcc4e351 Add ext0_synth0_80to125 option to the clocker config
Signed-off-by: Egor Savkin <es@m-labs.hk>
5 months ago
Sebastien Bourdeauducq bf50a44f76 cargo fmt 6 months ago
Sebastien Bourdeauducq 64cadd90f5 fix imports 6 months ago
Sebastien Bourdeauducq 93423dd145 README: update instructions 6 months ago
Sebastien Bourdeauducq 2802938702 flake: update dependencies 6 months ago
Sebastien Bourdeauducq 271a1adb04 firmware: improve RTIO map error reporting 6 months ago
mwojcik b747abe83c qc2: add 4 edge counters to the end of rtio 6 months ago
mwojcik 48721ca9cb apply rustfmt policies to ddma code 6 months ago
mwojcik 90071f7620 Master: DDMA support
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
6 months ago
mwojcik 908dfc780e satman: add dma support 6 months ago
mwojcik 4b1ce1a6ff satellites: add rtio_dma, connect as cri master 6 months ago
Sebastien Bourdeauducq 4c87487fe1 flake: update dependencies 7 months ago
Egor Savkin a519d24074 firmware: create and apply rustfmt policy
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
7 months ago
mwojcik dce37a52aa KasliSoC satellite: fix serdes timing 7 months ago
Egor Savkin d72a2e7d07 fix previous commit
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
7 months ago
Egor Savkin 05c22792d6 satman: drive SFP TX_DISABLE
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
7 months ago
mwojcik dcc5cc7555 satellite: add Error LED on panic 7 months ago
mwojcik 46b2687d70 RTIO/SYS Clock merge
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
7 months ago
sb10q b85c870b82 runtime: drive SFP TX_DISABLE 7 months ago
Egor Savkin ca6e0d13ad Remove virtual LEDs from io_expander
Signed-off-by: Egor Savkin <es@m-labs.hk>
7 months ago
Egor Savkin b4b7912c40 Port tx_disable-related code from Kasli
Signed-off-by: Egor Savkin <es@m-labs.hk>
7 months ago
Egor Savkin 8230a01701 Build io_expander
Signed-off-by: Egor Savkin <es@m-labs.hk>
7 months ago
Egor Savkin 4bc936f071 Copy io expander from kasli
Signed-off-by: Egor Savkin <es@m-labs.hk>
7 months ago
David Nadlinger df4988c774 rpc: Port over size/alignment fix for structs (tuples) with tail padding
This ports over the following commits from the main ARTIQ repo:
 - 8740ec3dd52d85084237797881ea137492bfe070
 - dbbe8e8ed4f852e623775b7bd3aec818cdd03376
 - b9f13d48aa7e2c0652210152b971b21c3c419347
8 months ago
Sebastien Bourdeauducq 800c12e794 fix resolve_channel_name typing 8 months ago
Egor Savkin d36899b485 firmware: unify RTIO error message format
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
9 months ago
Egor Savkin 6b3fa98d70 add channel names to RTIO errors
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
9 months ago
Sebastien Bourdeauducq 4a522ecb3b update ramda and migen-axi 9 months ago
Sebastien Bourdeauducq 6be5ffe4e4 update flake dependencies 9 months ago
Egor Savkin 44ef13d1c0 Fix idle/startup_kernel typos in config
Signed-off-by: Egor Savkin <es@m-labs.hk>
9 months ago
David Nadlinger 8e0229d265 si5324: crystal_{ref -> as_ckin2} [nfc]
This makes it clear that by itself, the flag does not
cause the input mux to be changed.
9 months ago
David Nadlinger 2ddb4d259f Undo most of Si5324 unification (5c054cc901)
This reverts most of 5c054cc901, as it turns out that
si5324::setup is in fact also used to configure the
chip for operation as a DRTIO satellite.
9 months ago
David Nadlinger 5c054cc901 Unify Si5324 setup code with main ARTIQ repository [nfc]
I chose the version from the main repository for two
reasons:
 - Explicitly specifying si5324_ref_input every time would
   not work for the different Kasli/… hardware versions.
 - Having `crystal_ref` as a setting in the configuration
   is misleading if it does not actually activate the crystal
   for use as a reference (but rather does
   `route_crystal_to_ckin2`).

Related m-labs/artiq commits:
 - 740543d4e284245248e3ff838c46505938dcae7a
 - 3c7a394eff553ab75a7ea78bdd17830366504dc6
9 months ago
Sebastien Bourdeauducq c281505aa0 flake: fix cargo hash 10 months ago
Sebastien Bourdeauducq db0e41af6d update zynq-rs and some Rust deps 10 months ago
Sebastien Bourdeauducq a07ebb4dc0 flake: nixos 22.11 10 months ago
Sebastien Bourdeauducq d5402d899f flake: update dependencies 11 months ago
Sebastien Bourdeauducq bbecead9a3 examples: fix ref_multiplier 11 months ago
mwojcik c834e4f503 enable network and mgmt during Rust panic, make RTIO PLL lock failure a panic
Closes #198 #200

Making it a soft panic makes it more involved with a bit of code duplication - setting up mgmt requires setting up the interface and sockets. Maybe can be done a bit cleaner.

```
[spaqin@hera:~/m-labs/artiq-zynq]$ artiq_sinara_tester
****** Sinara system tester ******
[...]
ConnectionRefusedError: [Errno 111] Connection refused

[spaqin@hera:~/m-labs/artiq-zynq]$ artiq_coremgmt -D 192.168.1.56 log
[     0.000067s]  INFO(runtime): NAR3/Zynq7000 starting...
[     0.005238s]  INFO(runtime): detected gateware: GenericMaster
[     0.016152s]  INFO(libboard_zynq::i2c): PCA9548 detected
[     0.023004s]  WARN(runtime): config initialization failed: SD error: Card initialization error: No card inserted, check if the card is inserted properly.
[     0.036730s]  WARN(runtime::rtio_clocking): error reading configuration. Falling back to default.
[     0.213000s] ERROR(runtime::rtio_clocking): RTIO PLL failed to lock
[     0.224443s]  INFO(libboard_zynq::i2c): PCA9548 detected
[     0.256197s]  INFO(runtime::comms): network addresses: MAC=e8-eb-1b-13-49-8b IPv4=192.168.1.56 IPv6-LL=fe80::eaeb:1bff:fe13:498b IPv6: no configured address
[     0.270183s] ERROR(runtime::comms): There has been an error configuring the device: RTIO PLL failed to lock. Only mgmt interface will be available.
[     4.000095s]  INFO(libboard_zynq::eth): eth: got Link { speed: S1000, duplex: Full }
[    33.148521s]  INFO(runtime::mgmt): received connection
```

Reviewed-on: M-Labs/artiq-zynq#199
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
11 months ago
mwojcik dc862a9051 match ident message with mainline 11 months ago
mwojcik 19e60073de kasli_soc: ident = variant name 11 months ago
Egor Savkin a546d0f95b Implement reboot for artiq_coremgmt 12 months ago
Sebastien Bourdeauducq d6ae646790 update dependencies 12 months ago
Sebastien Bourdeauducq 38f4d6cd2e flake: export packages 1 year ago
Sebastien Bourdeauducq f3310324d7 update dependencies 1 year ago
Sebastien Bourdeauducq 4a4f7b0ddc flake: update dependencies 1 year ago
Sebastien Bourdeauducq 0812f22423 update dependencies 1 year ago
Sebastien Bourdeauducq 014ff23daf README: update required versions 1 year ago
kk105 b638fce069 update SEEN_ASYNC_ERRORS in destination_survey (#195)
Co-authored-by: kk105 <kkl@m-kabs.hk>
Reviewed-on: M-Labs/artiq-zynq#195
Co-authored-by: kk105 <kkl@m-labs.hk>
Co-committed-by: kk105 <kkl@m-labs.hk>
1 year ago
Sebastien Bourdeauducq ac4887ea33 flake: do not use __impure (breaks hydra) 1 year ago
Sebastien Bourdeauducq edf1999bb2 flake: update dependencies, rebuild with nix 2.8 1 year ago
occheung 9ec6a1feab dyld/rebind: support rela generation with nac3ld 1 year ago
occheung 8e144e41de reloc: impl ARM_PREL31 handling 1 year ago
occheung 512b6bac12 reloc: add PC-relative relocation support 1 year ago
occheung e3ed41ff32 fix index table reference type 1 year ago
occheung 97a63ca8d0 dyld: add EXIDX entry type
The type is just for aesthetic. The interpretation of an index table entry is not our concern.
1 year ago
Sebastien Bourdeauducq d652f01379 flake: update dependencies 1 year ago
Sebastien Bourdeauducq d6ef5fd064 flake: update dependencies 1 year ago
occheung f0febe0ee4 change catch type to single reference 1 year ago
mwojcik dce8c974eb flake: remove unnecessary output 1 year ago
mwojcik 01339c9e78 flake: expose build, allow selection of output 1 year ago
Sebastien Bourdeauducq fa1f300067 flake: support impure derivation for HITL tests 1 year ago
Sebastien Bourdeauducq 191a22f506 flake: update artiq/nixpkgs 1 year ago
mwojcik 3e3fb207a5 flake: update dependencies 1 year ago
mwojcik abeaf5aca7 Revert "flake: update dependencies"
This reverts commit e20c77650d.
1 year ago
mwojcik e20c77650d flake: update dependencies 1 year ago
mwojcik 7a8f96dbd9 rtio_mgt: use mutex's async_lock 1 year ago
mwojcik 596edb480c cargo: update zynq-rs 1 year ago
mwojcik 4f457d9c24 moninj: log link down at debug level 1 year ago
mwojcik 24df52268e moninj: restructure timeout
stop logging errors if satellite is unavailable
drtio: don't even send message if link is down
1 year ago
mwojcik 48c9b43171 moninj: make it use async drtioaux 1 year ago
mwojcik 57d7f01b04 drtio: port 64-bit padding from mainline 1 year ago
mwojcik efc432352e zc706: no syncrtio for master, fixes hangs (#188) 1 year ago
mwojcik 88ffd3b77b flake: fix artiq package in zc706-hitl-tests 1 year ago
mwojcik 07210c7b09 flake: fix szl for hitl tests 1 year ago
mwojcik 1cd704c390 flake: fix szl for hitl tests 1 year ago
mwojcik 715a2dd04c flake: move hitl tests from nix-scripts to flake 1 year ago
mwojcik def4d989cd kasli_soc: fix si5324 pins routed to GTX 1 year ago
Sebastien Bourdeauducq f9a8c76654 flake: update dependencies 1 year ago
mwojcik 1d731a3589 zc706 master: route sma clock to si5324 1 year ago
mwojcik 3cf86a6335 satellites: add rtio_crg cfg 1 year ago
mwojcik 78bc162749 rtio_clocking: remove loop 1 year ago
Sebastien Bourdeauducq b974d7ddee flake: update dependencies 1 year ago
mwojcik 2c5de32a4c flake: update libasync sha256 1 year ago
mwojcik 5a7dbb3f29 flake: update sypico dependency (fix duplicate) 1 year ago
Sebastien Bourdeauducq d27d06f960 flake: update dependencies 1 year ago
mwojcik 14f7778732 update libconfig features 1 year ago
mwojcik dcfb28ce61 fix drtioaux packet corruption
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
1 year ago
mwojcik 433a9cdaf1 runtime: fix warnings on nondrtio systems 2 years ago
Sebastien Bourdeauducq a79bef2243 runtime: provide/fix more libc mem functions 2 years ago
Sebastien Bourdeauducq 7b21889055 README: fix gateware build command 2 years ago
Sebastien Bourdeauducq c6ef9b117c fix previous commit 2 years ago
Sebastien Bourdeauducq dcfaf587ec firmware: add UnwrapNoneError exception 2 years ago
mwojcik a92561b9d3 implement rtio_get_destination_status (#177)
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2 years ago
Sebastien Bourdeauducq dc54d5f9b6 update artiq/vivado 2 years ago
Sebastien Bourdeauducq 161044e78f drop support for big-endian moninj 2 years ago
Sebastien Bourdeauducq 32f3c636c5 update artiq, work around annoying nix2.5 bug 2 years ago
Sebastien Bourdeauducq 50cafad18b update artiq 2 years ago
Sebastien Bourdeauducq 426500d2f9 firmware: support 64-bit moninj probes 2 years ago
Sebastien Bourdeauducq ebdb08180d drtio: demote default routing table message to info 2 years ago
Sebastien Bourdeauducq 0530e596ba mgmt: remove spurious config write warning 2 years ago
Sebastien Bourdeauducq 7502f3a765 update dependencies 2 years ago
Sebastien Bourdeauducq fa237088a0 hydra/nixUnstable flake.lock annoyance (2) 2 years ago
Sebastien Bourdeauducq ad557edd58 hydra/nixUnstable flakes.lock annoyance 2 years ago
Sebastien Bourdeauducq f5fa5532b6 flake: update artiq 2 years ago
pca006132 ae0d724bf8 runtime: use &CSlice for lists 2 years ago
occheung 6c834899e9 si5324: fix clock source 2 years ago
occheung a22b13cc46 kasli_soc: forward SMA clkin 2 years ago
spaqin 85e5c08d7f kasli_soc: use si5324 in master 2 years ago
spaqin 3c17362fad satman: fix i2cswitch 2 years ago
spaqin 4f2a0986da rtio_clocking: fix wrong descriptions 2 years ago
spaqin 4a2218641f fix BorrowMutError in moninj 2 years ago
mwojcik 9a06cd9d27 expose pca954x_select api (#167)
PR accompanying to ARTIQ's PCA954X support (#1860).
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2 years ago
Sebastien Bourdeauducq b56b50b147 add comment about EXCEPTION_ID_LOOKUP sync 2 years ago

@ -4,14 +4,13 @@ ARTIQ on Zynq
How to use
----------
1. Install ARTIQ-6 or newer.
2. Select the latest successful build on Hydra: https://nixbld.m-labs.hk/jobset/artiq/zynq
3. Search for the job named ``<board>-<variant>-sd`` (for example: ``zc706-nist_clock-sd`` or ``zc706-nist_qc2-sd``).
4. Download the ``boot.bin`` "binary distribution" and place it at the root of a FAT-formatted SD card.
5. Optionally, create a ``config.txt`` configuration file at the root of the SD card containing ``key=value`` pairs on each line. Use the ``ip``, ``ip6`` and ``mac`` keys to respectively set the IPv4, IPv6 and MAC address of the board. Configuring an IPv6 address is entirely optional. If these keys are not found, the firmware will use default values that may or may not be compatible with your network.
6. Insert the SD card into the board and set up the board to boot from the SD card. For the ZC706, this is achieved by placing the large DIP switch SW11 in the 00110 position.
7. Power up the board. After the firmware starts successfully, it should respond to ping at its IP addresses, and boot messages can be observed from its UART at 115200bps.
8. Create and use an ARTIQ device database as usual, but set ``"target": "cortexa9"`` in the arguments of the core device.
1. Install the ARTIQ version that corresponds to the artiq-zynq version you are targeting.
2. To obtain firmware binaries, select the latest successful build on [Hydra](https://nixbld.m-labs.hk/) for the targeted artiq-zynq version, or use AFWS. If using Hydra, search for the job named ``<board>-<variant>-sd`` (for example: ``zc706-nist_clock-sd`` or ``zc706-nist_qc2-sd``).
3. Place the ``boot.bin`` file, obtained from Hydra's "binary distribution" download link or from AFWS, at the root of a FAT-formatted SD card.
4. Optionally, create a ``config.txt`` configuration file at the root of the SD card containing ``key=value`` pairs on each line. Use the ``ip``, ``ip6`` and ``mac`` keys to respectively set the IPv4, IPv6 and MAC address of the board. Configuring an IPv6 address is entirely optional. If these keys are not found, the firmware will use default values that may or may not be compatible with your network.
5. Insert the SD card into the board and set up the board to boot from the SD card. For the ZC706, this is achieved by placing the large DIP switch SW11 in the 00110 position.
6. Power up the board. After the firmware starts successfully, it should respond to ping at its IP addresses, and boot messages can be observed from its UART at 115200bps.
7. Create and use an ARTIQ device database as usual, but set ``"target": "cortexa9"`` in the arguments of the core device.
Configuration
-------------
@ -33,7 +32,7 @@ not implemented as it seems not very useful.
Development instructions
------------------------
ARTIQ on Zynq is packaged using the [Nix](https://nixos.org) Flakes system. Install Nix 2.4+ and enable flakes by adding ``experimental-features = nix-command flakes`` to ``nix.conf`` (e.g. ``~/.config/nix/nix.conf``).
ARTIQ on Zynq is packaged using the [Nix](https://nixos.org) Flakes system. Install Nix 2.8+ and enable flakes by adding ``experimental-features = nix-command flakes`` to ``nix.conf`` (e.g. ``~/.config/nix/nix.conf``).
Pure build with Nix and execution on a remote JTAG server:
@ -47,7 +46,7 @@ Impure incremental build and execution on a remote JTAG server:
```shell
nix develop
cd src
gateware/zc706.py -g ../build/gateware -v <variant> # build gateware
gateware/zc706.py -g ../build/gateware -V <variant> # build gateware
make GWARGS="-V <variant>" <runtime/satman> # build firmware
cd ..
./remote_run.sh -i
@ -64,7 +63,7 @@ Notes:
License
-------
Copyright (C) 2019-2022 M-Labs Limited.
Copyright (C) 2019-2023 M-Labs Limited.
ARTIQ is free software: you can redistribute it and/or modify
it under the terms of the GNU Lesser General Public License as published by

@ -8,7 +8,7 @@ device_db = {
"arguments": {
"host": "192.168.1.52",
"ref_period": 1e-9,
"ref_multiplier": 1,
"ref_multiplier": 8,
"target": "cortexa9"
}
},
@ -59,6 +59,14 @@ device_db["ad9914dds1"] = {
"arguments": {"sysclk": 3e9, "bus_channel": 50, "channel": 1},
}
for i in range(4):
device_db["ttl"+str(i)+"_counter"] = {
"type": "local",
"module": "artiq.coredevice.edge_counter",
"class": "EdgeCounter",
"arguments": {"channel": 52+i}
}
# for ARTIQ test suite
device_db.update(
loop_out="ttl0",

@ -2,19 +2,20 @@
"nodes": {
"artiq": {
"inputs": {
"artiq-comtools": "artiq-comtools",
"mozilla-overlay": "mozilla-overlay",
"nixpkgs": "nixpkgs",
"sipyco": "sipyco",
"src-migen": "src-migen",
"src-misoc": "src-misoc",
"src-pythonparser": "src-pythonparser",
"src-sipyco": "src-sipyco"
"src-pythonparser": "src-pythonparser"
},
"locked": {
"lastModified": 1644375232,
"narHash": "sha256-jd8sAlAz6xGQoxiRUV5ChtEjdjh4pdIksUPsqftcK5s=",
"ref": "master",
"rev": "a0070d4396136b84e0a50a1c57ee72bcf4e7f6f9",
"revCount": 7961,
"lastModified": 1693998161,
"narHash": "sha256-GbJbBQF8i0FrBOecaAGJFv+0i37wLPgy0uoeyuiq4IM=",
"ref": "refs/heads/master",
"rev": "2f3329181c2579ed77334e5875e8698a804be91d",
"revCount": 8495,
"type": "git",
"url": "https://github.com/m-labs/artiq.git"
},
@ -23,14 +24,58 @@
"url": "https://github.com/m-labs/artiq.git"
}
},
"artiq-comtools": {
"inputs": {
"flake-utils": "flake-utils",
"nixpkgs": [
"artiq",
"nixpkgs"
],
"sipyco": [
"artiq",
"sipyco"
]
},
"locked": {
"lastModified": 1693473687,
"narHash": "sha256-BdLddCWbvoEyakcGwhph9b5dIU1iA0hCQV7KYgU8nos=",
"owner": "m-labs",
"repo": "artiq-comtools",
"rev": "f522ef3dbc65961f17b2d3d41e927409d970fd79",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "artiq-comtools",
"type": "github"
}
},
"flake-utils": {
"inputs": {
"systems": "systems"
},
"locked": {
"lastModified": 1692799911,
"narHash": "sha256-3eihraek4qL744EvQXsK1Ha6C3CR7nnT8X2qWap4RNk=",
"owner": "numtide",
"repo": "flake-utils",
"rev": "f9e7cf818399d17d347f847525c5a5a8032e4e44",
"type": "github"
},
"original": {
"owner": "numtide",
"repo": "flake-utils",
"type": "github"
}
},
"mozilla-overlay": {
"flake": false,
"locked": {
"lastModified": 1643634764,
"narHash": "sha256-EcFlgzZnZSHwZixELYV1pa267t+u5mCeLhSNBeAA/+c=",
"lastModified": 1690536331,
"narHash": "sha256-aRIf2FB2GTdfF7gl13WyETmiV/J7EhBGkSWXfZvlxcA=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "f233fdc4ff6ba2ffeb1e3e3cd6d63bb1297d6996",
"rev": "db89c8707edcffefcd8e738459d511543a339ff5",
"type": "github"
},
"original": {
@ -42,11 +87,11 @@
"mozilla-overlay_2": {
"flake": false,
"locked": {
"lastModified": 1643634764,
"narHash": "sha256-EcFlgzZnZSHwZixELYV1pa267t+u5mCeLhSNBeAA/+c=",
"lastModified": 1690536331,
"narHash": "sha256-aRIf2FB2GTdfF7gl13WyETmiV/J7EhBGkSWXfZvlxcA=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "f233fdc4ff6ba2ffeb1e3e3cd6d63bb1297d6996",
"rev": "db89c8707edcffefcd8e738459d511543a339ff5",
"type": "github"
},
"original": {
@ -58,11 +103,11 @@
"mozilla-overlay_3": {
"flake": false,
"locked": {
"lastModified": 1638887313,
"narHash": "sha256-FMYV6rVtvSIfthgC1sK1xugh3y7muoQcvduMdriz4ag=",
"lastModified": 1690536331,
"narHash": "sha256-aRIf2FB2GTdfF7gl13WyETmiV/J7EhBGkSWXfZvlxcA=",
"owner": "mozilla",
"repo": "nixpkgs-mozilla",
"rev": "7c1e8b1dd6ed0043fb4ee0b12b815256b0b9de6f",
"rev": "db89c8707edcffefcd8e738459d511543a339ff5",
"type": "github"
},
"original": {
@ -73,16 +118,16 @@
},
"nixpkgs": {
"locked": {
"lastModified": 1643503720,
"narHash": "sha256-tJic20ufuRnG8V+fTCd3YU6xl1ImxNspoEkXHct0AG4=",
"lastModified": 1693771906,
"narHash": "sha256-32EnPCaVjOiEERZ+o/2Ir7JH9pkfwJZJ27SKHNvt4yk=",
"owner": "NixOS",
"repo": "nixpkgs",
"rev": "0f316e4d72daed659233817ffe52bf08e081b5de",
"rev": "da5adce0ffaff10f6d0fee72a02a5ed9d01b52fc",
"type": "github"
},
"original": {
"owner": "NixOS",
"ref": "nixos-21.11",
"ref": "nixos-23.05",
"repo": "nixpkgs",
"type": "github"
}
@ -94,14 +139,35 @@
"zynq-rs": "zynq-rs"
}
},
"sipyco": {
"inputs": {
"nixpkgs": [
"artiq",
"nixpkgs"
]
},
"locked": {
"lastModified": 1693473454,
"narHash": "sha256-kr8Ur6JNW/xVRHdPn3ou980IAxg/n+f3ZQBHuJ1uaC4=",
"owner": "m-labs",
"repo": "sipyco",
"rev": "5467dcf9738673ab9a49e6f2377bda7c551b5f90",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "sipyco",
"type": "github"
}
},
"src-migen": {
"flake": false,
"locked": {
"lastModified": 1639659493,
"narHash": "sha256-qpVj/yJf4hDDc99XXpVPH4EbLC8aCmEtACn5qNc3DGI=",
"lastModified": 1693990700,
"narHash": "sha256-qJLA03QcZ5S9DrqrseuzIQBTWS7rjAbYJxLYZEQ8rxA=",
"owner": "m-labs",
"repo": "migen",
"rev": "ac703010eaa06ac9b6e32f97c6fa98b15de22b31",
"rev": "2cfee3e0db6fdca9b5918686ea77c93252e7cebd",
"type": "github"
},
"original": {
@ -113,11 +179,11 @@
"src-misoc": {
"flake": false,
"locked": {
"lastModified": 1641889368,
"narHash": "sha256-0Ai25lry9ju1HxFmfMRNKG8mamBqvw+kvDfpuK8Dtjo=",
"ref": "master",
"rev": "7242dc5a41732135425acc4871487461dfae6c66",
"revCount": 2419,
"lastModified": 1693709836,
"narHash": "sha256-YiCk05RYLzZu1CYkQ2r7XtjwVEqkUGTQn388uOls9tI=",
"ref": "refs/heads/master",
"rev": "58dc4ee60d165ce9145cf3d904241fc154b6407f",
"revCount": 2448,
"submodules": true,
"type": "git",
"url": "https://github.com/m-labs/misoc.git"
@ -144,19 +210,18 @@
"type": "github"
}
},
"src-sipyco": {
"flake": false,
"systems": {
"locked": {
"lastModified": 1641866796,
"narHash": "sha256-TSH0IgNbi9IcMcBDb2nWRphKlxstbWeATjrGbi6K2m0=",
"owner": "m-labs",
"repo": "sipyco",
"rev": "b04234c49379cd446d4cb3346d4741868d86841a",
"lastModified": 1681028828,
"narHash": "sha256-Vy1rq5AaRuLzOxct8nz4T6wlgyUR7zLU309k9mBC768=",
"owner": "nix-systems",
"repo": "default",
"rev": "da67096a3b9bf56a91d16901293e51ba5b49a27e",
"type": "github"
},
"original": {
"owner": "m-labs",
"repo": "sipyco",
"owner": "nix-systems",
"repo": "default",
"type": "github"
}
},
@ -169,11 +234,11 @@
]
},
"locked": {
"lastModified": 1644558411,
"narHash": "sha256-PC/gVlVLmtZCv1Tw8Xz5ZCTxqmS2osncg5hlt9BoJ/8=",
"ref": "master",
"rev": "3e95df1f640aa761740feaf9eec797acb58dd942",
"revCount": 604,
"lastModified": 1693479539,
"narHash": "sha256-MppR7yxs3cjG7tQc82vX0MhyN71CJL2QWkM65F5hrFU=",
"ref": "refs/heads/master",
"rev": "c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054",
"revCount": 628,
"type": "git",
"url": "https://git.m-labs.hk/m-labs/zynq-rs"
},

@ -12,6 +12,7 @@
zynqpkgs = zynq-rs.packages.x86_64-linux;
artiqpkgs = artiq.packages.x86_64-linux;
rust = zynq-rs.rust;
rustPlatform = zynq-rs.rustPlatform;
fastnumbers = pkgs.python3Packages.buildPythonPackage rec {
@ -37,63 +38,52 @@
ramda = pkgs.python3Packages.buildPythonPackage {
pname = "ramda";
version = "unstable-2019-02-01";
version = "unstable-2020-04-11";
src = pkgs.fetchFromGitHub {
owner = "peteut";
repo = "ramda.py";
rev = "bd58f8e69d0e9a713d9c1f286a1ac5e5603956b1";
sha256 = "0qzd5yp9lbaham8p1wiymdjapzbqsli7lvngv24c3z4ybd9jlq9g";
rev = "d315a9717ebd639366bf3fe26bad9e3d08ec3c49";
sha256 = "sha256-bmSt/IHDnULsZjsC6edELnNH7LoJSVF4L4XhwBAXRkY=";
};
nativeBuildInputs = with pkgs.python3Packages; [ pbr ];
propagatedBuildInputs = with pkgs.python3Packages; [ future fastnumbers ];
checkInputs = with pkgs.python3Packages; [ pytest pytest-flake8 ];
checkInputs = with pkgs.python3Packages; [ pytest ];
checkPhase = "pytest";
doCheck = false;
preBuild = ''
export PBR_VERSION=0.0.1
export PBR_VERSION=0.5.5
'';
};
migen-axi = pkgs.python3Packages.buildPythonPackage {
pname = "migen-axi";
version = "unstable-2021-09-15";
version = "unstable-2023-01-06";
src = pkgs.fetchFromGitHub {
owner = "peteut";
repo = "migen-axi";
rev = "9763505ee96acd7572280a2d1233721342dc7c3f";
sha256 = "15c7g05n183rka66fl1glzp6h7xjlpy1p6k8biry24dangsmxmvg";
rev = "27eaa84a70a3abfe1930c86c36c4de2cd652da35";
sha256 = "sha256-3Y9W5ns+1wbVd14iePzgSBzE+LxnGMUDtUw3BccFt80=";
};
nativeBuildInputs = with pkgs.python3Packages; [ pbr ];
propagatedBuildInputs = with pkgs.python3Packages; [ setuptools click numpy toolz jinja2 ramda artiqpkgs.migen artiqpkgs.misoc ];
format = "pyproject";
postPatch = ''
substituteInPlace requirements.txt \
--replace "jinja2==2.11.3" "jinja2"
substituteInPlace requirements.txt \
--replace "future==0.18.2" "future"
substituteInPlace requirements.txt \
--replace "ramda==0.5.5" "ramda"
substituteInPlace requirements.txt \
--replace "colorama==0.4.3" "colorama"
substituteInPlace requirements.txt \
--replace "toolz==0.10.0" "toolz"
substituteInPlace requirements.txt \
--replace "pyserial==3.4" "pyserial"
substituteInPlace requirements.txt \
--replace "markupsafe==1.1.1" "markupsafe"
'';
propagatedBuildInputs = with pkgs.python3Packages; [ setuptools click numpy toolz jinja2 ramda artiqpkgs.migen artiqpkgs.misoc ];
checkInputs = with pkgs.python3Packages; [ pytest pytest-timeout pytest-flake8 ];
checkPhase = "pytest";
checkInputs = with pkgs.python3Packages; [ pytest-runner pytestCheckHook pytest-timeout ];
preBuild = ''
export PBR_VERSION=0.0.1
# migen/misoc version checks are broken with pyproject for some reason
postPatch = ''
substituteInPlace pyproject.toml \
--replace '"migen@git+https://github.com/m-labs/migen",' ""
substituteInPlace pyproject.toml \
--replace '"misoc@git+https://github.com/m-labs/misoc.git",' ""
# pytest-flake8 is broken with recent flake8. Re-enable after fix.
substituteInPlace setup.cfg --replace '--flake8' ""
'';
};
binutils = { platform, target, zlib }: pkgs.stdenv.mkDerivation rec {
@ -128,26 +118,24 @@
fwtype = if builtins.elem variant sat_variants then "satman" else "runtime";
firmware = rustPlatform.buildRustPackage rec {
name = "firmware";
src = ./src;
cargoLock = {
lockFile = src/Cargo.lock;
outputHashes = {
"libasync-0.0.0" = "sha256-PC/gVlVLmtZCv1Tw8Xz5ZCTxqmS2osncg5hlt9BoJ/8=";
"libasync-0.0.0" = "sha256-MppR7yxs3cjG7tQc82vX0MhyN71CJL2QWkM65F5hrFU=";
};
};
nativeBuildInputs = [
pkgs.gnumake
(pkgs.python3.withPackages(ps: (with artiqpkgs; [ ps.jsonschema migen migen-axi misoc artiq ])))
artiqpkgs.artiq
(pkgs.python3.withPackages(ps: [ ps.jsonschema artiqpkgs.migen migen-axi artiqpkgs.misoc artiqpkgs.artiq ]))
zynqpkgs.cargo-xbuild
pkgs.llvmPackages_9.llvm
pkgs.llvmPackages_9.clang-unwrapped
];
buildPhase = ''
export XARGO_RUST_SRC="${rustPlatform.rust.rustc}/lib/rustlib/src/rust/library"
export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
export CLANG_EXTRA_INCLUDE_DIR="${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include"
export CARGO_HOME=$(mktemp -d cargo-home.XXX)
make TARGET=${target} GWARGS="${if json == null then "-V ${variant}" else json}" ${fwtype}
@ -167,8 +155,7 @@
gateware = pkgs.runCommand "${target}-${variant}-gateware"
{
nativeBuildInputs = [
(pkgs.python3.withPackages(ps: (with artiqpkgs; [ ps.jsonschema migen migen-axi misoc artiq ])))
artiqpkgs.artiq
(pkgs.python3.withPackages(ps: [ ps.jsonschema artiqpkgs.migen migen-axi artiqpkgs.misoc artiqpkgs.artiq ]))
artiqpkgs.vivado
];
}
@ -247,8 +234,109 @@
}
else {}
);
gateware-sim = pkgs.stdenv.mkDerivation {
name = "gateware-sim";
nativeBuildInputs = [
(pkgs.python3.withPackages(ps: [ artiqpkgs.migen migen-axi artiqpkgs.artiq ]))
];
phases = [ "buildPhase" ];
buildPhase =
''
python -m unittest discover ${self}/src/gateware -v
touch $out
'';
};
fmt-check = pkgs.stdenv.mkDerivation {
name = "fmt-check";
nativeBuildInputs = [
rust
];
phases = [ "buildPhase" ];
buildPhase =
''
cd ${self}/src
cargo fmt -- --check
touch $out
'';
};
# for hitl-tests
zc706-nist_qc2 = (build { target = "zc706"; variant = "nist_qc2"; });
zc706-hitl-tests = pkgs.stdenv.mkDerivation {
name = "zc706-hitl-tests";
__networked = true; # compatibility with old patched Nix
# breaks hydra, https://github.com/NixOS/hydra/issues/1216
#__impure = true; # Nix 2.8+
buildInputs = [
pkgs.netcat pkgs.openssh pkgs.rsync artiqpkgs.artiq artiq-netboot zynqpkgs.zc706-szl
];
phases = [ "buildPhase" ];
buildPhase =
''
export NIX_SSHOPTS="-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_ed25519"
LOCKCTL=$(mktemp -d)
mkfifo $LOCKCTL/lockctl
cat $LOCKCTL/lockctl | ${pkgs.openssh}/bin/ssh \
$NIX_SSHOPTS \
rpi-4 \
'mkdir -p /tmp/board_lock && flock /tmp/board_lock/zc706-1 -c "echo Ok; cat"' \
| (
# End remote flock via FIFO
atexit_unlock() {
echo > $LOCKCTL/lockctl
}
trap atexit_unlock EXIT
# Read "Ok" line when remote successfully locked
read LOCK_OK
echo Power cycling board...
(echo b; sleep 5; echo B; sleep 5) | nc -N -w6 192.168.1.31 3131
echo Power cycle done.
export USER=hydra
export OPENOCD_ZYNQ=${zynq-rs}/openocd
export SZL=${zynqpkgs.szl}
bash ${self}/remote_run.sh -h rpi-4 -o "$NIX_SSHOPTS" -d ${zc706-nist_qc2.zc706-nist_qc2-jtag}
echo Waiting for the firmware to boot...
sleep 15
echo Running test kernel...
artiq_run --device-db ${self}/examples/device_db.py ${self}/examples/mandelbrot.py
echo Running ARTIQ unit tests...
export ARTIQ_ROOT=${self}/examples
export ARTIQ_LOW_LATENCY=1
python -m unittest discover artiq.test.coredevice -v
touch $out
echo Completed
(echo b; sleep 5) | nc -N -w6 192.168.1.31 3131
echo Board powered off
)
'';
};
in rec {
packages.x86_64-linux = (build { target = "zc706"; variant = "nist_clock"; }) //
packages.x86_64-linux =
{
inherit fastnumbers artiq-netboot ramda migen-axi binutils-arm;
} //
(build { target = "zc706"; variant = "nist_clock"; }) //
(build { target = "zc706"; variant = "nist_clock_master"; }) //
(build { target = "zc706"; variant = "nist_clock_satellite"; }) //
(build { target = "zc706"; variant = "nist_clock_satellite_100mhz"; }) //
@ -268,13 +356,12 @@
(build { target = "kasli_soc"; variant = "master"; json = ./kasli-soc-master.json; }) //
(build { target = "kasli_soc"; variant = "satellite"; json = ./kasli-soc-satellite.json; });
hydraJobs = packages.x86_64-linux;
hydraJobs = packages.x86_64-linux // { inherit zc706-hitl-tests; inherit gateware-sim; inherit fmt-check; };
devShell.x86_64-linux = pkgs.mkShell {
name = "artiq-zynq-dev-shell";
buildInputs = with pkgs; [
rustPlatform.rust.rustc
rustPlatform.rust.cargo
rust
llvmPackages_9.llvm
llvmPackages_9.clang-unwrapped
gnumake
@ -288,11 +375,13 @@
artiqpkgs.vivado
binutils-arm
];
XARGO_RUST_SRC = "${rustPlatform.rust.rustc}/lib/rustlib/src/rust/library";
XARGO_RUST_SRC = "${rust}/lib/rustlib/src/rust/library";
CLANG_EXTRA_INCLUDE_DIR = "${pkgs.llvmPackages_9.clang-unwrapped.lib}/lib/clang/9.0.1/include";
OPENOCD_ZYNQ = "${zynq-rs}/openocd";
SZL = "${zynqpkgs.szl}";
};
makeArtiqZynqPackage = build;
};
}
}

121
src/Cargo.lock generated

@ -1,5 +1,7 @@
# This file is automatically @generated by Cargo.
# It is not intended for manual editing.
version = 3
[[package]]
name = "async-recursion"
version = "0.3.2"
@ -13,9 +15,9 @@ dependencies = [
[[package]]
name = "autocfg"
version = "1.0.1"
version = "1.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "cdb031dd78e28731d87d56cc8ffef4a8f36ca26c38fe2de700543e627f8a464a"
checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa"
[[package]]
name = "bit_field"
@ -25,9 +27,9 @@ checksum = "dcb6dd1c2376d2e096796e234a70e17e94cc2d5d54ff8ce42b28cef1d0d359a4"
[[package]]
name = "bitflags"
version = "1.2.1"
version = "1.3.2"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "cf1de2fe8c75bc145a2f577add951f8134889b4795d47466a54a5c846d691693"
checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a"
[[package]]
name = "build_const"
@ -47,9 +49,9 @@ checksum = "14c189c53d098945499cdfa7ecc63567cf3886b3332b312a5b4585d8d3a6a610"
[[package]]
name = "cc"
version = "1.0.69"
version = "1.0.77"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e70cc2f62c6ce1868963827bd677764c62d07c3d9a3e1fb1177ee1a9ab199eb2"
checksum = "e9f73505338f7d905b19d18738976aae232eb46b8efc15554ffc56deb5d9ebe4"
[[package]]
name = "cfg-if"
@ -114,9 +116,9 @@ dependencies = [
[[package]]
name = "embedded-hal"
version = "0.2.6"
version = "0.2.7"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "e36cfb62ff156596c892272f3015ef952fe1525e85261fa3a7f327bd6b384ab9"
checksum = "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff"
dependencies = [
"nb 0.1.3",
"void",
@ -136,9 +138,9 @@ dependencies = [
[[package]]
name = "futures"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1adc00f486adfc9ce99f77d717836f0c5aa84965eb0b4f051f4e83f7cab53f8b"
checksum = "38390104763dc37a5145a53c29c63c1290b5d316d6086ec32c293f6736051bb0"
dependencies = [
"futures-channel",
"futures-core",
@ -150,9 +152,9 @@ dependencies = [
[[package]]
name = "futures-channel"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "74ed2411805f6e4e3d9bc904c95d5d423b89b3b25dc0250aa74729de20629ff9"
checksum = "52ba265a92256105f45b719605a571ffe2d1f0fea3807304b522c1d778f79eed"
dependencies = [
"futures-core",
"futures-sink",
@ -160,24 +162,22 @@ dependencies = [
[[package]]
name = "futures-core"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "af51b1b4a7fdff033703db39de8802c673eb91855f2e0d47dcf3bf2c0ef01f99"
checksum = "04909a7a7e4633ae6c4a9ab280aeb86da1236243a77b694a49eacd659a4bd3ac"
[[package]]
name = "futures-io"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0b0e06c393068f3a6ef246c75cdca793d6a46347e75286933e5e75fd2fd11582"
checksum = "00f5fb52a06bdcadeb54e8d3671f8888a39697dcb0b81b23b55174030427f4eb"
[[package]]
name = "futures-macro"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c54913bae956fb8df7f4dc6fc90362aa72e69148e3f39041fbe8742d21e0ac57"
checksum = "bdfb8ce053d86b91919aad980c220b1fb8401a9394410e1c289ed7e66b61835d"
dependencies = [
"autocfg",
"proc-macro-hack",
"proc-macro2",
"quote",
"syn",
@ -185,31 +185,28 @@ dependencies = [
[[package]]
name = "futures-sink"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c0f30aaa67363d119812743aa5f33c201a7a66329f97d1a887022971feea4b53"
checksum = "39c15cf1a4aa79df40f1bb462fb39676d0ad9e366c2a33b590d7c66f4f81fcf9"
[[package]]
name = "futures-task"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "bbe54a98670017f3be909561f6ad13e810d9a51f3f061b902062ca3da80799f2"
checksum = "2ffb393ac5d9a6eaa9d3fdf37ae2776656b706e200c8e16b1bdb227f5198e6ea"
[[package]]
name = "futures-util"
version = "0.3.16"
version = "0.3.25"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "67eb846bfd58e44a8481a00049e82c43e0ccb5d61f8dc071057cb19249dd4d78"
checksum = "197676987abd2f9cadff84926f410af1c183608d36641465df73ae8211dc65d6"
dependencies = [
"autocfg",
"futures-core",
"futures-macro",
"futures-sink",
"futures-task",
"pin-project-lite",
"pin-utils",
"proc-macro-hack",
"proc-macro-nested",
]
[[package]]
@ -224,7 +221,7 @@ dependencies = [
[[package]]
name = "libasync"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"embedded-hal",
"libcortex_a9",
@ -256,7 +253,7 @@ dependencies = [
[[package]]
name = "libboard_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"bit_field",
"embedded-hal",
@ -281,7 +278,7 @@ dependencies = [
[[package]]
name = "libconfig"
version = "0.1.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"core_io",
"fatfs",
@ -292,7 +289,7 @@ dependencies = [
[[package]]
name = "libcortex_a9"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"bit_field",
"libregister",
@ -301,14 +298,14 @@ dependencies = [
[[package]]
name = "libm"
version = "0.2.1"
version = "0.2.6"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c7d73b3f436185384286bd8098d17ec07c9a7d2388a6599f824d8502b529702a"
checksum = "348108ab3fba42ec82ff6e9564fc4ca0247bdccdc68dd8af9764bbc79c3c8ffb"
[[package]]
name = "libregister"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"bit_field",
"vcell",
@ -318,7 +315,7 @@ dependencies = [
[[package]]
name = "libsupport_zynq"
version = "0.0.0"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#3e95df1f640aa761740feaf9eec797acb58dd942"
source = "git+https://git.m-labs.hk/M-Labs/zynq-rs.git#c15b54f92b3d4e125ae47a0dce7abe4b2bc9e054"
dependencies = [
"cc",
"compiler_builtins",
@ -337,9 +334,9 @@ checksum = "822add9edb1860698b79522510da17bef885171f75aa395cff099d770c609c24"
[[package]]
name = "log"
version = "0.4.14"
version = "0.4.17"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "51b9bbe6c47d51fc3e1a9b945965946b4c44142ab8792c50835a980d362c2710"
checksum = "abb12e687cfb44aa40f41fc3978ef76448f9b6038cad6aef4259d3c095a2382e"
dependencies = [
"cfg-if 1.0.0",
]
@ -384,18 +381,18 @@ dependencies = [
[[package]]
name = "num-traits"
version = "0.2.14"
version = "0.2.15"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "9a64b1ec5cda2586e284722486d802acf1f7dbdc623e2bfc57e65ca1cd099290"
checksum = "578ede34cf02f8924ab9447f50c28075b4d3e5b269972345e7e0372b38c6cdcd"
dependencies = [
"autocfg",
]
[[package]]
name = "pin-project-lite"
version = "0.2.7"
version = "0.2.9"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8d31d11c69a6b52a174b42bdc0c30e5e11670f90788b2c471c31c1d17d449443"
checksum = "e0a7ae3ac2f1173085d398531c705756c94a4c56843785df85a60c1a0afac116"
[[package]]
name = "pin-utils"
@ -403,32 +400,20 @@ version = "0.1.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184"
[[package]]
name = "proc-macro-hack"
version = "0.5.19"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "dbf0c48bc1d91375ae5c3cd81e3722dff1abcf81a30960240640d223f59fe0e5"
[[package]]
name = "proc-macro-nested"
version = "0.1.7"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "bc881b2c22681370c6a780e47af9840ef841837bc98118431d4e1868bd0c1086"
[[package]]
name = "proc-macro2"
version = "1.0.28"
version = "1.0.43"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "5c7ed8b8c7b886ea3ed7dde405212185f423ab44682667c8c6dd14aa1d9f6612"
checksum = "0a2ca2c61bc9f3d74d2886294ab7b9853abd9c1ad903a3ac7815c58989bb7bab"
dependencies = [
"unicode-xid",
"unicode-ident",
]
[[package]]
name = "quote"
version = "1.0.9"
version = "1.0.21"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "c3d0b9745dc2debf507c8422de05d7226cc1f0644216dfdfead988f9b1ab32a7"
checksum = "bbe448f377a7d6961e30f5955f9b8d106c3f5e449d493ee1b125c1d43c2b5179"
dependencies = [
"proc-macro2",
]
@ -518,20 +503,20 @@ dependencies = [
[[package]]
name = "syn"
version = "1.0.74"
version = "1.0.101"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "1873d832550d4588c3dbc20f01361ab00bfe741048f71e3fecf145a7cc18b29c"
checksum = "e90cde112c4b9690b8cbe810cba9ddd8bc1d7472e2cae317b69e9438c1cba7d2"
dependencies = [
"proc-macro2",
"quote",
"unicode-xid",
"unicode-ident",
]
[[package]]
name = "unicode-xid"
version = "0.2.2"
name = "unicode-ident"
version = "1.0.5"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "8ccb82d61f80a663efe1f787a51b16b5a51e3314d6ac365b08639f52387b33f3"
checksum = "6ceab39d59e4c9499d4e5a8ee0e2735b891bb7308ac83dfb4e80cad195c9f6f3"
[[package]]
name = "unwind"
@ -557,9 +542,9 @@ checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
[[package]]
name = "volatile-register"
version = "0.2.0"
version = "0.2.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"
checksum = "9ee8f19f9d74293faf70901bc20ad067dc1ad390d2cbf1e3f75f721ffee908b6"
dependencies = [
"vcell",
]

@ -0,0 +1,16 @@
from misoc.integration import cpu_interface
def write_csr_file(soc, filename):
with open(filename, "w") as f:
f.write(cpu_interface.get_csr_rust(
soc.get_csr_regions(), soc.get_csr_groups(), soc.get_constants()))
def write_mem_file(soc, filename):
with open(filename, "w") as f:
f.write(cpu_interface.get_mem_rust(
soc.get_memory_regions(), soc.get_memory_groups(), None))
def write_rustc_cfg_file(soc, filename):
with open(filename, "w") as f:
f.write(cpu_interface.get_rust_cfg(
soc.get_csr_regions(), soc.get_constants()))

@ -10,12 +10,12 @@ from migen.genlib.cdc import MultiReg
from migen_axi.integration.soc_core import SoCCore
from migen_axi.platforms import kasli_soc
from misoc.interconnect.csr import *
from misoc.integration import cpu_interface
from misoc.cores import virtual_leds
from artiq.coredevice import jsondesc
from artiq.gateware import rtio, eem_7series
from artiq.gateware.rtio.xilinx_clocking import fix_serdes_timing_path
from artiq.gateware.rtio.phy import ttl_simple
from artiq.gateware.rtio.xilinx_clocking import RTIOClockMultiplier
from artiq.gateware.drtio.transceiver import gtx_7series
from artiq.gateware.drtio.siphaser import SiPhaser7Series
from artiq.gateware.drtio.rx_synchronizer import XilinxRXSynchronizer
@ -25,57 +25,9 @@ import dma
import analyzer
import acpki
import drtio_aux_controller
import zynq_clocking
from config import write_csr_file, write_mem_file, write_rustc_cfg_file
class RTIOCRG(Module, AutoCSR):
def __init__(self, platform):
self.pll_reset = CSRStorage(reset=1)
self.pll_locked = CSRStatus()
self.clock_domains.cd_rtio = ClockDomain()
self.clock_domains.cd_rtiox4 = ClockDomain(reset_less=True)
clk_synth = platform.request("cdr_clk_clean_fabric")
clk_synth_se = Signal()
platform.add_period_constraint(clk_synth.p, 8.0)
self.specials += [
Instance("IBUFGDS",
p_DIFF_TERM="TRUE", p_IBUF_LOW_PWR="FALSE",
</