8 Commits (core0-buffer)

Author	SHA1	Message	Date
Sebastien Bourdeauducq	1e20259c36	fix acpki selection	2020-08-04 13:26:45 +08:00
Sebastien Bourdeauducq	f8d4036451	add ACP kernel initiator ... Based on work by Chris Ballance https://github.com/m-labs/artiq/issues/1167#issuecomment-427188287 M-Labs/artiq-zynq#55 Work-in-progress, only gateware part and build system, untested.	2020-08-04 13:15:26 +08:00
Sebastien Bourdeauducq	523524c319	zc706: add RTIO log channels	2020-07-19 14:05:35 +08:00
Sebastien Bourdeauducq	f69e41af5e	gateware: fix VADJ I/O standard conflict	2020-07-16 17:58:31 +08:00
Sebastien Bourdeauducq	6a361893c2	gateware: make LEDs common to all variants ... Makes quick testing easier.	2020-07-16 17:36:27 +08:00
Sebastien Bourdeauducq	8e758ecc17	add RTIO analyzer core (untested)	2020-07-15 23:06:34 +08:00
Sebastien Bourdeauducq	a7073edf79	add DMA core (untested)	2020-07-13 10:37:17 +08:00
Sebastien Bourdeauducq	e3ff21b1b5	create gateware folder	2020-07-11 17:49:54 +08:00