Updated zc706 dependency and fixed compiler errors.

src/Cargo.lock

@@ -201,7 +201,7 @@ dependencies = [
 [[package]]
 name = "libasync"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#0aa75d3544a2092a0ba6ce689c3f025f22ec30e4"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
 dependencies = [
  "embedded-hal",
  "libcortex_a9",
@@ -213,7 +213,7 @@ dependencies = [
 [[package]]
 name = "libboard_zynq"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#0aa75d3544a2092a0ba6ce689c3f025f22ec30e4"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
 dependencies = [
  "bit_field",
  "embedded-hal",
@@ -237,7 +237,7 @@ dependencies = [
 [[package]]
 name = "libcortex_a9"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#0aa75d3544a2092a0ba6ce689c3f025f22ec30e4"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
 dependencies = [
  "bit_field",
  "libregister",
@@ -252,7 +252,7 @@ checksum = "c7d73b3f436185384286bd8098d17ec07c9a7d2388a6599f824d8502b529702a"
 [[package]]
 name = "libregister"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#0aa75d3544a2092a0ba6ce689c3f025f22ec30e4"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
 dependencies = [
  "bit_field",
  "vcell",
@@ -262,7 +262,7 @@ dependencies = [
 [[package]]
 name = "libsupport_zynq"
 version = "0.0.0"
-source = "git+https://git.m-labs.hk/M-Labs/zc706.git#0aa75d3544a2092a0ba6ce689c3f025f22ec30e4"
+source = "git+https://git.m-labs.hk/M-Labs/zc706.git#b65606f2d02fab273645835a102048b23c3394f7"
 dependencies = [
  "compiler_builtins",
  "libboard_zynq",

src/runtime/Cargo.toml

@@ -26,7 +26,7 @@ log_buffer = { version = "1.2" }
 libm = { version = "0.2", features = ["unstable"] }
 
 libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
-libsupport_zynq = { default-features = false, git = "https://git.m-labs.hk/M-Labs/zc706.git" }
+libsupport_zynq = { default-features = false, features = ["alloc_core", "dummy_irq_handler"], git = "https://git.m-labs.hk/M-Labs/zc706.git" }
 libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
 libasync = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
 libregister = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }

src/runtime/link.x

@@ -48,9 +48,12 @@ SECTIONS
 
     .heap (NOLOAD) : ALIGN(8)
     {
-        __heap_start = .;
-        . += 0x1000000;
-        __heap_end = .;
+        __heap0_start = .;
+        . += 0x800000;
+        __heap0_end = .;
+        __heap1_start = .;
+        . += 0x800000;
+        __heap1_end = .;
     } > SDRAM
 
     .stack1 (NOLOAD) : ALIGN(8)

src/runtime/src/comms.rs

@@ -2,7 +2,6 @@ use core::fmt;
 use core::cell::RefCell;
 use core::str::Utf8Error;
 use alloc::rc::Rc;
-use alloc::sync::Arc;
 use alloc::{vec, vec::Vec, string::String};
 use log::{info, warn, error};
 
@@ -126,7 +125,7 @@ async fn handle_run_kernel(stream: Option<&TcpStream>, control: &Rc<RefCell<kern
     control.borrow_mut().tx.async_send(kernel::Message::StartRequest).await;
     loop {
         let reply = control.borrow_mut().rx.async_recv().await;
-        match *reply {
+        match reply {
             kernel::Message::RpcSend { is_async, data } => {
                 if stream.is_none() {
                     error!("Unexpected RPC from startup/idle kernel!");
@@ -141,7 +140,7 @@ async fn handle_run_kernel(stream: Option<&TcpStream>, control: &Rc<RefCell<kern
                     match host_request {
                         Request::RPCReply => {
                             let tag = read_bytes(stream, 512).await?;
-                            let slot = match *control.borrow_mut().rx.async_recv().await {
+                            let slot = match control.borrow_mut().rx.async_recv().await {
                                 kernel::Message::RpcRecvRequest(slot) => slot,
                                 other => panic!("expected root value slot from core1, not {:?}", other),
                             };
@@ -155,7 +154,7 @@ async fn handle_run_kernel(stream: Option<&TcpStream>, control: &Rc<RefCell<kern
                                     } else {
                                         let mut control = control.borrow_mut();
                                         control.tx.async_send(kernel::Message::RpcRecvReply(Ok(size))).await;
-                                        match *control.rx.async_recv().await {
+                                        match control.rx.async_recv().await {
                                             kernel::Message::RpcRecvRequest(slot) => slot,
                                             other => panic!("expected nested value slot from kernel CPU, not {:?}", other),
                                         }
@@ -166,7 +165,7 @@ async fn handle_run_kernel(stream: Option<&TcpStream>, control: &Rc<RefCell<kern
                         },
                         Request::RPCException => {
                             let mut control = control.borrow_mut();
-                            match *control.rx.async_recv().await {
+                            match control.rx.async_recv().await {
                                 kernel::Message::RpcRecvRequest(_) => (),
                                 other => panic!("expected (ignored) root value slot from kernel CPU, not {:?}", other),
                             }
@@ -233,9 +232,9 @@ async fn handle_run_kernel(stream: Option<&TcpStream>, control: &Rc<RefCell<kern
 
 async fn load_kernel(buffer: Vec<u8>, control: &Rc<RefCell<kernel::Control>>, stream: Option<&TcpStream>) -> Result<()> {
     let mut control = control.borrow_mut();
-    control.tx.async_send(kernel::Message::LoadRequest(Arc::new(buffer))).await;
+    control.tx.async_send(kernel::Message::LoadRequest(buffer)).await;
     let reply = control.rx.async_recv().await;
-    match *reply {
+    match reply {
         kernel::Message::LoadCompleted => {
             if let Some(stream) = stream {
                 write_header(stream, Reply::LoadCompleted).await?;

src/runtime/src/kernel/control.rs

@@ -1,21 +1,33 @@
-use libcortex_a9::sync_channel::{self, sync_channel};
+use libcortex_a9::sync_channel::{Sender, Receiver};
 use libsupport_zynq::boot::Core1;
 
 use super::{CHANNEL_0TO1, CHANNEL_1TO0, Message};
 
 pub struct Control {
-    pub tx: sync_channel::Sender<Message>,
-    pub rx: sync_channel::Receiver<Message>,
+    pub tx: Sender<'static, Message>,
+    pub rx: Receiver<'static, Message>,
+}
+
+fn get_channels() -> (Sender<'static, Message>, Receiver<'static, Message>) {
+    let mut core0_tx = None;
+    while core0_tx.is_none() {
+        core0_tx = CHANNEL_0TO1.lock().take();
+    }
+    let core0_tx = core0_tx.unwrap();
+
+    let mut core0_rx = None;
+    while core0_rx.is_none() {
+        core0_rx = CHANNEL_1TO0.lock().take();
+    }
+    let core0_rx = core0_rx.unwrap();
+
+    (core0_tx, core0_rx)
 }
 
 impl Control {
     pub fn start() -> Self {
         Core1::start(true);
-
-        let (core0_tx, core1_rx) = sync_channel(4);
-        let (core1_tx, core0_rx) = sync_channel(4);
-        *CHANNEL_0TO1.lock() = Some(core1_rx);
-        *CHANNEL_1TO0.lock() = Some(core1_tx);
+        let (core0_tx, core0_rx) = get_channels();
 
         Control {
             tx: core0_tx,
@@ -23,3 +35,4 @@ impl Control {
         }
     }
 }
+

src/runtime/src/kernel/core1.rs

@@ -9,7 +9,10 @@ use libcortex_a9::{
     enable_fpu,
     cache::{dcci_slice, iciallu, bpiall},
     asm::{dsb, isb},
+    sync_channel,
 };
+use libboard_zynq::{mpcore, gic};
+use libsupport_zynq::ram;
 use dyld::{self, Library};
 use crate::eh_artiq;
 use super::{
@@ -138,23 +141,23 @@ pub fn main_core1() {
     enable_fpu();
     debug!("FPU enabled on Core1");
 
-    let mut core1_tx = None;
-    while core1_tx.is_none() {
-        core1_tx = CHANNEL_1TO0.lock().take();
-    }
-    let mut core1_tx = core1_tx.unwrap();
+    ram::init_alloc_core1();
+    gic::InterruptController::new(mpcore::RegisterBlock::new()).enable_interrupts();
 
-    let mut core1_rx = None;
-    while core1_rx.is_none() {
-        core1_rx = CHANNEL_0TO1.lock().take();
+    let (mut core0_tx, mut core1_rx) = sync_channel!(Message, 4);
+    let (mut core1_tx, core0_rx) = sync_channel!(Message, 4);
+    unsafe {
+        core0_tx.reset();
+        core1_tx.reset();
     }
-    let mut core1_rx = core1_rx.unwrap();
+    *CHANNEL_0TO1.lock() = Some(core0_tx);
+    *CHANNEL_1TO0.lock() = Some(core0_rx);
 
     // set on load, cleared on start
     let mut loaded_kernel = None;
     loop {
         let message = core1_rx.recv();
-        match *message {
+        match message {
             Message::LoadRequest(data) => {
                 let result = dyld::load(&data, &resolve)
                     .and_then(KernelImage::new);
@@ -213,8 +216,6 @@ pub fn terminate(exception: &'static eh_artiq::Exception<'static>, backtrace: &'
         let mut core1_tx = KERNEL_CHANNEL_1TO0.lock();
         core1_tx.as_mut().unwrap().send(Message::KernelException(exception, &backtrace[..cursor]));
     }
-    // TODO: remove after implementing graceful kernel termination.
-    error!("Core1 uncaught exception");
     loop {}
 }
 

src/runtime/src/kernel/mod.rs

@@ -1,5 +1,5 @@
 use core::ptr;
-use alloc::{vec::Vec, sync::Arc, string::String};
+use alloc::{vec::Vec, string::String};
 
 use libcortex_a9::{mutex::Mutex, sync_channel};
 use crate::eh_artiq;
@@ -12,7 +12,7 @@ mod rpc;
 mod dma;
 mod cache;
 
-#[derive(Debug)]
+#[derive(Debug, Clone)]
 pub struct RPCException {
     pub name: String,
     pub message: String,
@@ -23,24 +23,24 @@ pub struct RPCException {
     pub function: String
 }
 
-#[derive(Debug)]
+#[derive(Debug, Clone)]
 pub enum Message {
-    LoadRequest(Arc<Vec<u8>>),
+    LoadRequest(Vec<u8>),
     LoadCompleted,
     LoadFailed,
     StartRequest,
     KernelFinished,
     KernelException(&'static eh_artiq::Exception<'static>, &'static [usize]),
-    RpcSend { is_async: bool, data: Arc<Vec<u8>> },
+    RpcSend { is_async: bool, data: Vec<u8> },
     RpcRecvRequest(*mut ()),
     RpcRecvReply(Result<usize, RPCException>),
 }
 
-static CHANNEL_0TO1: Mutex<Option<sync_channel::Receiver<Message>>> = Mutex::new(None);
-static CHANNEL_1TO0: Mutex<Option<sync_channel::Sender<Message>>> = Mutex::new(None);
+static CHANNEL_0TO1: Mutex<Option<sync_channel::Sender<'static, Message>>> = Mutex::new(None);
+static CHANNEL_1TO0: Mutex<Option<sync_channel::Receiver<'static, Message>>> = Mutex::new(None);
 
-static KERNEL_CHANNEL_0TO1: Mutex<Option<sync_channel::Receiver<Message>>> = Mutex::new(None);
-static KERNEL_CHANNEL_1TO0: Mutex<Option<sync_channel::Sender<Message>>> = Mutex::new(None);
+static KERNEL_CHANNEL_0TO1: Mutex<Option<sync_channel::Receiver<'static, Message>>> = Mutex::new(None);
+static KERNEL_CHANNEL_1TO0: Mutex<Option<sync_channel::Sender<'static, Message>>> = Mutex::new(None);
 
 static mut KERNEL_IMAGE: *const core1::KernelImage = ptr::null();
 

src/runtime/src/kernel/rpc.rs

@@ -1,6 +1,6 @@
 //! Kernel-side RPC API
 
-use alloc::{vec::Vec, sync::Arc};
+use alloc::vec::Vec;
 use cslice::{CSlice, AsCSlice};
 
 use crate::eh_artiq;
@@ -14,7 +14,7 @@ fn rpc_send_common(is_async: bool, service: u32, tag: &CSlice<u8>, data: *const
     let mut core1_tx = KERNEL_CHANNEL_1TO0.lock();
     let mut buffer = Vec::<u8>::new();
     send_args(&mut buffer, service, tag.as_ref(), data).expect("RPC encoding failed");
-    core1_tx.as_mut().unwrap().send(Message::RpcSend { is_async, data: Arc::new(buffer) });
+    core1_tx.as_mut().unwrap().send(Message::RpcSend { is_async, data: buffer });
 }
 
 pub extern fn rpc_send(service: u32, tag: &CSlice<u8>, data: *const *const ()) {
@@ -32,7 +32,7 @@ pub extern fn rpc_recv(slot: *mut ()) -> usize {
         core1_tx.as_mut().unwrap().send(Message::RpcRecvRequest(slot));
         core1_rx.as_mut().unwrap().recv()
     };
-    match *reply {
+    match reply {
         Message::RpcRecvReply(Ok(alloc_size)) => alloc_size,
         Message::RpcRecvReply(Err(exception)) => unsafe {
             eh_artiq::raise(&eh_artiq::Exception {

src/runtime/src/main.rs

@@ -6,13 +6,15 @@
 #![feature(c_variadic)]
 #![feature(const_btree_new)]
 #![feature(ptr_offset_from)]
+#![feature(const_in_array_repeat_expressions)]
+#![feature(naked_functions)]
 
 extern crate alloc;
 
 use core::{cmp, str};
 use log::{info, warn, error};
 
-use libboard_zynq::{timer::GlobalTimer, devc, slcr};
+use libboard_zynq::{timer::GlobalTimer, devc, slcr, mpcore, gic};
 use libasync::{task, block_async};
 use libsupport_zynq::ram;
 use libregister::RegisterW;
@@ -183,7 +185,8 @@ pub fn main_core0() {
 
     info!("NAR3/Zynq7000 starting...");
 
-    ram::init_alloc_linker();
+    ram::init_alloc_core0();
+    gic::InterruptController::new(mpcore::RegisterBlock::new()).enable_interrupts();
 
     init_gateware();
     info!("detected gateware: {}", identifier_read(&mut [0; 64]));

src/szl/link.x

@@ -34,6 +34,12 @@ SECTIONS
         __bss_end = .;
     } > OCM3
 
+    .heap (NOLOAD) : ALIGN(8)
+    {
+        __heap0_start = .;
+        __heap0_end = .;
+    } > OCM3
+
     .stack1 (NOLOAD) : ALIGN(8)
     {
         __stack1_end = .;