From 49810da188d2f964d4b5f83b510441043b9dff9d Mon Sep 17 00:00:00 2001 From: mwojcik Date: Thu, 5 Oct 2023 12:17:43 +0800 Subject: [PATCH] runtime: wait longer for PLL lock --- src/runtime/src/rtio_clocking.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/runtime/src/rtio_clocking.rs b/src/runtime/src/rtio_clocking.rs index 5d1d5dca..9279cb54 100644 --- a/src/runtime/src/rtio_clocking.rs +++ b/src/runtime/src/rtio_clocking.rs @@ -76,7 +76,7 @@ fn init_rtio(timer: &mut GlobalTimer) { } // if it's not locked, it will hang at the CSR. - timer.delay_ms(20); // wait for CPLL/QPLL/SYS PLL lock + timer.delay_ms(50); // wait for CPLL/QPLL/SYS PLL lock let clk = unsafe { pl::csr::sys_crg::current_clock_read() }; if clk == 1 { info!("SYS CLK switched successfully"); @@ -95,7 +95,7 @@ fn init_drtio(timer: &mut GlobalTimer) { pl::csr::gt_drtio::stable_clkin_write(1); } - timer.delay_ms(20); // wait for CPLL/QPLL/SYS PLL lock + timer.delay_ms(50); // wait for CPLL/QPLL/SYS PLL lock let clk = unsafe { pl::csr::sys_crg::current_clock_read() }; if clk == 1 { info!("SYS CLK switched successfully");