move build artifacts out of tree

.gitignore

@@ -2,7 +2,4 @@ result
 examples/*.elf
 __pycache__
 
-src/runtime/src/pl.rs
-src/szl/src/payload.bin
-src/szl/src/payload.bin.lzma
-src/target
+build

README.md

@@ -17,8 +17,8 @@ Impure incremental build:
 ```shell
 nix-shell
 cd src
-./zc706.py -g  # build gateware
-make           # build firmware
+./zc706.py -g ../build/gateware  # build gateware
+make                             # build firmware
 cd ..
 ./remote_run.sh -i
 ```

default.nix

@@ -27,14 +27,13 @@ in
       buildPhase = ''
         export XARGO_RUST_SRC="${rustPlatform.rust.rustc.src}/src"
         export CARGO_HOME=$(mktemp -d cargo-home.XXX)
-        make clean
         make
       '';
 
       installPhase = ''
         mkdir -p $out $out/nix-support
-        cp target/armv7-none-eabihf/release/runtime $out/runtime.elf
-        cp target/armv7-none-eabihf/release/szl $out/szl.elf
+        cp ../build/firmware/armv7-none-eabihf/release/runtime $out/runtime.elf
+        cp ../build/firmware/armv7-none-eabihf/release/szl $out/szl.elf
         echo file binary-dist $out/runtime.elf >> $out/nix-support/hydra-build-products
         echo file binary-dist $out/szl.elf >> $out/nix-support/hydra-build-products
       '';
@@ -50,7 +49,7 @@ in
         ];
       }
       ''
-        python ${./src/zc706.py} -g
+        python ${./src/zc706.py} -g build
         mkdir -p $out $out/nix-support
         cp build/top.bit $out
         echo file binary-dist $out/top.bit >> $out/nix-support/hydra-build-products

remote_run.sh

@@ -21,8 +21,8 @@ target_folder=/tmp/zynq-\$USER
 ssh $target_host "mkdir -p $target_folder"
 rsync openocd/* $target_host:$target_folder
 if [ $impure -eq 1 ]; then
-    rsync src/target/armv7-none-eabihf/release/szl $target_host:$target_folder/szl.elf
-    rsync src/build/top.bit $target_host:$target_folder
+    rsync build/firmware/armv7-none-eabihf/release/szl $target_host:$target_folder/szl.elf
+    rsync build/gateware/top.bit $target_host:$target_folder
 else
     rsync -L result/szl.elf $target_host:$target_folder
     rsync -L result/top.bit $target_host:$target_folder

src/Makefile

@@ -1,23 +1,18 @@
-all: target/armv7-none-eabihf/release/szl
+all: ../build/firmware/armv7-none-eabihf/release/szl
 
-clean:
-	rm -f runtime/src/pl.rs
-	rm -f szl/src/payload.bin
-	rm -f szl/src/payload.bin.lzma
-	rm -rf target
+.PHONY: all
 
-.PHONY: all clean
 
+../build/pl.rs: zc706.py
+	mkdir -p ../build
+	python zc706.py -r ../build/pl.rs
 
-runtime/src/pl.rs: zc706.py
-	python zc706.py -r runtime/src/pl.rs
+../build/firmware/armv7-none-eabihf/release/runtime: .cargo/* armv7-none-eabihf.json Cargo.lock Cargo.toml libdyld/* libdyld/src/* runtime/* runtime/src/* ../build/pl.rs
+	cargo xbuild --release -p runtime --target-dir ../build/firmware
 
-target/armv7-none-eabihf/release/runtime: .cargo/* armv7-none-eabihf.json Cargo.lock Cargo.toml libdyld/* libdyld/src/* runtime/* runtime/src/* runtime/src/pl.rs
-	cargo xbuild --release -p runtime
+../build/szl-payload.bin.lzma: ../build/firmware/armv7-none-eabihf/release/runtime
+	llvm-objcopy -O binary ../build/firmware/armv7-none-eabihf/release/runtime ../build/szl-payload.bin
+	lzma --keep -f ../build/szl-payload.bin
 
-szl/src/payload.bin.lzma: target/armv7-none-eabihf/release/runtime
-	llvm-objcopy -O binary target/armv7-none-eabihf/release/runtime szl/src/payload.bin
-	lzma --keep -f szl/src/payload.bin
-
-target/armv7-none-eabihf/release/szl: .cargo/* armv7-none-eabihf.json Cargo.lock Cargo.toml szl/* szl/src/* szl/src/payload.bin.lzma
-	cargo xbuild --release -p szl
+../build/firmware/armv7-none-eabihf/release/szl: .cargo/* armv7-none-eabihf.json Cargo.lock Cargo.toml szl/* szl/src/* ../build/szl-payload.bin.lzma
+	cargo xbuild --release -p szl --target-dir ../build/firmware

src/runtime/src/main.rs

@@ -13,6 +13,7 @@ use libsupport_zynq::ram;
 
 mod proto;
 mod comms;
+#[path = "../../../build/pl.rs"]
 mod pl;
 mod rtio;
 mod kernel;

src/szl/src/main.rs

@@ -40,7 +40,7 @@ pub fn main_core0() {
     libboard_zynq::stdio::drop_uart(); // reinitialize UART after clocking change
     let mut ddr = zynq::ddr::DdrRam::new();
 
-    let payload = include_bytes!("payload.bin.lzma");
+    let payload = include_bytes!("../../../build/szl-payload.bin.lzma");
     info!("decompressing payload");
     let result = unsafe {
         unlzma_simple(payload.as_ptr(), payload.len() as i32, ddr.ptr(), lzma_error)

src/zc706.py

@@ -60,15 +60,15 @@ def main():
         description="ARTIQ port to the ZC706 Zynq development kit")
     parser.add_argument("-r", default=None,
         help="build Rust interface into the specified file")
-    parser.add_argument("-g", action="store_true",
-        help="build gateware")
+    parser.add_argument("-g", default=None,
+        help="build gateware into the specified directory")
     args = parser.parse_args()
 
     soc = ZC706()
     soc.finalize()
 
-    if args.g:
-        soc.build()
+    if args.g is not None:
+        soc.build(build_dir=args.g)
     if args.r is not None:
         write_csr_file(soc, args.r)