forked from M-Labs/artiq-zynq
subkernels: pass now_mu when calling subkernels
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a410c40b50
commit
3390abd5a1
@ -255,6 +255,7 @@ pub enum Packet {
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destination: u8,
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destination: u8,
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id: u32,
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id: u32,
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run: bool,
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run: bool,
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timestamp: u64,
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},
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},
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SubkernelLoadRunReply {
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SubkernelLoadRunReply {
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destination: u8,
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destination: u8,
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@ -514,6 +515,7 @@ impl Packet {
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destination: reader.read_u8()?,
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destination: reader.read_u8()?,
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id: reader.read_u32()?,
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id: reader.read_u32()?,
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run: reader.read_bool()?,
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run: reader.read_bool()?,
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timestamp: reader.read_u64()?,
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},
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},
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0xc5 => Packet::SubkernelLoadRunReply {
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0xc5 => Packet::SubkernelLoadRunReply {
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destination: reader.read_u8()?,
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destination: reader.read_u8()?,
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@ -877,12 +879,14 @@ impl Packet {
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destination,
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destination,
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id,
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id,
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run,
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run,
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timestamp,
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} => {
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} => {
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writer.write_u8(0xc4)?;
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writer.write_u8(0xc4)?;
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writer.write_u8(source)?;
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writer.write_u8(source)?;
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writer.write_u8(destination)?;
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writer.write_u8(destination)?;
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writer.write_u32(id)?;
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writer.write_u32(id)?;
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writer.write_bool(run)?;
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writer.write_bool(run)?;
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writer.write_u64(timestamp)?;
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}
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}
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Packet::SubkernelLoadRunReply { destination, succeeded } => {
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Packet::SubkernelLoadRunReply { destination, succeeded } => {
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writer.write_u8(0xc5)?;
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writer.write_u8(0xc5)?;
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@ -81,6 +81,7 @@ pub enum Message {
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id: u32,
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id: u32,
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destination: u8,
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destination: u8,
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run: bool,
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run: bool,
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timestamp: u64,
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},
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},
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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SubkernelLoadRunReply {
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SubkernelLoadRunReply {
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@ -3,7 +3,7 @@ use alloc::vec::Vec;
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use cslice::CSlice;
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use cslice::CSlice;
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use super::{Message, SubkernelStatus, KERNEL_CHANNEL_0TO1, KERNEL_CHANNEL_1TO0};
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use super::{Message, SubkernelStatus, KERNEL_CHANNEL_0TO1, KERNEL_CHANNEL_1TO0};
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use crate::{artiq_raise, eh_artiq, rpc::send_args};
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use crate::{artiq_raise, eh_artiq, rpc::send_args, rtio::now_mu};
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pub extern "C" fn load_run(id: u32, destination: u8, run: bool) {
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pub extern "C" fn load_run(id: u32, destination: u8, run: bool) {
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unsafe {
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unsafe {
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@ -14,6 +14,7 @@ pub extern "C" fn load_run(id: u32, destination: u8, run: bool) {
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id: id,
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id: id,
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destination: destination,
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destination: destination,
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run: run,
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run: run,
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timestamp: now_mu() as u64,
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});
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});
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}
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}
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match unsafe { KERNEL_CHANNEL_0TO1.as_mut().unwrap() }.recv() {
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match unsafe { KERNEL_CHANNEL_0TO1.as_mut().unwrap() }.recv() {
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@ -405,8 +405,9 @@ async fn handle_run_kernel(
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id,
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id,
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destination: _,
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destination: _,
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run,
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run,
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timestamp
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} => {
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} => {
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let succeeded = match subkernel::load(aux_mutex, routing_table, timer, id, run).await {
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let succeeded = match subkernel::load(aux_mutex, routing_table, timer, id, run, timestamp).await {
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Ok(()) => true,
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Ok(()) => true,
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Err(e) => {
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Err(e) => {
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error!("Error loading subkernel: {:?}", e);
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error!("Error loading subkernel: {:?}", e);
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@ -792,6 +792,7 @@ pub mod drtio {
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id: u32,
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id: u32,
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destination: u8,
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destination: u8,
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run: bool,
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run: bool,
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timestamp: u64,
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) -> Result<(), Error> {
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) -> Result<(), Error> {
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let linkno = routing_table.0[destination as usize][0] - 1;
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let linkno = routing_table.0[destination as usize][0] - 1;
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let reply = aux_transact(
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let reply = aux_transact(
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@ -803,6 +804,7 @@ pub mod drtio {
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source: 0,
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source: 0,
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destination: destination,
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destination: destination,
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run: run,
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run: run,
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timestamp,
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},
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},
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timer,
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timer,
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)
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)
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@ -100,12 +100,13 @@ pub async fn load(
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timer: GlobalTimer,
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timer: GlobalTimer,
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id: u32,
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id: u32,
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run: bool,
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run: bool,
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timestamp: u64,
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) -> Result<(), Error> {
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) -> Result<(), Error> {
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if let Some(subkernel) = SUBKERNELS.async_lock().await.get_mut(&id) {
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if let Some(subkernel) = SUBKERNELS.async_lock().await.get_mut(&id) {
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if subkernel.state != SubkernelState::Uploaded {
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if subkernel.state != SubkernelState::Uploaded {
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return Err(Error::IncorrectState);
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return Err(Error::IncorrectState);
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}
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}
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drtio::subkernel_load(aux_mutex, routing_table, timer, id, subkernel.destination, run).await?;
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drtio::subkernel_load(aux_mutex, routing_table, timer, id, subkernel.destination, run, timestamp).await?;
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if run {
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if run {
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subkernel.state = SubkernelState::Running;
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subkernel.state = SubkernelState::Running;
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}
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}
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@ -826,6 +826,7 @@ fn process_aux_packet(
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destination: _destination,
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destination: _destination,
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id,
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id,
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run,
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run,
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timestamp,
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} => {
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} => {
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forward!(
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forward!(
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router,
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router,
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@ -844,7 +845,7 @@ fn process_aux_packet(
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// cannot run kernel while DDMA is running
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// cannot run kernel while DDMA is running
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succeeded = false;
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succeeded = false;
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} else {
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} else {
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succeeded |= kernel_manager.run(source, id).is_ok();
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succeeded |= kernel_manager.run(source, id, timestamp).is_ok();
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}
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}
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}
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}
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router.send(
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router.send(
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@ -8,7 +8,7 @@ use core_io::{Error as IoError, Write};
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use cslice::AsCSlice;
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use cslice::AsCSlice;
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use dma::{Error as DmaError, Manager as DmaManager};
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use dma::{Error as DmaError, Manager as DmaManager};
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use io::{Cursor, ProtoWrite};
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use io::{Cursor, ProtoWrite};
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use ksupport::{eh_artiq, kernel, rpc};
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use ksupport::{eh_artiq, kernel, rpc, rtio};
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use libboard_artiq::{drtio_routing::RoutingTable,
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use libboard_artiq::{drtio_routing::RoutingTable,
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drtioaux,
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drtioaux,
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drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE},
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drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE},
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@ -349,7 +349,7 @@ impl<'a> Manager<'_> {
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}
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}
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}
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}
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pub fn run(&mut self, source: u8, id: u32) -> Result<(), Error> {
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pub fn run(&mut self, source: u8, id: u32, timestamp: u64) -> Result<(), Error> {
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if self.session.kernel_state != KernelState::Loaded || self.session.id != id {
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if self.session.kernel_state != KernelState::Loaded || self.session.id != id {
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self.load(id)?;
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self.load(id)?;
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}
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}
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@ -359,6 +359,7 @@ impl<'a> Manager<'_> {
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csr::cri_con::selected_write(2);
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csr::cri_con::selected_write(2);
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}
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}
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rtio::at_mu(timestamp as i64);
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self.control.tx.send(kernel::Message::StartRequest);
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self.control.tx.send(kernel::Message::StartRequest);
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Ok(())
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Ok(())
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}
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}
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@ -812,6 +813,7 @@ impl<'a> Manager<'_> {
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id,
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id,
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destination: sk_destination,
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destination: sk_destination,
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run,
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run,
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timestamp,
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} => {
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} => {
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self.session.kernel_state = KernelState::SubkernelAwaitLoad;
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self.session.kernel_state = KernelState::SubkernelAwaitLoad;
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router.route(
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router.route(
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@ -820,6 +822,7 @@ impl<'a> Manager<'_> {
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destination: sk_destination,
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destination: sk_destination,
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id: id,
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id: id,
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run: run,
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run: run,
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timestamp,
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},
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},
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routing_table,
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routing_table,
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rank,
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rank,
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