forked from M-Labs/artiq-zynq
satman: implement cfg/mgmt operations
This commit is contained in:
parent
244c7396d9
commit
332732dc44
@ -38,16 +38,18 @@ use libboard_artiq::{drtio_routing, drtioaux,
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pl::csr};
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pl::csr};
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::{i2c::I2c, print, println, time::Milliseconds, timer::GlobalTimer};
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use libboard_zynq::{i2c::I2c, print, println, slcr, time::Milliseconds, timer::GlobalTimer};
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use libconfig::Config;
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use libconfig::Config;
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use libcortex_a9::{l2c::enable_l2_cache, regs::MPIDR};
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use libcortex_a9::{l2c::enable_l2_cache, regs::MPIDR};
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use libregister::RegisterR;
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use libregister::RegisterR;
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use libsupport_zynq::{exception_vectors, ram};
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use libsupport_zynq::{exception_vectors, ram};
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use mgmt::Manager as CoreManager;
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use routing::Router;
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use routing::Router;
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use subkernel::Manager as KernelManager;
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use subkernel::Manager as KernelManager;
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mod analyzer;
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mod analyzer;
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mod dma;
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mod dma;
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mod mgmt;
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mod repeater;
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mod repeater;
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mod routing;
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mod routing;
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mod subkernel;
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mod subkernel;
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@ -149,6 +151,7 @@ fn process_aux_packet(
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dma_manager: &mut DmaManager,
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dma_manager: &mut DmaManager,
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analyzer: &mut Analyzer,
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analyzer: &mut Analyzer,
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kernel_manager: &mut KernelManager,
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kernel_manager: &mut KernelManager,
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core_manager: &mut CoreManager,
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router: &mut Router,
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router: &mut Router,
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) -> Result<(), drtioaux::Error> {
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) -> Result<(), drtioaux::Error> {
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// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
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// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
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@ -1011,6 +1014,279 @@ fn process_aux_packet(
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}
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}
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Ok(())
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Ok(())
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}
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}
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drtioaux::Packet::CoreMgmtGetLogRequest {
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destination: _destination,
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clear,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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let mut data_slice = [0; SAT_PAYLOAD_MAX_SIZE];
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let meta = core_manager.log_get_slice(&mut data_slice);
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if clear && meta.status.is_first() {
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mgmt::clear_log();
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}
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drtioaux::send(
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0,
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&drtioaux::Packet::CoreMgmtGetLogReply {
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last: meta.status.is_last(),
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length: meta.len as u16,
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data: data_slice,
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},
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)
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}
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drtioaux::Packet::CoreMgmtClearLogRequest {
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destination: _destination,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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mgmt::clear_log();
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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}
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drtioaux::Packet::CoreMgmtSetLogLevelRequest {
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destination: _destination,
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log_level,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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if let Ok(level_filter) = mgmt::byte_to_level_filter(log_level) {
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info!("Changing log level to {}", level_filter);
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log::set_max_level(level_filter);
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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drtioaux::Packet::CoreMgmtSetUartLogLevelRequest {
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destination: _destination,
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log_level,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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if let Ok(level_filter) = mgmt::byte_to_level_filter(log_level) {
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info!("Changing log level to {}", level_filter);
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unsafe {
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logger::BufferLogger::get_logger()
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.as_ref()
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.unwrap()
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.set_uart_log_level(level_filter);
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}
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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drtioaux::Packet::CoreMgmtConfigReadRequest {
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destination: _destination,
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length,
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key,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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let mut value_slice = [0; SAT_PAYLOAD_MAX_SIZE];
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let key_slice = &key[..length as usize];
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if !key_slice.is_ascii() {
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error!("invalid key");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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} else {
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let key = core::str::from_utf8(key_slice).unwrap();
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if core_manager.fetch_config_value(key).is_ok() {
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let meta = core_manager.get_config_value_slice(&mut value_slice);
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drtioaux::send(
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0,
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&drtioaux::Packet::CoreMgmtConfigReadReply {
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last: meta.status.is_last(),
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length: meta.len as u16,
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value: value_slice,
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},
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)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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}
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drtioaux::Packet::CoreMgmtConfigReadContinue {
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destination: _destination,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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let mut value_slice = [0; SAT_PAYLOAD_MAX_SIZE];
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let meta = core_manager.get_config_value_slice(&mut value_slice);
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drtioaux::send(
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0,
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&drtioaux::Packet::CoreMgmtConfigReadReply {
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last: meta.status.is_last(),
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length: meta.len as u16,
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value: value_slice,
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},
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)
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}
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drtioaux::Packet::CoreMgmtConfigWriteRequest {
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destination: _destination,
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last,
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length,
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data,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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core_manager.add_data(&data, length as usize);
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let mut succeeded = true;
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if last {
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succeeded = core_manager.write_config().is_ok();
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core_manager.clear_data();
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}
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if succeeded {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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drtioaux::Packet::CoreMgmtConfigRemoveRequest {
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destination: _destination,
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length,
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key,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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let key_slice = &key[..length as usize];
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if !key_slice.is_ascii() {
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error!("invalid key");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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} else {
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let key = core::str::from_utf8(key_slice).unwrap();
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if core_manager.remove_config(key).is_ok() {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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}
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drtioaux::Packet::CoreMgmtConfigEraseRequest {
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destination: _destination,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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error!("config erase not supported on zynq device");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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drtioaux::Packet::CoreMgmtRebootRequest {
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destination: _destination,
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} => {
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info!("received reboot request");
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)?;
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info!("reboot imminent");
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slcr::reboot();
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Ok(())
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}
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drtioaux::Packet::CoreMgmtAllocatorDebugRequest {
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destination: _destination,
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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error!("debug allocator not supported on zynq device");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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p => {
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p => {
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warn!("received unexpected aux packet: {:?}", p);
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warn!("received unexpected aux packet: {:?}", p);
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@ -1029,6 +1305,7 @@ fn process_aux_packets(
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dma_manager: &mut DmaManager,
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dma_manager: &mut DmaManager,
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analyzer: &mut Analyzer,
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analyzer: &mut Analyzer,
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kernel_manager: &mut KernelManager,
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kernel_manager: &mut KernelManager,
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core_manager: &mut CoreManager,
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router: &mut Router,
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router: &mut Router,
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) {
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) {
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let result = drtioaux::recv(0).and_then(|packet| {
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let result = drtioaux::recv(0).and_then(|packet| {
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@ -1044,6 +1321,7 @@ fn process_aux_packets(
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dma_manager,
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dma_manager,
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analyzer,
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analyzer,
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kernel_manager,
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kernel_manager,
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core_manager,
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router,
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router,
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)
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)
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} else {
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} else {
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@ -1240,7 +1518,7 @@ pub extern "C" fn main_core0() -> i32 {
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#[cfg(has_si549)]
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#[cfg(has_si549)]
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si549::helper_setup(&mut timer, &SI549_SETTINGS).expect("cannot initialize helper Si549");
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si549::helper_setup(&mut timer, &SI549_SETTINGS).expect("cannot initialize helper Si549");
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let cfg = match Config::new() {
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let mut cfg = match Config::new() {
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Ok(cfg) => cfg,
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Ok(cfg) => cfg,
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Err(err) => {
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Err(err) => {
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warn!("config initialization failed: {}", err);
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warn!("config initialization failed: {}", err);
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@ -1315,6 +1593,7 @@ pub extern "C" fn main_core0() -> i32 {
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let mut dma_manager = DmaManager::new();
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let mut dma_manager = DmaManager::new();
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let mut analyzer = Analyzer::new();
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let mut analyzer = Analyzer::new();
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let mut kernel_manager = KernelManager::new(&mut control);
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let mut kernel_manager = KernelManager::new(&mut control);
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let mut core_manager = CoreManager::new(&mut cfg);
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drtioaux::reset(0);
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drtioaux::reset(0);
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drtiosat_reset(false);
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drtiosat_reset(false);
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@ -1332,6 +1611,7 @@ pub extern "C" fn main_core0() -> i32 {
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&mut dma_manager,
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&mut dma_manager,
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&mut analyzer,
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&mut analyzer,
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&mut kernel_manager,
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&mut kernel_manager,
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&mut core_manager,
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&mut router,
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&mut router,
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);
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);
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#[allow(unused_mut)]
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#[allow(unused_mut)]
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|
116
src/satman/src/mgmt.rs
Normal file
116
src/satman/src/mgmt.rs
Normal file
@ -0,0 +1,116 @@
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use alloc::vec::Vec;
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|
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use io::{Cursor, ProtoRead, ProtoWrite};
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use libboard_artiq::{drtioaux_proto::SAT_PAYLOAD_MAX_SIZE,
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logger::{BufferLogger, LogBufferRef}};
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use libconfig::Config;
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use log::{self, debug, error, info, warn, LevelFilter};
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|
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use crate::routing::{SliceMeta, Sliceable};
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type Result<T> = core::result::Result<T, ()>;
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pub fn byte_to_level_filter(level_byte: u8) -> Result<log::LevelFilter> {
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Ok(match level_byte {
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0 => log::LevelFilter::Off,
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1 => log::LevelFilter::Error,
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2 => log::LevelFilter::Warn,
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3 => log::LevelFilter::Info,
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4 => log::LevelFilter::Debug,
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5 => log::LevelFilter::Trace,
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lv => {
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error!("unknown log level: {}", lv);
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return Err(());
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}
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})
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}
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|
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fn get_logger_buffer_pred() -> LogBufferRef<'static> {
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let logger = unsafe { BufferLogger::get_logger().as_mut().unwrap() };
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loop {
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if let Some(buffer_ref) = logger.buffer() {
|
||||||
|
return buffer_ref;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn get_logger_buffer() -> LogBufferRef<'static> {
|
||||||
|
get_logger_buffer_pred()
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn clear_log() {
|
||||||
|
let mut buffer = get_logger_buffer();
|
||||||
|
buffer.clear();
|
||||||
|
}
|
||||||
|
|
||||||
|
pub struct Manager<'a> {
|
||||||
|
cfg: &'a mut Config,
|
||||||
|
last_log: Sliceable,
|
||||||
|
current_payload: Cursor<Vec<u8>>,
|
||||||
|
last_value: Sliceable,
|
||||||
|
}
|
||||||
|
|
||||||
|
impl<'a> Manager<'_> {
|
||||||
|
pub fn new(cfg: &mut Config) -> Manager {
|
||||||
|
Manager {
|
||||||
|
cfg: cfg,
|
||||||
|
last_log: Sliceable::new(0, Vec::new()),
|
||||||
|
current_payload: Cursor::new(Vec::new()),
|
||||||
|
last_value: Sliceable::new(0, Vec::new()),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn log_get_slice(&mut self, data_slice: &mut [u8; SAT_PAYLOAD_MAX_SIZE]) -> SliceMeta {
|
||||||
|
// Populate buffer if depleted
|
||||||
|
if self.last_log.at_end() {
|
||||||
|
self.last_log.extend(get_logger_buffer().extract().as_bytes());
|
||||||
|
}
|
||||||
|
|
||||||
|
self.last_log.get_slice_satellite(data_slice)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn fetch_config_value(&mut self, key: &str) -> Result<()> {
|
||||||
|
self.cfg
|
||||||
|
.read(&key)
|
||||||
|
.map(|value| {
|
||||||
|
debug!("got value");
|
||||||
|
self.last_value = Sliceable::new(0, value)
|
||||||
|
})
|
||||||
|
.map_err(|_| warn!("read error: no such key"))
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn get_config_value_slice(&mut self, data_slice: &mut [u8; SAT_PAYLOAD_MAX_SIZE]) -> SliceMeta {
|
||||||
|
self.last_value.get_slice_satellite(data_slice)
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn add_data(&mut self, data: &[u8], data_len: usize) {
|
||||||
|
self.current_payload.write_all(&data[..data_len]).unwrap();
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn clear_data(&mut self) {
|
||||||
|
self.current_payload.get_mut().clear();
|
||||||
|
self.current_payload.set_position(0);
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn write_config(&mut self) -> Result<()> {
|
||||||
|
let key = self
|
||||||
|
.current_payload
|
||||||
|
.read_string()
|
||||||
|
.map_err(|_err| error!("error on reading key"))?;
|
||||||
|
debug!("write key: {}", key);
|
||||||
|
let value = self.current_payload.read_bytes().unwrap();
|
||||||
|
|
||||||
|
self.cfg
|
||||||
|
.write(&key, value)
|
||||||
|
.map(|()| debug!("write success"))
|
||||||
|
.map_err(|err| error!("failed to write: {:?}", err))
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn remove_config(&mut self, key: &str) -> Result<()> {
|
||||||
|
debug!("erase key: {}", key);
|
||||||
|
self.cfg
|
||||||
|
.remove(&key)
|
||||||
|
.map(|()| debug!("erase success"))
|
||||||
|
.map_err(|err| warn!("failed to erase: {:?}", err))
|
||||||
|
}
|
||||||
|
}
|
@ -4,7 +4,7 @@ use core::cmp::min;
|
|||||||
#[cfg(has_drtio_routing)]
|
#[cfg(has_drtio_routing)]
|
||||||
use libboard_artiq::pl::csr;
|
use libboard_artiq::pl::csr;
|
||||||
use libboard_artiq::{drtio_routing, drtioaux,
|
use libboard_artiq::{drtio_routing, drtioaux,
|
||||||
drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE}};
|
drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE, SAT_PAYLOAD_MAX_SIZE}};
|
||||||
|
|
||||||
pub struct SliceMeta {
|
pub struct SliceMeta {
|
||||||
pub destination: u8,
|
pub destination: u8,
|
||||||
@ -58,6 +58,7 @@ impl Sliceable {
|
|||||||
}
|
}
|
||||||
|
|
||||||
get_slice_fn!(get_slice_master, MASTER_PAYLOAD_MAX_SIZE);
|
get_slice_fn!(get_slice_master, MASTER_PAYLOAD_MAX_SIZE);
|
||||||
|
get_slice_fn!(get_slice_satellite, SAT_PAYLOAD_MAX_SIZE);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Packets from downstream (further satellites) are received and routed appropriately.
|
// Packets from downstream (further satellites) are received and routed appropriately.
|
||||||
|
Loading…
Reference in New Issue
Block a user