add simple ARTIQ kernel

core0-buffer
parent ab1dff4c48
commit 1d7914a20a
  1. 1
      .gitignore
  2. 14
      examples/blink_forever.py
  3. 38
      examples/device_db.py
  4. 2
      shell.nix

1
.gitignore vendored

@ -1,3 +1,4 @@
build/
runtime/src/pl.rs
target/
__pycache__

@ -0,0 +1,14 @@
from artiq.experiment import *
class BlinkForever(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("led0")
@kernel
def run(self):
self.core.reset()
while True:
self.led0.pulse(100*ms)
delay(100*ms)

@ -0,0 +1,38 @@
device_db = {
"core": {
"type": "local",
"module": "artiq.coredevice.core",
"class": "Core",
"arguments": {
"host": "192.168.1.52",
"ref_period": 1e-9,
"ref_multiplier": 1,
"target": "cortexa9"
}
},
"led0": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0},
},
"led1": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 1},
},
"led2": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 2}
},
"led3": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 3}
},
}

@ -36,12 +36,12 @@ in
rustcSrc
pkgs.cargo-xbuild
pkgs.pkgsCross.armv7l-hf-multiplatform.buildPackages.gcc
pkgs.openocd
pkgs.gdb
(pkgs.python3.withPackages(ps: (with artiqpkgs; [ migen migen-axi misoc artiq ])))
vivado
artiqpkgs.binutils-arm
];
XARGO_RUST_SRC = "${rustcSrc}/src";

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