occheung
/
web2019
forked from M-Labs/web2019
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

add Kasli-SoC links

This commit is contained in:
Sebastien Bourdeauducq 2023-03-12 09:31:48 +08:00
parent 6dec17d998
commit 19c4fa0d8c
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
content/experiment-control/sinara-core.md
View File

@ -36,6 +36,10 @@ One of the main devices in the Sinara family is the 1124 Carrier (codenamed Kasl
Based on a Zynq-7000 SoC, Kasli-SoC can execute kernels on a 1GHz CPU with a hardware FPU. This enables much heavier software computations to be performed on the core device with a low-latency path to the experiment. Network transfer rates are also greatly increased. Features are otherwise similar as Kasli's. Based on a Zynq-7000 SoC, Kasli-SoC can execute kernels on a 1GHz CPU with a hardware FPU. This enables much heavier software computations to be performed on the core device with a low-latency path to the experiment. Network transfer rates are also greatly increased. Features are otherwise similar as Kasli's.
See our paper <a href="https://arxiv.org/abs/2111.15290" target="_blank" rel="noopener noreferrer">Combining processing throughput, low latency and timing accuracy in experiment control</a> for information about what Kasli-SoC enables compared to previous ARTIQ platforms.
<a href="https://github.com/sinara-hw/Kasli-SoC/wiki" target="_blank" rel="noopener noreferrer">More information</a>
{% end %} {% end %}
{% layout_text_img(src="images/isolated-ttl@2x.png", popup="images/origin/dio.jpg", alt="", shadow=false) %} {% layout_text_img(src="images/isolated-ttl@2x.png", popup="images/origin/dio.jpg", alt="", shadow=false) %}