From 19c4fa0d8c71489329cd011b3afeafa0b1854d71 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 12 Mar 2023 09:31:48 +0800 Subject: [PATCH] add Kasli-SoC links --- content/experiment-control/sinara-core.md | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/content/experiment-control/sinara-core.md b/content/experiment-control/sinara-core.md index 698bd5fb..92c8ef91 100644 --- a/content/experiment-control/sinara-core.md +++ b/content/experiment-control/sinara-core.md @@ -36,6 +36,10 @@ One of the main devices in the Sinara family is the 1124 Carrier (codenamed Kasl Based on a Zynq-7000 SoC, Kasli-SoC can execute kernels on a 1GHz CPU with a hardware FPU. This enables much heavier software computations to be performed on the core device with a low-latency path to the experiment. Network transfer rates are also greatly increased. Features are otherwise similar as Kasli's. +See our paper Combining processing throughput, low latency and timing accuracy in experiment control for information about what Kasli-SoC enables compared to previous ARTIQ platforms. + +More information + {% end %} {% layout_text_img(src="images/isolated-ttl@2x.png", popup="images/origin/dio.jpg", alt="", shadow=false) %}